[mirror_ubuntu-jammy-kernel.git] / arch / arm / Kconfig-nommu

# SPDX-License-Identifier: GPL-2.0
#
# Kconfig for uClinux(non-paged MM) depend configurations
# Hyok S. Choi <hyok.choi@samsung.com>
# 

config SET_MEM_PARAM
	bool "Set flash/sdram size and base addr"
	help
	 Say Y to manually set the base addresses and sizes.
	 otherwise, the default values are assigned.

config DRAM_BASE
	hex '(S)DRAM Base Address' if SET_MEM_PARAM
	default 0x00800000

config DRAM_SIZE
	hex '(S)DRAM SIZE' if SET_MEM_PARAM
	default 0x00800000

config FLASH_MEM_BASE
	hex 'FLASH Base Address' if SET_MEM_PARAM
	depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
	default 0x00400000

config FLASH_SIZE
	hex 'FLASH Size' if SET_MEM_PARAM
	depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
	default 0x00400000

config PROCESSOR_ID
	hex 'Hard wire the processor ID'
	default 0x00007700
	depends on !(CPU_CP15 || CPU_V7M)
	help
	  If processor has no CP15 register, this processor ID is
	  used instead of the auto-probing which utilizes the register.

config REMAP_VECTORS_TO_RAM
	bool 'Install vectors to the beginning of RAM'
	help
	  The kernel needs to change the hardware exception vectors.
	  In nommu mode, the hardware exception vectors are normally
	  placed at address 0x00000000. However, this region may be
	  occupied by read-only memory depending on H/W design.

	  If the region contains read-write memory, say 'n' here.

	  If your CPU provides a remap facility which allows the exception
	  vectors to be mapped to writable memory, say 'n' here.

	  Otherwise, say 'y' here.  In this case, the kernel will require
	  external support to redirect the hardware exception vectors to
	  the writable versions located at DRAM_BASE.

config ARM_MPU
       bool 'Use the ARM v7 PMSA Compliant MPU'
       depends on CPU_V7 || CPU_V7M
       default y if CPU_V7
       help
         Some ARM systems without an MMU have instead a Memory Protection
         Unit (MPU) that defines the type and permissions for regions of
         memory.

         If your CPU has an MPU then you should choose 'y' here unless you
         know that you do not want to use the MPU.
Commit	Line	Data
b2441318	1	# SPDX-License-Identifier: GPL-2.0
f8c07de6 HC	2	#
	3	# Kconfig for uClinux(non-paged MM) depend configurations
	4	# Hyok S. Choi <hyok.choi@samsung.com>
	5	#
	6
	7	config SET_MEM_PARAM
	8	bool "Set flash/sdram size and base addr"
	9	help
	10	Say Y to manually set the base addresses and sizes.
	11	otherwise, the default values are assigned.
	12
	13	config DRAM_BASE
	14	hex '(S)DRAM Base Address' if SET_MEM_PARAM
	15	default 0x00800000
	16
	17	config DRAM_SIZE
	18	hex '(S)DRAM SIZE' if SET_MEM_PARAM
	19	default 0x00800000
	20
	21	config FLASH_MEM_BASE
	22	hex 'FLASH Base Address' if SET_MEM_PARAM
49e30bd0	23	depends on CPU_ARM740T \|\| CPU_ARM946E \|\| CPU_ARM940T
f8c07de6 HC	24	default 0x00400000
	25
	26	config FLASH_SIZE
	27	hex 'FLASH Size' if SET_MEM_PARAM
49e30bd0	28	depends on CPU_ARM740T \|\| CPU_ARM946E \|\| CPU_ARM940T
f8c07de6 HC	29	default 0x00400000
f8c07de6 HC	30
f12d0d7c	31	config PROCESSOR_ID
7a8be08b	32	hex 'Hard wire the processor ID'
f12d0d7c	33	default 0x00007700
4477ca45	34	depends on !(CPU_CP15 \|\| CPU_V7M)
f12d0d7c HC	35	help
	36	If processor has no CP15 register, this processor ID is
	37	used instead of the auto-probing which utilizes the register.
	38
c760fc19	39	config REMAP_VECTORS_TO_RAM
8a792e9a	40	bool 'Install vectors to the beginning of RAM'
c760fc19 HC	41	help
	42	The kernel needs to change the hardware exception vectors.
	43	In nommu mode, the hardware exception vectors are normally
	44	placed at address 0x00000000. However, this region may be
	45	occupied by read-only memory depending on H/W design.
	46
	47	If the region contains read-write memory, say 'n' here.
	48
	49	If your CPU provides a remap facility which allows the exception
	50	vectors to be mapped to writable memory, say 'n' here.
	51
	52	Otherwise, say 'y' here. In this case, the kernel will require
	53	external support to redirect the hardware exception vectors to
	54	the writable versions located at DRAM_BASE.
801bb21c JA	55
	56	config ARM_MPU
	57	bool 'Use the ARM v7 PMSA Compliant MPU'
21621830	58	depends on CPU_V7 \|\| CPU_V7M
9fcb01a9	59	default y if CPU_V7
801bb21c JA	60	help
	61	Some ARM systems without an MMU have instead a Memory Protection
	62	Unit (MPU) that defines the type and permissions for regions of
	63	memory.
	64
	65	If your CPU has an MPU then you should choose 'y' here unless you
	66	know that you do not want to use the MPU.