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f8c07de6 HC |
1 | # |
2 | # Kconfig for uClinux(non-paged MM) depend configurations | |
3 | # Hyok S. Choi <hyok.choi@samsung.com> | |
4 | # | |
5 | ||
6 | config SET_MEM_PARAM | |
7 | bool "Set flash/sdram size and base addr" | |
8 | help | |
9 | Say Y to manually set the base addresses and sizes. | |
10 | otherwise, the default values are assigned. | |
11 | ||
12 | config DRAM_BASE | |
13 | hex '(S)DRAM Base Address' if SET_MEM_PARAM | |
14 | default 0x00800000 | |
15 | ||
16 | config DRAM_SIZE | |
17 | hex '(S)DRAM SIZE' if SET_MEM_PARAM | |
18 | default 0x00800000 | |
19 | ||
20 | config FLASH_MEM_BASE | |
21 | hex 'FLASH Base Address' if SET_MEM_PARAM | |
22 | default 0x00400000 | |
23 | ||
24 | config FLASH_SIZE | |
25 | hex 'FLASH Size' if SET_MEM_PARAM | |
26 | default 0x00400000 | |
27 | ||
f12d0d7c | 28 | config PROCESSOR_ID |
7a8be08b | 29 | hex 'Hard wire the processor ID' |
f12d0d7c | 30 | default 0x00007700 |
4477ca45 | 31 | depends on !(CPU_CP15 || CPU_V7M) |
f12d0d7c HC |
32 | help |
33 | If processor has no CP15 register, this processor ID is | |
34 | used instead of the auto-probing which utilizes the register. | |
35 | ||
c760fc19 | 36 | config REMAP_VECTORS_TO_RAM |
8a792e9a | 37 | bool 'Install vectors to the beginning of RAM' |
c760fc19 HC |
38 | help |
39 | The kernel needs to change the hardware exception vectors. | |
40 | In nommu mode, the hardware exception vectors are normally | |
41 | placed at address 0x00000000. However, this region may be | |
42 | occupied by read-only memory depending on H/W design. | |
43 | ||
44 | If the region contains read-write memory, say 'n' here. | |
45 | ||
46 | If your CPU provides a remap facility which allows the exception | |
47 | vectors to be mapped to writable memory, say 'n' here. | |
48 | ||
49 | Otherwise, say 'y' here. In this case, the kernel will require | |
50 | external support to redirect the hardware exception vectors to | |
51 | the writable versions located at DRAM_BASE. | |
801bb21c JA |
52 | |
53 | config ARM_MPU | |
54 | bool 'Use the ARM v7 PMSA Compliant MPU' | |
de829776 | 55 | depends on CPU_V7 |
801bb21c JA |
56 | default y |
57 | help | |
58 | Some ARM systems without an MMU have instead a Memory Protection | |
59 | Unit (MPU) that defines the type and permissions for regions of | |
60 | memory. | |
61 | ||
62 | If your CPU has an MPU then you should choose 'y' here unless you | |
63 | know that you do not want to use the MPU. |