]>
Commit | Line | Data |
---|---|---|
090ab3ff SH |
1 | /* |
2 | * SuperH Mobile SDHI | |
3 | * | |
4 | * Copyright (C) 2010 Magnus Damm | |
5 | * Copyright (C) 2010 Kuninori Morimoto | |
6 | * Copyright (C) 2010 Simon Horman | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | * | |
12 | * Parts inspired by u-boot | |
13 | */ | |
14 | ||
15 | #include <linux/io.h> | |
16 | #include <mach/mmc.h> | |
17 | #include <linux/mmc/boot.h> | |
18 | #include <linux/mmc/tmio.h> | |
19 | ||
20 | #include "sdhi-shmobile.h" | |
21 | ||
22 | #define PORT179CR 0xe60520b3 | |
23 | #define PORT180CR 0xe60520b4 | |
24 | #define PORT181CR 0xe60520b5 | |
25 | #define PORT182CR 0xe60520b6 | |
26 | #define PORT183CR 0xe60520b7 | |
27 | #define PORT184CR 0xe60520b8 | |
28 | ||
29 | #define SMSTPCR3 0xe615013c | |
30 | ||
31 | #define CR_INPUT_ENABLE 0x10 | |
32 | #define CR_FUNCTION1 0x01 | |
33 | ||
34 | #define SDHI1_BASE (void __iomem *)0xe6860000 | |
35 | #define SDHI_BASE SDHI1_BASE | |
36 | ||
37 | /* SuperH Mobile SDHI loader | |
38 | * | |
39 | * loads the zImage from an SD card starting from block 0 | |
40 | * on physical partition 1 | |
41 | * | |
42 | * The image must be start with a vrl4 header and | |
43 | * the zImage must start at offset 512 of the image. That is, | |
44 | * at block 1 (=byte 512) of physical partition 1 | |
45 | * | |
46 | * Use the following line to write the vrl4 formated zImage | |
47 | * to an SD card | |
48 | * # dd if=vrl4.out of=/dev/sdx bs=512 | |
49 | */ | |
50 | asmlinkage void mmc_loader(unsigned short *buf, unsigned long len) | |
51 | { | |
52 | int high_capacity; | |
53 | ||
54 | mmc_init_progress(); | |
55 | ||
56 | mmc_update_progress(MMC_PROGRESS_ENTER); | |
57 | /* Initialise SDHI1 */ | |
58 | /* PORT184CR: GPIO_FN_SDHICMD1 Control */ | |
59 | __raw_writeb(CR_FUNCTION1, PORT184CR); | |
60 | /* PORT179CR: GPIO_FN_SDHICLK1 Control */ | |
61 | __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR); | |
62 | /* PORT181CR: GPIO_FN_SDHID1_3 Control */ | |
63 | __raw_writeb(CR_FUNCTION1, PORT183CR); | |
64 | /* PORT182CR: GPIO_FN_SDHID1_2 Control */ | |
65 | __raw_writeb(CR_FUNCTION1, PORT182CR); | |
66 | /* PORT183CR: GPIO_FN_SDHID1_1 Control */ | |
67 | __raw_writeb(CR_FUNCTION1, PORT181CR); | |
68 | /* PORT180CR: GPIO_FN_SDHID1_0 Control */ | |
69 | __raw_writeb(CR_FUNCTION1, PORT180CR); | |
70 | ||
71 | /* Enable clock to SDHI1 hardware block */ | |
72 | __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 13), SMSTPCR3); | |
73 | ||
74 | /* setup SDHI hardware */ | |
75 | mmc_update_progress(MMC_PROGRESS_INIT); | |
76 | high_capacity = sdhi_boot_init(SDHI_BASE); | |
77 | if (high_capacity < 0) | |
78 | goto err; | |
79 | ||
80 | mmc_update_progress(MMC_PROGRESS_LOAD); | |
81 | /* load kernel */ | |
82 | if (sdhi_boot_do_read(SDHI_BASE, high_capacity, | |
83 | 0, /* Kernel is at block 1 */ | |
84 | (len + TMIO_BBS - 1) / TMIO_BBS, buf)) | |
85 | goto err; | |
86 | ||
87 | /* Disable clock to SDHI1 hardware block */ | |
88 | __raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3); | |
89 | ||
90 | mmc_update_progress(MMC_PROGRESS_DONE); | |
91 | ||
92 | return; | |
93 | err: | |
94 | for(;;); | |
95 | } |