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c2fc0ad9 YY |
1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * VScom OnRISC | |
11 | * http://www.vscom.de | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
15 | ||
16 | #include "am335x-baltos.dtsi" | |
17 | ||
18 | / { | |
19 | model = "OnRISC Baltos iR 2110"; | |
20 | }; | |
21 | ||
22 | &am33xx_pinmux { | |
23 | uart1_pins: pinmux_uart1_pins { | |
24 | pinctrl-single,pins = < | |
25 | AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */ | |
26 | AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */ | |
27 | AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart1_ctsn */ | |
28 | AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn */ | |
29 | AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ | |
30 | AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */ | |
31 | AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */ | |
32 | AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */ | |
33 | >; | |
34 | }; | |
35 | }; | |
36 | ||
37 | &uart1 { | |
38 | pinctrl-names = "default"; | |
39 | pinctrl-0 = <&uart1_pins>; | |
40 | dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; | |
41 | dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; | |
42 | dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; | |
43 | rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; | |
44 | ||
45 | status = "okay"; | |
46 | }; | |
47 | ||
48 | &usb0_phy { | |
49 | status = "okay"; | |
50 | }; | |
51 | ||
52 | &usb0 { | |
53 | status = "okay"; | |
54 | dr_mode = "host"; | |
55 | }; | |
56 | ||
f5c59d16 YY |
57 | &davinci_mdio { |
58 | phy0: ethernet-phy@0 { | |
59 | reg = <1>; | |
60 | }; | |
61 | }; | |
62 | ||
c2fc0ad9 | 63 | &cpsw_emac0 { |
c2fc0ad9 YY |
64 | phy-mode = "rmii"; |
65 | dual_emac_res_vlan = <1>; | |
f5c59d16 | 66 | phy-handle = <&phy0>; |
c2fc0ad9 YY |
67 | }; |
68 | ||
69 | &cpsw_emac1 { | |
c2fc0ad9 YY |
70 | phy-mode = "rgmii-txid"; |
71 | dual_emac_res_vlan = <2>; | |
f5c59d16 | 72 | phy-handle = <&phy1>; |
c2fc0ad9 YY |
73 | }; |
74 | ||
75 | &phy_sel { | |
76 | rmii-clock-ext = <1>; | |
77 | }; |