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1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * VScom OnRISC | |
11 | * http://www.vscom.de | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
15 | ||
16 | #include "am335x-baltos.dtsi" | |
21339f57 | 17 | #include "am335x-baltos-leds.dtsi" |
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18 | |
19 | / { | |
20 | model = "OnRISC Baltos iR 2110"; | |
21 | }; | |
22 | ||
23 | &am33xx_pinmux { | |
24 | uart1_pins: pinmux_uart1_pins { | |
25 | pinctrl-single,pins = < | |
7229d544 CQ |
26 | AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) |
27 | AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) | |
28 | AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) | |
29 | AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) | |
30 | AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */ | |
31 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */ | |
32 | AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */ | |
33 | AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */ | |
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34 | >; |
35 | }; | |
36 | }; | |
37 | ||
38 | &uart1 { | |
39 | pinctrl-names = "default"; | |
40 | pinctrl-0 = <&uart1_pins>; | |
41 | dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; | |
42 | dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; | |
43 | dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; | |
44 | rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; | |
45 | ||
46 | status = "okay"; | |
47 | }; | |
48 | ||
49 | &usb0_phy { | |
50 | status = "okay"; | |
51 | }; | |
52 | ||
53 | &usb0 { | |
54 | status = "okay"; | |
55 | dr_mode = "host"; | |
56 | }; | |
57 | ||
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58 | &davinci_mdio { |
59 | phy0: ethernet-phy@0 { | |
60 | reg = <1>; | |
61 | }; | |
62 | }; | |
63 | ||
c2fc0ad9 | 64 | &cpsw_emac0 { |
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65 | phy-mode = "rmii"; |
66 | dual_emac_res_vlan = <1>; | |
f5c59d16 | 67 | phy-handle = <&phy0>; |
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68 | }; |
69 | ||
70 | &cpsw_emac1 { | |
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71 | phy-mode = "rgmii-txid"; |
72 | dual_emac_res_vlan = <2>; | |
f5c59d16 | 73 | phy-handle = <&phy1>; |
c2fc0ad9 | 74 | }; |