[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / am335x-evm.dts

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	am33xx_pinmux: pinmux@44e10800 {
		pinctrl-names = "default";
		pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;

		matrix_keypad_s0: matrix_keypad_s0 {
			pinctrl-single,pins = <
				0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
				0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
				0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a9.gpio1_25 */
				0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a10.gpio1_26 */
				0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
			>;
		};

		volume_keys_s0: volume_keys_s0 {
			pinctrl-single,pins = <
				0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_sclk.gpio0_2 */
				0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_d0.gpio0_3 */
			>;
		};

		i2c0_pins: pinmux_i2c0_pins {
			pinctrl-single,pins = <
				0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
				0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
			>;
		};

		i2c1_pins: pinmux_i2c1_pins {
			pinctrl-single,pins = <
				0x158 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
				0x15c (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
			>;
		};

		uart0_pins: pinmux_uart0_pins {
			pinctrl-single,pins = <
				0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
				0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
			>;
		};

		clkout2_pin: pinmux_clkout2_pin {
			pinctrl-single,pins = <
				0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
			>;
		};

		nandflash_pins_s0: nandflash_pins_s0 {
			pinctrl-single,pins = <
				0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
				0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
				0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
				0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
				0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
				0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
				0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
				0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
				0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
				0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
				0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
				0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
				0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
				0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
				0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
			>;
		};

		ecap0_pins: backlight_pins {
			pinctrl-single,pins = <
				0x164 0x0	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
			>;
		};

		cpsw_default: cpsw_default {
			pinctrl-single,pins = <
				/* Slave 1 */
				0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
				0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
				0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
				0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
				0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
				0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
				0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
				0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
				0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
				0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
				0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
				0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
			>;
		};

		cpsw_sleep: cpsw_sleep {
			pinctrl-single,pins = <
				/* Slave 1 reset value */
				0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};

		davinci_mdio_default: davinci_mdio_default {
			pinctrl-single,pins = <
				/* MDIO */
				0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
				0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
			>;
		};

		davinci_mdio_sleep: davinci_mdio_sleep {
			pinctrl-single,pins = <
				/* MDIO reset value */
				0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
				0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			>;
		};
	};

	ocp {
		uart0: serial@44e09000 {
			pinctrl-names = "default";
			pinctrl-0 = <&uart0_pins>;

			status = "okay";
		};

		i2c0: i2c@44e0b000 {
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;

			status = "okay";
			clock-frequency = <400000>;

			tps: tps@2d {
				reg = <0x2d>;
			};
		};

		musb: usb@47400000 {
			status = "okay";

			control@44e10000 {
				status = "okay";
			};

			usb-phy@47401300 {
				status = "okay";
			};

			usb-phy@47401b00 {
				status = "okay";
			};

			usb@47401000 {
				status = "okay";
			};

			usb@47401800 {
				status = "okay";
				dr_mode = "host";
			};

			dma-controller@07402000  {
				status = "okay";
			};
		};

		i2c1: i2c@4802a000 {
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_pins>;

			status = "okay";
			clock-frequency = <100000>;

			lis331dlh: lis331dlh@18 {
				compatible = "st,lis331dlh", "st,lis3lv02d";
				reg = <0x18>;
				Vdd-supply = <&lis3_reg>;
				Vdd_IO-supply = <&lis3_reg>;

				st,click-single-x;
				st,click-single-y;
				st,click-single-z;
				st,click-thresh-x = <10>;
				st,click-thresh-y = <10>;
				st,click-thresh-z = <10>;
				st,irq1-click;
				st,irq2-click;
				st,wakeup-x-lo;
				st,wakeup-x-hi;
				st,wakeup-y-lo;
				st,wakeup-y-hi;
				st,wakeup-z-lo;
				st,wakeup-z-hi;
				st,min-limit-x = <120>;
				st,min-limit-y = <120>;
				st,min-limit-z = <140>;
				st,max-limit-x = <550>;
				st,max-limit-y = <550>;
				st,max-limit-z = <750>;
			};

			tsl2550: tsl2550@39 {
				compatible = "taos,tsl2550";
				reg = <0x39>;
			};

			tmp275: tmp275@48 {
				compatible = "ti,tmp275";
				reg = <0x48>;
			};
		};

		elm: elm@48080000 {
			status = "okay";
		};

		epwmss0: epwmss@48300000 {
			status = "okay";

			ecap0: ecap@48300100 {
				status = "okay";
				pinctrl-names = "default";
				pinctrl-0 = <&ecap0_pins>;
			};
		};

		gpmc: gpmc@50000000 {
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <&nandflash_pins_s0>;
			ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
			nand@0,0 {
				reg = <0 0 0>; /* CS0, offset 0 */
				nand-bus-width = <8>;
				ti,nand-ecc-opt = "bch8";
				gpmc,device-nand = "true";
				gpmc,device-width = <1>;
				gpmc,sync-clk-ps = <0>;
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <44>;
				gpmc,cs-wr-off-ns = <44>;
				gpmc,adv-on-ns = <6>;
				gpmc,adv-rd-off-ns = <34>;
				gpmc,adv-wr-off-ns = <44>;
				gpmc,we-on-ns = <0>;
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <0>;
				gpmc,oe-off-ns = <54>;
				gpmc,access-ns = <64>;
				gpmc,rd-cycle-ns = <82>;
				gpmc,wr-cycle-ns = <82>;
				gpmc,wait-on-read = "true";
				gpmc,wait-on-write = "true";
				gpmc,bus-turnaround-ns = <0>;
				gpmc,cycle2cycle-delay-ns = <0>;
				gpmc,clk-activation-ns = <0>;
				gpmc,wait-monitoring-ns = <0>;
				gpmc,wr-access-ns = <40>;
				gpmc,wr-data-mux-bus-ns = <0>;

				#address-cells = <1>;
				#size-cells = <1>;
				elm_id = <&elm>;

				/* MTD partition table */
				partition@0 {
					label = "SPL1";
					reg = <0x00000000 0x000020000>;
				};

				partition@1 {
					label = "SPL2";
					reg = <0x00020000 0x00020000>;
				};

				partition@2 {
					label = "SPL3";
					reg = <0x00040000 0x00020000>;
				};

				partition@3 {
					label = "SPL4";
					reg = <0x00060000 0x00020000>;
				};

				partition@4 {
					label = "U-boot";
					reg = <0x00080000 0x001e0000>;
				};

				partition@5 {
					label = "environment";
					reg = <0x00260000 0x00020000>;
				};

				partition@6 {
					label = "Kernel";
					reg = <0x00280000 0x00500000>;
				};

				partition@7 {
					label = "File-System";
					reg = <0x00780000 0x0F880000>;
				};
			};
		};
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	matrix_keypad: matrix_keypad@0 {
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;

		row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH		/* Bank1, pin25 */
			     &gpio1 26 GPIO_ACTIVE_HIGH		/* Bank1, pin26 */
			     &gpio1 27 GPIO_ACTIVE_HIGH>;	/* Bank1, pin27 */

		col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH		/* Bank1, pin21 */
			     &gpio1 22 GPIO_ACTIVE_HIGH>;	/* Bank1, pin22 */

		linux,keymap = <0x0000008b	/* MENU */
				0x0100009e	/* BACK */
				0x02000069	/* LEFT */
				0x0001006a	/* RIGHT */
				0x0101001c	/* ENTER */
				0x0201006c>;	/* DOWN */
	};

	gpio_keys: volume_keys@0 {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;

		switch@9 {
			label = "volume-up";
			linux,code = <115>;
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};

		switch@10 {
			label = "volume-down";
			linux,code = <114>;
			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 0>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1312500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii-txid";
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii-txid";
};

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
		ti,coordiante-readouts = <5>;
		ti,wire-config = <0x00 0x11 0x22 0x33>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};
Commit	Line	Data
32bb00e0 AC	1	/*
	2	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8	/dts-v1/;
	9
eb33ef66	10	#include "am33xx.dtsi"
32bb00e0 AC	11
	12	/ {
	13	model = "TI AM335x EVM";
	14	compatible = "ti,am335x-evm", "ti,am33xx";
	15
efeedcf2 AC	16	cpus {
	17	cpu@0 {
	18	cpu0-supply = <&vdd1_reg>;
	19	};
	20	};
	21
32bb00e0 AC	22	memory {
	23	device_type = "memory";
	24	reg = <0x80000000 0x10000000>; /* 256 MB */
	25	};
53d91034	26
5d9b66f2 AC	27	am33xx_pinmux: pinmux@44e10800 {
5d9b66f2 AC	28	pinctrl-names = "default";
4d927570	29	pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
5d9b66f2 AC	30
	31	matrix_keypad_s0: matrix_keypad_s0 {
	32	pinctrl-single,pins = <
6a8a6b65 FV	33	0x54 (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a5.gpio1_21 */
	34	0x58 (PIN_OUTPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a6.gpio1_22 */
	35	0x64 (PIN_INPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a9.gpio1_25 */
	36	0x68 (PIN_INPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a10.gpio1_26 */
	37	0x6c (PIN_INPUT_PULLDOWN \| MUX_MODE7) /* gpmc_a11.gpio1_27 */
5d9b66f2 AC	38	>;
5d9b66f2 AC	39	};
404aa0d7 AC	40
	41	volume_keys_s0: volume_keys_s0 {
	42	pinctrl-single,pins = <
6a8a6b65 FV	43	0x150 (PIN_INPUT_PULLDOWN \| MUX_MODE7) /* spi0_sclk.gpio0_2 */
6a8a6b65 FV	44	0x154 (PIN_INPUT_PULLDOWN \| MUX_MODE7) /* spi0_d0.gpio0_3 */
404aa0d7 AC	45	>;
404aa0d7 AC	46	};
3f866445 VH	47
	48	i2c0_pins: pinmux_i2c0_pins {
	49	pinctrl-single,pins = <
6a8a6b65 FV	50	0x188 (PIN_INPUT_PULLUP \| MUX_MODE0) /* i2c0_sda.i2c0_sda */
6a8a6b65 FV	51	0x18c (PIN_INPUT_PULLUP \| MUX_MODE0) /* i2c0_scl.i2c0_scl */
3f866445 VH	52	>;
	53	};
	54
	55	i2c1_pins: pinmux_i2c1_pins {
	56	pinctrl-single,pins = <
6a8a6b65 FV	57	0x158 (PIN_INPUT_PULLUP \| MUX_MODE2) /* spi0_d1.i2c1_sda */
6a8a6b65 FV	58	0x15c (PIN_INPUT_PULLUP \| MUX_MODE2) /* spi0_cs0.i2c1_scl */
3f866445 VH	59	>;
3f866445 VH	60	};
9f2fbe17 VH	61
	62	uart0_pins: pinmux_uart0_pins {
	63	pinctrl-single,pins = <
6a8a6b65 FV	64	0x170 (PIN_INPUT_PULLUP \| MUX_MODE0) /* uart0_rxd.uart0_rxd */
6a8a6b65 FV	65	0x174 (PIN_OUTPUT_PULLDOWN \| MUX_MODE0) /* uart0_txd.uart0_txd */
9f2fbe17 VH	66	>;
9f2fbe17 VH	67	};
4d927570 VH	68
	69	clkout2_pin: pinmux_clkout2_pin {
	70	pinctrl-single,pins = <
6a8a6b65	71	0x1b4 (PIN_OUTPUT_PULLDOWN \| MUX_MODE3) /* xdma_event_intr1.clkout2 */
4d927570 VH	72	>;
4d927570 VH	73	};
fdc6a2dd PA	74
	75	nandflash_pins_s0: nandflash_pins_s0 {
	76	pinctrl-single,pins = <
6a8a6b65 FV	77	0x0 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
	78	0x4 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
	79	0x8 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
	80	0xc (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
	81	0x10 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
	82	0x14 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
	83	0x18 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
	84	0x1c (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
	85	0x70 (PIN_INPUT_PULLUP \| MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
	86	0x74 (PIN_INPUT_PULLUP \| MUX_MODE7) /* gpmc_wpn.gpio0_30 */
	87	0x7c (PIN_OUTPUT \| MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
	88	0x90 (PIN_OUTPUT \| MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
	89	0x94 (PIN_OUTPUT \| MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
	90	0x98 (PIN_OUTPUT \| MUX_MODE0) /* gpmc_wen.gpmc_wen */
	91	0x9c (PIN_OUTPUT \| MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
fdc6a2dd PA	92	>;
fdc6a2dd PA	93	};
6993fd01 PA	94
	95	ecap0_pins: backlight_pins {
	96	pinctrl-single,pins = <
	97	0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
	98	>;
	99	};
50c7d2bd M	100
	101	cpsw_default: cpsw_default {
	102	pinctrl-single,pins = <
	103	/* Slave 1 */
	104	0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txen.rgmii1_tctl */
	105	0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
	106	0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
	107	0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
	108	0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
	109	0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
	110	0x12c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
	111	0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
	112	0x134 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
	113	0x138 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
	114	0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
	115	0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
	116	>;
	117	};
	118
	119	cpsw_sleep: cpsw_sleep {
	120	pinctrl-single,pins = <
	121	/* Slave 1 reset value */
	122	0x114 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	123	0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	124	0x11c (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	125	0x120 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	126	0x124 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	127	0x128 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	128	0x12c (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	129	0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	130	0x134 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	131	0x138 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	132	0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	133	0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	134	>;
	135	};
	136
	137	davinci_mdio_default: davinci_mdio_default {
	138	pinctrl-single,pins = <
	139	/* MDIO */
	140	0x148 (PIN_INPUT_PULLUP \| SLEWCTRL_FAST \| MUX_MODE0) /* mdio_data.mdio_data */
	141	0x14c (PIN_OUTPUT_PULLUP \| MUX_MODE0) /* mdio_clk.mdio_clk */
	142	>;
	143	};
	144
	145	davinci_mdio_sleep: davinci_mdio_sleep {
	146	pinctrl-single,pins = <
	147	/* MDIO reset value */
	148	0x148 (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	149	0x14c (PIN_INPUT_PULLDOWN \| MUX_MODE7)
	150	>;
	151	};
5d9b66f2 AC	152	};
5d9b66f2 AC	153
53d91034	154	ocp {
dde3b0d6	155	uart0: serial@44e09000 {
9f2fbe17 VH	156	pinctrl-names = "default";
	157	pinctrl-0 = <&uart0_pins>;
	158
53d91034 VH	159	status = "okay";
53d91034 VH	160	};
1b2a9702	161
b918e2c0	162	i2c0: i2c@44e0b000 {
3f866445 VH	163	pinctrl-names = "default";
	164	pinctrl-0 = <&i2c0_pins>;
	165
1b2a9702 AC	166	status = "okay";
	167	clock-frequency = <400000>;
	168
5d83cb86 VH	169	tps: tps@2d {
5d83cb86 VH	170	reg = <0x2d>;
1b2a9702 AC	171	};
1b2a9702 AC	172	};
492dd024	173
97238b35 SAS	174	musb: usb@47400000 {
	175	status = "okay";
	176
	177	control@44e10000 {
	178	status = "okay";
	179	};
	180
c031a7d4	181	usb-phy@47401300 {
97238b35 SAS	182	status = "okay";
	183	};
	184
c031a7d4	185	usb-phy@47401b00 {
97238b35 SAS	186	status = "okay";
	187	};
	188
	189	usb@47401000 {
	190	status = "okay";
	191	};
	192
	193	usb@47401800 {
	194	status = "okay";
781f1798	195	dr_mode = "host";
97238b35	196	};
9b3452d1	197
c031a7d4	198	dma-controller@07402000 {
9b3452d1 SAS	199	status = "okay";
9b3452d1 SAS	200	};
97238b35 SAS	201	};
97238b35 SAS	202
b918e2c0	203	i2c1: i2c@4802a000 {
3f866445 VH	204	pinctrl-names = "default";
	205	pinctrl-0 = <&i2c1_pins>;
	206
492dd024	207	status = "okay";
cd5cfac2	208	clock-frequency = <100000>;
492dd024 AC	209
	210	lis331dlh: lis331dlh@18 {
	211	compatible = "st,lis331dlh", "st,lis3lv02d";
	212	reg = <0x18>;
	213	Vdd-supply = <&lis3_reg>;
	214	Vdd_IO-supply = <&lis3_reg>;
	215
	216	st,click-single-x;
	217	st,click-single-y;
	218	st,click-single-z;
	219	st,click-thresh-x = <10>;
	220	st,click-thresh-y = <10>;
	221	st,click-thresh-z = <10>;
	222	st,irq1-click;
	223	st,irq2-click;
	224	st,wakeup-x-lo;
	225	st,wakeup-x-hi;
	226	st,wakeup-y-lo;
	227	st,wakeup-y-hi;
	228	st,wakeup-z-lo;
	229	st,wakeup-z-hi;
	230	st,min-limit-x = <120>;
	231	st,min-limit-y = <120>;
	232	st,min-limit-z = <140>;
	233	st,max-limit-x = <550>;
	234	st,max-limit-y = <550>;
	235	st,max-limit-z = <750>;
	236	};
bf078553	237
cd5cfac2 AC	238	tsl2550: tsl2550@39 {
	239	compatible = "taos,tsl2550";
	240	reg = <0x39>;
	241	};
	242
bf078553 AC	243	tmp275: tmp275@48 {
	244	compatible = "ti,tmp275";
	245	reg = <0x48>;
	246	};
492dd024	247	};
fdc6a2dd PA	248
	249	elm: elm@48080000 {
	250	status = "okay";
	251	};
	252
6993fd01 PA	253	epwmss0: epwmss@48300000 {
	254	status = "okay";
	255
	256	ecap0: ecap@48300100 {
	257	status = "okay";
	258	pinctrl-names = "default";
	259	pinctrl-0 = <&ecap0_pins>;
	260	};
	261	};
	262
fdc6a2dd PA	263	gpmc: gpmc@50000000 {
	264	status = "okay";
	265	pinctrl-names = "default";
	266	pinctrl-0 = <&nandflash_pins_s0>;
	267	ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
	268	nand@0,0 {
	269	reg = <0 0 0>; /* CS0, offset 0 */
	270	nand-bus-width = <8>;
	271	ti,nand-ecc-opt = "bch8";
	272	gpmc,device-nand = "true";
	273	gpmc,device-width = <1>;
	274	gpmc,sync-clk-ps = <0>;
	275	gpmc,cs-on-ns = <0>;
	276	gpmc,cs-rd-off-ns = <44>;
	277	gpmc,cs-wr-off-ns = <44>;
	278	gpmc,adv-on-ns = <6>;
	279	gpmc,adv-rd-off-ns = <34>;
	280	gpmc,adv-wr-off-ns = <44>;
	281	gpmc,we-on-ns = <0>;
	282	gpmc,we-off-ns = <40>;
	283	gpmc,oe-on-ns = <0>;
	284	gpmc,oe-off-ns = <54>;
	285	gpmc,access-ns = <64>;
	286	gpmc,rd-cycle-ns = <82>;
	287	gpmc,wr-cycle-ns = <82>;
	288	gpmc,wait-on-read = "true";
	289	gpmc,wait-on-write = "true";
	290	gpmc,bus-turnaround-ns = <0>;
	291	gpmc,cycle2cycle-delay-ns = <0>;
	292	gpmc,clk-activation-ns = <0>;
	293	gpmc,wait-monitoring-ns = <0>;
	294	gpmc,wr-access-ns = <40>;
	295	gpmc,wr-data-mux-bus-ns = <0>;
	296
	297	#address-cells = <1>;
	298	#size-cells = <1>;
	299	elm_id = <&elm>;
	300
	301	/* MTD partition table */
	302	partition@0 {
	303	label = "SPL1";
	304	reg = <0x00000000 0x000020000>;
	305	};
	306
	307	partition@1 {
	308	label = "SPL2";
	309	reg = <0x00020000 0x00020000>;
	310	};
	311
	312	partition@2 {
	313	label = "SPL3";
	314	reg = <0x00040000 0x00020000>;
	315	};
	316
	317	partition@3 {
	318	label = "SPL4";
	319	reg = <0x00060000 0x00020000>;
	320	};
	321
	322	partition@4 {
	323	label = "U-boot";
	324	reg = <0x00080000 0x001e0000>;
	325	};
	326
327	partition@5 {
328	label = "environment";
329	reg = <0x00260000 0x00020000>;
330	};
331
332	partition@6 {
333	label = "Kernel";
334	reg = <0x00280000 0x00500000>;
335	};
336
337	partition@7 {
338	label = "File-System";
339	reg = <0x00780000 0x0F880000>;
340	};
341	};
342	};
1b2a9702 AC	343	};
	344
	345	vbat: fixedregulator@0 {
	346	compatible = "regulator-fixed";
	347	regulator-name = "vbat";
	348	regulator-min-microvolt = <5000000>;
	349	regulator-max-microvolt = <5000000>;
	350	regulator-boot-on;
	351	};
492dd024 AC	352
	353	lis3_reg: fixedregulator@1 {
	354	compatible = "regulator-fixed";
	355	regulator-name = "lis3_reg";
	356	regulator-boot-on;
	357	};
2ca1d317 AC	358
	359	matrix_keypad: matrix_keypad@0 {
	360	compatible = "gpio-matrix-keypad";
	361	debounce-delay-ms = <5>;
	362	col-scan-delay-us = <2>;
	363
e94233c2 FV	364	row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
	365	&gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
	366	&gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
2ca1d317	367
e94233c2 FV	368	col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
e94233c2 FV	369	&gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
2ca1d317 AC	370
	371	linux,keymap = <0x0000008b /* MENU */
	372	0x0100009e /* BACK */
	373	0x02000069 /* LEFT */
	374	0x0001006a /* RIGHT */
	375	0x0101001c /* ENTER */
	376	0x0201006c>; /* DOWN */
	377	};
822c9936 AC	378
	379	gpio_keys: volume_keys@0 {
	380	compatible = "gpio-keys";
	381	#address-cells = <1>;
	382	#size-cells = <0>;
	383	autorepeat;
	384
	385	switch@9 {
	386	label = "volume-up";
	387	linux,code = <115>;
e94233c2	388	gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
822c9936 AC	389	gpio-key,wakeup;
	390	};
	391
	392	switch@10 {
	393	label = "volume-down";
	394	linux,code = <114>;
e94233c2	395	gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
822c9936 AC	396	gpio-key,wakeup;
	397	};
	398	};
6993fd01 PA	399
	400	backlight {
	401	compatible = "pwm-backlight";
	402	pwms = <&ecap0 0 50000 0>;
	403	brightness-levels = <0 51 53 56 62 75 101 152 255>;
	404	default-brightness-level = <8>;
	405	};
1b2a9702 AC	406	};
1b2a9702 AC	407
eb33ef66	408	#include "tps65910.dtsi"
1b2a9702 AC	409
	410	&tps {
	411	vcc1-supply = <&vbat>;
	412	vcc2-supply = <&vbat>;
	413	vcc3-supply = <&vbat>;
	414	vcc4-supply = <&vbat>;
	415	vcc5-supply = <&vbat>;
	416	vcc6-supply = <&vbat>;
	417	vcc7-supply = <&vbat>;
	418	vccio-supply = <&vbat>;
	419
	420	regulators {
	421	vrtc_reg: regulator@0 {
	422	regulator-always-on;
	423	};
	424
	425	vio_reg: regulator@1 {
	426	regulator-always-on;
	427	};
	428
	429	vdd1_reg: regulator@2 {
	430	/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
	431	regulator-name = "vdd_mpu";
	432	regulator-min-microvolt = <912500>;
	433	regulator-max-microvolt = <1312500>;
	434	regulator-boot-on;
	435	regulator-always-on;
	436	};
	437
	438	vdd2_reg: regulator@3 {
	439	/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
	440	regulator-name = "vdd_core";
	441	regulator-min-microvolt = <912500>;
	442	regulator-max-microvolt = <1150000>;
	443	regulator-boot-on;
	444	regulator-always-on;
	445	};
	446
	447	vdd3_reg: regulator@4 {
	448	regulator-always-on;
	449	};
	450
	451	vdig1_reg: regulator@5 {
	452	regulator-always-on;
	453	};
	454
	455	vdig2_reg: regulator@6 {
	456	regulator-always-on;
	457	};
	458
	459	vpll_reg: regulator@7 {
	460	regulator-always-on;
	461	};
	462
	463	vdac_reg: regulator@8 {
	464	regulator-always-on;
	465	};
	466
	467	vaux1_reg: regulator@9 {
	468	regulator-always-on;
	469	};
	470
	471	vaux2_reg: regulator@10 {
	472	regulator-always-on;
473	};
474
475	vaux33_reg: regulator@11 {
476	regulator-always-on;
477	};
478
479	vmmc_reg: regulator@12 {
480	regulator-always-on;
481	};
53d91034	482	};
32bb00e0	483	};
1a39a65c	484
50c7d2bd M	485	&mac {
	486	pinctrl-names = "default", "sleep";
	487	pinctrl-0 = <&cpsw_default>;
	488	pinctrl-1 = <&cpsw_sleep>;
	489	};
	490
	491	&davinci_mdio {
	492	pinctrl-names = "default", "sleep";
	493	pinctrl-0 = <&davinci_mdio_default>;
	494	pinctrl-1 = <&davinci_mdio_sleep>;
	495	};
	496
1a39a65c M	497	&cpsw_emac0 {
1a39a65c M	498	phy_id = <&davinci_mdio>, <0>;
6d75afe2	499	phy-mode = "rgmii-txid";
1a39a65c M	500	};
	501
	502	&cpsw_emac1 {
	503	phy_id = <&davinci_mdio>, <1>;
6d75afe2	504	phy-mode = "rgmii-txid";
1a39a65c	505	};
a82279dd PR	506
	507	&tscadc {
	508	status = "okay";
	509	tsc {
	510	ti,wires = <4>;
	511	ti,x-plate-resistance = <200>;
	512	ti,coordiante-readouts = <5>;
	513	ti,wire-config = <0x00 0x11 0x22 0x33>;
	514	};
	515
	516	adc {
18926ede	517	ti,adc-channels = <4 5 6 7>;
a82279dd PR	518	};
a82279dd PR	519	};