[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / am335x-igep0033.dtsi

// SPDX-License-Identifier: GPL-2.0-only
/*
 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
 *
 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&leds_pins>;

		compatible = "gpio-leds";

		led0 {
			label = "com:green:user";
			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	vmmc: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "vmmc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&am33xx_pinmux {
	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

	nandflash_pins: pinmux_nandflash_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	leds_pins: pinmux_leds_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_a7.gpio1_23 */
		>;
	};
};

&mac {
	status = "okay";
};

&davinci_mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&cpsw_emac0 {
	phy-handle = <&ethphy0>;
	phy-mode = "rmii";

};

&cpsw_emac1 {
	phy-handle = <&ethphy1>;
	phy-mode = "rmii";
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins>;

	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <8>;
		ti,nand-ecc-opt = "bch8";
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;
		ti,elm-id = <&elm>;

		/* MTD partition table */
		partition@0 {
			label = "SPL";
			reg = <0x00000000 0x000080000>;
		};

		partition@1 {
			label = "U-boot";
			reg = <0x00080000 0x001e0000>;
		};

		partition@2 {
			label = "U-Boot Env";
			reg = <0x00260000 0x00020000>;
		};

		partition@3 {
			label = "Kernel";
			reg = <0x00280000 0x00500000>;
		};

		partition@4 {
			label = "File System";
			reg = <0x00780000 0x007880000>;
		};
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc>;
	bus-width = <4>;
};

&uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&cppi41dma  {
	status = "okay";
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1312500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-always-on;
		};
	};
};
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
e415245c EBS	2	/*
	3	* am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
	4	*
	5	* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
e415245c EBS	6	*/
	7
	8	/dts-v1/;
	9
	10	#include "am33xx.dtsi"
03752148	11	#include <dt-bindings/interrupt-controller/irq.h>
e415245c EBS	12
	13	/ {
	14	cpus {
	15	cpu@0 {
	16	cpu0-supply = <&vdd1_reg>;
	17	};
	18	};
	19
278cb79c	20	memory@80000000 {
e415245c EBS	21	device_type = "memory";
	22	reg = <0x80000000 0x10000000>; /* 256 MB */
	23	};
	24
	25	leds {
	26	pinctrl-names = "default";
	27	pinctrl-0 = <&leds_pins>;
	28
	29	compatible = "gpio-leds";
	30
c731abd9	31	led0 {
e415245c EBS	32	label = "com:green:user";
	33	gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
	34	default-state = "on";
	35	};
	36	};
	37
4c049a5b	38	vbat: fixedregulator0 {
e415245c EBS	39	compatible = "regulator-fixed";
	40	regulator-name = "vbat";
	41	regulator-min-microvolt = <5000000>;
	42	regulator-max-microvolt = <5000000>;
	43	regulator-boot-on;
	44	};
0ae6f9ee	45
4c049a5b	46	vmmc: fixedregulator1 {
0ae6f9ee EBS	47	compatible = "regulator-fixed";
	48	regulator-name = "vmmc";
	49	regulator-min-microvolt = <3300000>;
	50	regulator-max-microvolt = <3300000>;
	51	};
e415245c EBS	52	};
	53
	54	&am33xx_pinmux {
	55	i2c0_pins: pinmux_i2c0_pins {
	56	pinctrl-single,pins = <
387fbf73 CQ	57	AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
387fbf73 CQ	58	AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
e415245c EBS	59	>;
	60	};
	61
	62	nandflash_pins: pinmux_nandflash_pins {
	63	pinctrl-single,pins = <
387fbf73 CQ	64	AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
	65	AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
	66	AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
	67	AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
	68	AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
	69	AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
	70	AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
	71	AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
	72	AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
	73	AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
	74	AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
	75	AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
	76	AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
	77	AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
	78	AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
e415245c EBS	79	>;
	80	};
	81
	82	uart0_pins: pinmux_uart0_pins {
	83	pinctrl-single,pins = <
387fbf73 CQ	84	AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
387fbf73 CQ	85	AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
e415245c EBS	86	>;
	87	};
	88
	89	leds_pins: pinmux_leds_pins {
	90	pinctrl-single,pins = <
387fbf73	91	AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
e415245c EBS	92	>;
	93	};
	94	};
	95
16c75a13 JH	96	&mac {
	97	status = "okay";
	98	};
	99
	100	&davinci_mdio {
	101	status = "okay";
d9312570 GS	102
	103	ethphy0: ethernet-phy@0 {
	104	reg = <0>;
	105	};
	106
	107	ethphy1: ethernet-phy@1 {
	108	reg = <1>;
	109	};
16c75a13 JH	110	};
16c75a13 JH	111
e415245c	112	&cpsw_emac0 {
d9312570	113	phy-handle = <&ethphy0>;
24faebd6	114	phy-mode = "rmii";
d9312570	115
e415245c EBS	116	};
	117
	118	&cpsw_emac1 {
d9312570	119	phy-handle = <&ethphy1>;
24faebd6 EBS	120	phy-mode = "rmii";
	121	};
	122
e415245c EBS	123	&elm {
	124	status = "okay";
	125	};
	126
	127	&gpmc {
	128	status = "okay";
	129	pinctrl-names = "default";
	130	pinctrl-0 = <&nandflash_pins>;
	131
e2c5eb78	132	ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
e415245c EBS	133
e415245c EBS	134	nand@0,0 {
03752148	135	compatible = "ti,omap2-nand";
e2c5eb78	136	reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
03752148 RQ	137	interrupt-parent = <&gpmc>;
	138	interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
	139	<1 IRQ_TYPE_NONE>; /* termcount */
63015d73	140	rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
e415245c EBS	141	nand-bus-width = <8>;
e415245c EBS	142	ti,nand-ecc-opt = "bch8";
e415245c EBS	143	gpmc,device-width = <1>;
	144	gpmc,sync-clk-ps = <0>;
	145	gpmc,cs-on-ns = <0>;
	146	gpmc,cs-rd-off-ns = <44>;
	147	gpmc,cs-wr-off-ns = <44>;
	148	gpmc,adv-on-ns = <6>;
	149	gpmc,adv-rd-off-ns = <34>;
	150	gpmc,adv-wr-off-ns = <44>;
	151	gpmc,we-on-ns = <0>;
	152	gpmc,we-off-ns = <40>;
	153	gpmc,oe-on-ns = <0>;
	154	gpmc,oe-off-ns = <54>;
	155	gpmc,access-ns = <64>;
	156	gpmc,rd-cycle-ns = <82>;
	157	gpmc,wr-cycle-ns = <82>;
e415245c EBS	158	gpmc,bus-turnaround-ns = <0>;
	159	gpmc,cycle2cycle-delay-ns = <0>;
	160	gpmc,clk-activation-ns = <0>;
e415245c EBS	161	gpmc,wr-access-ns = <40>;
	162	gpmc,wr-data-mux-bus-ns = <0>;
	163
	164	#address-cells = <1>;
	165	#size-cells = <1>;
42647f94	166	ti,elm-id = <&elm>;
e415245c EBS	167
	168	/* MTD partition table */
	169	partition@0 {
	170	label = "SPL";
	171	reg = <0x00000000 0x000080000>;
	172	};
	173
	174	partition@1 {
	175	label = "U-boot";
	176	reg = <0x00080000 0x001e0000>;
	177	};
	178
	179	partition@2 {
	180	label = "U-Boot Env";
	181	reg = <0x00260000 0x00020000>;
	182	};
	183
	184	partition@3 {
	185	label = "Kernel";
	186	reg = <0x00280000 0x00500000>;
	187	};
	188
	189	partition@4 {
	190	label = "File System";
	191	reg = <0x00780000 0x007880000>;
	192	};
	193	};
	194	};
	195
	196	&i2c0 {
	197	status = "okay";
	198	pinctrl-names = "default";
	199	pinctrl-0 = <&i2c0_pins>;
	200
	201	clock-frequency = <400000>;
	202
	203	tps: tps@2d {
	204	reg = <0x2d>;
	205	};
	206	};
	207
0ae6f9ee EBS	208	&mmc1 {
	209	status = "okay";
	210	vmmc-supply = <&vmmc>;
	211	bus-width = <4>;
	212	};
	213
e415245c EBS	214	&uart0 {
	215	status = "okay";
	216	pinctrl-names = "default";
	217	pinctrl-0 = <&uart0_pins>;
	218	};
	219
caa73370 EBS	220	&usb {
caa73370 EBS	221	status = "okay";
2cd1de1c	222	};
caa73370	223
2cd1de1c GM	224	&usb_ctrl_mod {
	225	status = "okay";
	226	};
caa73370	227
2cd1de1c GM	228	&usb0_phy {
	229	status = "okay";
	230	};
caa73370	231
2cd1de1c GM	232	&usb1_phy {
	233	status = "okay";
	234	};
caa73370	235
2cd1de1c GM	236	&usb0 {
	237	status = "okay";
	238	};
caa73370	239
2cd1de1c GM	240	&usb1 {
	241	status = "okay";
	242	dr_mode = "host";
	243	};
caa73370	244
2cd1de1c GM	245	&cppi41dma {
2cd1de1c GM	246	status = "okay";
caa73370 EBS	247	};
caa73370 EBS	248
e415245c EBS	249	#include "tps65910.dtsi"
	250
	251	&tps {
	252	vcc1-supply = <&vbat>;
	253	vcc2-supply = <&vbat>;
	254	vcc3-supply = <&vbat>;
	255	vcc4-supply = <&vbat>;
	256	vcc5-supply = <&vbat>;
	257	vcc6-supply = <&vbat>;
	258	vcc7-supply = <&vbat>;
	259	vccio-supply = <&vbat>;
	260
	261	regulators {
	262	vrtc_reg: regulator@0 {
	263	regulator-always-on;
	264	};
	265
	266	vio_reg: regulator@1 {
	267	regulator-always-on;
	268	};
	269
	270	vdd1_reg: regulator@2 {
	271	/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
	272	regulator-name = "vdd_mpu";
	273	regulator-min-microvolt = <912500>;
	274	regulator-max-microvolt = <1312500>;
	275	regulator-boot-on;
	276	regulator-always-on;
	277	};
	278
	279	vdd2_reg: regulator@3 {
	280	/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
	281	regulator-name = "vdd_core";
	282	regulator-min-microvolt = <912500>;
	283	regulator-max-microvolt = <1150000>;
	284	regulator-boot-on;
	285	regulator-always-on;
	286	};
	287
	288	vdd3_reg: regulator@4 {
	289	regulator-always-on;
	290	};
	291
	292	vdig1_reg: regulator@5 {
	293	regulator-always-on;
	294	};
	295
	296	vdig2_reg: regulator@6 {
	297	regulator-always-on;
	298	};
	299
	300	vpll_reg: regulator@7 {
	301	regulator-always-on;
	302	};
	303
	304	vdac_reg: regulator@8 {
	305	regulator-always-on;
	306	};
	307
	308	vaux1_reg: regulator@9 {
	309	regulator-always-on;
	310	};
	311
	312	vaux2_reg: regulator@10 {
313	regulator-always-on;
314	};
315
316	vaux33_reg: regulator@11 {
317	regulator-always-on;
318	};
319
320	vmmc_reg: regulator@12 {
321	regulator-always-on;
322	};
323	};
324	};
325