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e415245c EBS |
1 | /* |
2 | * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x | |
3 | * | |
4 | * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | ||
13 | #include "am33xx.dtsi" | |
14 | ||
15 | / { | |
16 | cpus { | |
17 | cpu@0 { | |
18 | cpu0-supply = <&vdd1_reg>; | |
19 | }; | |
20 | }; | |
21 | ||
22 | memory { | |
23 | device_type = "memory"; | |
24 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
25 | }; | |
26 | ||
27 | leds { | |
28 | pinctrl-names = "default"; | |
29 | pinctrl-0 = <&leds_pins>; | |
30 | ||
31 | compatible = "gpio-leds"; | |
32 | ||
33 | led@0 { | |
34 | label = "com:green:user"; | |
35 | gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | |
36 | default-state = "on"; | |
37 | }; | |
38 | }; | |
39 | ||
40 | vbat: fixedregulator@0 { | |
41 | compatible = "regulator-fixed"; | |
42 | regulator-name = "vbat"; | |
43 | regulator-min-microvolt = <5000000>; | |
44 | regulator-max-microvolt = <5000000>; | |
45 | regulator-boot-on; | |
46 | }; | |
47 | }; | |
48 | ||
49 | &am33xx_pinmux { | |
50 | i2c0_pins: pinmux_i2c0_pins { | |
51 | pinctrl-single,pins = < | |
52 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
53 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
54 | >; | |
55 | }; | |
56 | ||
57 | nandflash_pins: pinmux_nandflash_pins { | |
58 | pinctrl-single,pins = < | |
59 | 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ | |
60 | 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ | |
61 | 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ | |
62 | 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ | |
63 | 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ | |
64 | 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ | |
65 | 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ | |
66 | 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ | |
67 | 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ | |
68 | 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ | |
69 | 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ | |
70 | 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ | |
71 | 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ | |
72 | 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ | |
73 | 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ | |
74 | >; | |
75 | }; | |
76 | ||
77 | uart0_pins: pinmux_uart0_pins { | |
78 | pinctrl-single,pins = < | |
79 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
80 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
81 | >; | |
82 | }; | |
83 | ||
84 | leds_pins: pinmux_leds_pins { | |
85 | pinctrl-single,pins = < | |
86 | 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | |
87 | >; | |
88 | }; | |
89 | }; | |
90 | ||
91 | &cpsw_emac0 { | |
92 | phy_id = <&davinci_mdio>, <0>; | |
93 | }; | |
94 | ||
95 | &cpsw_emac1 { | |
96 | phy_id = <&davinci_mdio>, <1>; | |
97 | }; | |
98 | ||
99 | &elm { | |
100 | status = "okay"; | |
101 | }; | |
102 | ||
103 | &gpmc { | |
104 | status = "okay"; | |
105 | pinctrl-names = "default"; | |
106 | pinctrl-0 = <&nandflash_pins>; | |
107 | ||
108 | ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ | |
109 | ||
110 | nand@0,0 { | |
111 | reg = <0 0 0>; /* CS0, offset 0 */ | |
112 | nand-bus-width = <8>; | |
113 | ti,nand-ecc-opt = "bch8"; | |
114 | gpmc,device-nand = "true"; | |
115 | gpmc,device-width = <1>; | |
116 | gpmc,sync-clk-ps = <0>; | |
117 | gpmc,cs-on-ns = <0>; | |
118 | gpmc,cs-rd-off-ns = <44>; | |
119 | gpmc,cs-wr-off-ns = <44>; | |
120 | gpmc,adv-on-ns = <6>; | |
121 | gpmc,adv-rd-off-ns = <34>; | |
122 | gpmc,adv-wr-off-ns = <44>; | |
123 | gpmc,we-on-ns = <0>; | |
124 | gpmc,we-off-ns = <40>; | |
125 | gpmc,oe-on-ns = <0>; | |
126 | gpmc,oe-off-ns = <54>; | |
127 | gpmc,access-ns = <64>; | |
128 | gpmc,rd-cycle-ns = <82>; | |
129 | gpmc,wr-cycle-ns = <82>; | |
130 | gpmc,wait-on-read = "true"; | |
131 | gpmc,wait-on-write = "true"; | |
132 | gpmc,bus-turnaround-ns = <0>; | |
133 | gpmc,cycle2cycle-delay-ns = <0>; | |
134 | gpmc,clk-activation-ns = <0>; | |
135 | gpmc,wait-monitoring-ns = <0>; | |
136 | gpmc,wr-access-ns = <40>; | |
137 | gpmc,wr-data-mux-bus-ns = <0>; | |
138 | ||
139 | #address-cells = <1>; | |
140 | #size-cells = <1>; | |
141 | elm_id = <&elm>; | |
142 | ||
143 | /* MTD partition table */ | |
144 | partition@0 { | |
145 | label = "SPL"; | |
146 | reg = <0x00000000 0x000080000>; | |
147 | }; | |
148 | ||
149 | partition@1 { | |
150 | label = "U-boot"; | |
151 | reg = <0x00080000 0x001e0000>; | |
152 | }; | |
153 | ||
154 | partition@2 { | |
155 | label = "U-Boot Env"; | |
156 | reg = <0x00260000 0x00020000>; | |
157 | }; | |
158 | ||
159 | partition@3 { | |
160 | label = "Kernel"; | |
161 | reg = <0x00280000 0x00500000>; | |
162 | }; | |
163 | ||
164 | partition@4 { | |
165 | label = "File System"; | |
166 | reg = <0x00780000 0x007880000>; | |
167 | }; | |
168 | }; | |
169 | }; | |
170 | ||
171 | &i2c0 { | |
172 | status = "okay"; | |
173 | pinctrl-names = "default"; | |
174 | pinctrl-0 = <&i2c0_pins>; | |
175 | ||
176 | clock-frequency = <400000>; | |
177 | ||
178 | tps: tps@2d { | |
179 | reg = <0x2d>; | |
180 | }; | |
181 | }; | |
182 | ||
183 | &uart0 { | |
184 | status = "okay"; | |
185 | pinctrl-names = "default"; | |
186 | pinctrl-0 = <&uart0_pins>; | |
187 | }; | |
188 | ||
189 | #include "tps65910.dtsi" | |
190 | ||
191 | &tps { | |
192 | vcc1-supply = <&vbat>; | |
193 | vcc2-supply = <&vbat>; | |
194 | vcc3-supply = <&vbat>; | |
195 | vcc4-supply = <&vbat>; | |
196 | vcc5-supply = <&vbat>; | |
197 | vcc6-supply = <&vbat>; | |
198 | vcc7-supply = <&vbat>; | |
199 | vccio-supply = <&vbat>; | |
200 | ||
201 | regulators { | |
202 | vrtc_reg: regulator@0 { | |
203 | regulator-always-on; | |
204 | }; | |
205 | ||
206 | vio_reg: regulator@1 { | |
207 | regulator-always-on; | |
208 | }; | |
209 | ||
210 | vdd1_reg: regulator@2 { | |
211 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
212 | regulator-name = "vdd_mpu"; | |
213 | regulator-min-microvolt = <912500>; | |
214 | regulator-max-microvolt = <1312500>; | |
215 | regulator-boot-on; | |
216 | regulator-always-on; | |
217 | }; | |
218 | ||
219 | vdd2_reg: regulator@3 { | |
220 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
221 | regulator-name = "vdd_core"; | |
222 | regulator-min-microvolt = <912500>; | |
223 | regulator-max-microvolt = <1150000>; | |
224 | regulator-boot-on; | |
225 | regulator-always-on; | |
226 | }; | |
227 | ||
228 | vdd3_reg: regulator@4 { | |
229 | regulator-always-on; | |
230 | }; | |
231 | ||
232 | vdig1_reg: regulator@5 { | |
233 | regulator-always-on; | |
234 | }; | |
235 | ||
236 | vdig2_reg: regulator@6 { | |
237 | regulator-always-on; | |
238 | }; | |
239 | ||
240 | vpll_reg: regulator@7 { | |
241 | regulator-always-on; | |
242 | }; | |
243 | ||
244 | vdac_reg: regulator@8 { | |
245 | regulator-always-on; | |
246 | }; | |
247 | ||
248 | vaux1_reg: regulator@9 { | |
249 | regulator-always-on; | |
250 | }; | |
251 | ||
252 | vaux2_reg: regulator@10 { | |
253 | regulator-always-on; | |
254 | }; | |
255 | ||
256 | vaux33_reg: regulator@11 { | |
257 | regulator-always-on; | |
258 | }; | |
259 | ||
260 | vmmc_reg: regulator@12 { | |
261 | regulator-always-on; | |
262 | }; | |
263 | }; | |
264 | }; | |
265 |