[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / am335x-sbc-t335.dts

/*
 * am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
 *
 * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include "am335x-cm-t335.dts"

/ {
	model = "CompuLab CM-T335 on SB-T335";
	compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";

	/* DRM display driver */
	panel {
		compatible = "ti,tilcdc,panel";
		status = "okay";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&lcd_pins_default>;
		pinctrl-1 = <&lcd_pins_sleep>;

		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings {
			/* Timing selection performed by U-Boot */
			timing0: lcd {/* 800x480p62 */
				clock-frequency = <30000000>;
				hactive = <800>;
				vactive = <480>;
				hfront-porch = <39>;
				hback-porch = <39>;
				hsync-len = <47>;
				vback-porch = <29>;
				vfront-porch = <13>;
				vsync-len = <2>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
			timing1: dvi { /* 1024x768p60 */
				clock-frequency = <65000000>;
				hactive = <1024>;
				hfront-porch = <24>;
				hback-porch = <160>;
				hsync-len = <136>;
				vactive = <768>;
				vfront-porch = <3>;
				vback-porch = <29>;
				vsync-len = <6>;
				hsync-active = <0>;
				vsync-active = <0>;
			};
		};
	};
};

&am33xx_pinmux {
	/* Display */
	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
			/* gpmc_ad8.lcd_data23 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad9.lcd_data22 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad10.lcd_data21 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad11.lcd_data20 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad12.lcd_data19 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad13.lcd_data18 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad14.lcd_data17 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)
			/* gpmc_ad15.lcd_data16 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			/* gpmc_ad8.lcd_data23 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad9.lcd_data22 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad10.lcd_data21 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad11.lcd_data20 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad12.lcd_data19 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad13.lcd_data18 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad14.lcd_data17 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
			/* gpmc_ad15.lcd_data16 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
		>;
	};
};

&i2c0 {
	/* GPIO extender */
	gpio_ext: pca9555@26 {
		compatible = "nxp,pca9555";
		pinctrl-names = "default";
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x26>;
		dvi_ena {
			gpio-hog;
			gpios = <13 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "dvi-enable";
		};
		lcd_ena {
			gpio-hog;
			gpios = <11 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "lcd-enable";
		};
	};
};

/* Display */
&lcdc {
	status = "okay";
};
Commit	Line	Data
c6135a6f UM	1	/*
	2	* am335x-sbc-t335.dts - Device Tree file for Compulab SBC-T335
	3	*
	4	* Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include "am335x-cm-t335.dts"
	12
	13	/ {
	14	model = "CompuLab CM-T335 on SB-T335";
	15	compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx";
3089e40e UM	16
	17	/* DRM display driver */
	18	panel {
	19	compatible = "ti,tilcdc,panel";
	20	status = "okay";
	21	pinctrl-names = "default", "sleep";
	22	pinctrl-0 = <&lcd_pins_default>;
	23	pinctrl-1 = <&lcd_pins_sleep>;
	24
	25	panel-info {
	26	ac-bias = <255>;
	27	ac-bias-intrpt = <0>;
	28	dma-burst-sz = <16>;
	29	bpp = <32>;
	30	fdd = <0x80>;
	31	sync-edge = <0>;
	32	sync-ctrl = <1>;
	33	raster-order = <0>;
	34	fifo-th = <0>;
	35	};
	36	display-timings {
	37	/* Timing selection performed by U-Boot */
	38	timing0: lcd {/* 800x480p62 */
	39	clock-frequency = <30000000>;
	40	hactive = <800>;
	41	vactive = <480>;
	42	hfront-porch = <39>;
	43	hback-porch = <39>;
	44	hsync-len = <47>;
	45	vback-porch = <29>;
	46	vfront-porch = <13>;
	47	vsync-len = <2>;
	48	hsync-active = <1>;
	49	vsync-active = <1>;
	50	};
	51	timing1: dvi { /* 1024x768p60 */
	52	clock-frequency = <65000000>;
	53	hactive = <1024>;
	54	hfront-porch = <24>;
	55	hback-porch = <160>;
	56	hsync-len = <136>;
	57	vactive = <768>;
	58	vfront-porch = <3>;
	59	vback-porch = <29>;
	60	vsync-len = <6>;
	61	hsync-active = <0>;
	62	vsync-active = <0>;
	63	};
	64	};
	65	};
	66	};
	67
	68	&am33xx_pinmux {
	69	/* Display */
	70	lcd_pins_default: lcd_pins_default {
	71	pinctrl-single,pins = <
	72	/* gpmc_ad8.lcd_data23 */
631493a1	73	AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)
3089e40e	74	/* gpmc_ad9.lcd_data22 */
631493a1	75	AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)
3089e40e	76	/* gpmc_ad10.lcd_data21 */
631493a1	77	AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)
3089e40e	78	/* gpmc_ad11.lcd_data20 */
631493a1	79	AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)
3089e40e	80	/* gpmc_ad12.lcd_data19 */
631493a1	81	AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)
3089e40e	82	/* gpmc_ad13.lcd_data18 */
631493a1	83	AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)
3089e40e	84	/* gpmc_ad14.lcd_data17 */
631493a1	85	AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)
3089e40e	86	/* gpmc_ad15.lcd_data16 */
631493a1 CQ	87	AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)
	88	AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
	89	AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
	90	AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
	91	AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
	92	AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
	93	AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
	94	AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
	95	AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
	96	AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
	97	AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
	98	AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
	99	AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
	100	AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
	101	AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
	102	AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
	103	AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
	104	AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
	105	AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
	106	AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
	107	AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
3089e40e UM	108	>;
	109	};
	110
	111	lcd_pins_sleep: lcd_pins_sleep {
	112	pinctrl-single,pins = <
	113	/* gpmc_ad8.lcd_data23 */
631493a1	114	AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	115	/* gpmc_ad9.lcd_data22 */
631493a1	116	AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	117	/* gpmc_ad10.lcd_data21 */
631493a1	118	AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	119	/* gpmc_ad11.lcd_data20 */
631493a1	120	AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	121	/* gpmc_ad12.lcd_data19 */
631493a1	122	AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	123	/* gpmc_ad13.lcd_data18 */
631493a1	124	AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	125	/* gpmc_ad14.lcd_data17 */
631493a1	126	AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e	127	/* gpmc_ad15.lcd_data16 */
631493a1 CQ	128	AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
	129	AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
	130	AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
	131	AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
	132	AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
	133	AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
	134	AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
	135	AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
	136	AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
	137	AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
	138	AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
	139	AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
	140	AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
	141	AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
	142	AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
	143	AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
	144	AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
	145	AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
	146	AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
	147	AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
	148	AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
3089e40e UM	149	>;
3089e40e UM	150	};
c6135a6f	151	};
98e5d898 UM	152
	153	&i2c0 {
	154	/* GPIO extender */
	155	gpio_ext: pca9555@26 {
	156	compatible = "nxp,pca9555";
	157	pinctrl-names = "default";
	158	gpio-controller;
	159	#gpio-cells = <2>;
	160	reg = <0x26>;
3089e40e UM	161	dvi_ena {
	162	gpio-hog;
	163	gpios = <13 GPIO_ACTIVE_HIGH>;
	164	output-high;
	165	line-name = "dvi-enable";
	166	};
	167	lcd_ena {
	168	gpio-hog;
	169	gpios = <11 GPIO_ACTIVE_HIGH>;
	170	output-high;
	171	line-name = "lcd-enable";
	172	};
98e5d898 UM	173	};
98e5d898 UM	174	};
3089e40e UM	175
	176	/* Display */
	177	&lcdc {
	178	status = "okay";
	179	};