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Commit | Line | Data |
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5fc0b42a AC |
1 | /* |
2 | * Device Tree Source for AM33XX SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
e94233c2 | 13 | |
5fc0b42a AC |
14 | / { |
15 | compatible = "ti,am33xx"; | |
4c94ac29 | 16 | interrupt-parent = <&intc>; |
f8bf0161 JMC |
17 | #address-cells = <1>; |
18 | #size-cells = <1>; | |
1d8d6d3f | 19 | chosen { }; |
5fc0b42a AC |
20 | |
21 | aliases { | |
6a968678 NM |
22 | i2c0 = &i2c0; |
23 | i2c1 = &i2c1; | |
24 | i2c2 = &i2c2; | |
dde3b0d6 VH |
25 | serial0 = &uart0; |
26 | serial1 = &uart1; | |
27 | serial2 = &uart2; | |
28 | serial3 = &uart3; | |
29 | serial4 = &uart4; | |
30 | serial5 = &uart5; | |
7a57ee87 AC |
31 | d_can0 = &dcan0; |
32 | d_can1 = &dcan1; | |
97238b35 SAS |
33 | usb0 = &usb0; |
34 | usb1 = &usb1; | |
35 | phy0 = &usb0_phy; | |
36 | phy1 = &usb1_phy; | |
8170056d DM |
37 | ethernet0 = &cpsw_emac0; |
38 | ethernet1 = &cpsw_emac1; | |
5fc0b42a AC |
39 | }; |
40 | ||
41 | cpus { | |
2e0d513f LP |
42 | #address-cells = <1>; |
43 | #size-cells = <0>; | |
5fc0b42a AC |
44 | cpu@0 { |
45 | compatible = "arm,cortex-a8"; | |
2e0d513f LP |
46 | device_type = "cpu"; |
47 | reg = <0>; | |
efeedcf2 | 48 | |
0f416d13 DG |
49 | /* |
50 | * To consider voltage drop between PMIC and SoC, | |
51 | * tolerance value is reduced to 2% from 4% and | |
52 | * voltage value is increased as a precaution. | |
53 | */ | |
54 | operating-points = < | |
55 | /* kHz uV */ | |
56 | 720000 1285000 | |
57 | 600000 1225000 | |
58 | 500000 1125000 | |
59 | 275000 1125000 | |
60 | >; | |
61 | voltage-tolerance = <2>; /* 2 percentage */ | |
8d766fa2 NM |
62 | |
63 | clocks = <&dpll_mpu_ck>; | |
64 | clock-names = "cpu"; | |
65 | ||
efeedcf2 | 66 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
5fc0b42a AC |
67 | }; |
68 | }; | |
69 | ||
6797cdbe AB |
70 | pmu { |
71 | compatible = "arm,cortex-a8-pmu"; | |
72 | interrupts = <3>; | |
73 | }; | |
74 | ||
5fc0b42a | 75 | /* |
5c5be9db | 76 | * The soc node represents the soc top level view. It is used for IPs |
5fc0b42a AC |
77 | * that are not memory mapped in the MPU view or for the MPU itself. |
78 | */ | |
79 | soc { | |
80 | compatible = "ti,omap-infra"; | |
81 | mpu { | |
82 | compatible = "ti,omap3-mpu"; | |
83 | ti,hwmods = "mpu"; | |
84 | }; | |
85 | }; | |
86 | ||
87 | /* | |
88 | * XXX: Use a flat representation of the AM33XX interconnect. | |
b7ab524b GU |
89 | * The real AM33XX interconnect network is quite complex. Since |
90 | * it will not bring real advantage to represent that in DT | |
5fc0b42a AC |
91 | * for the moment, just use a fake OCP bus entry to represent |
92 | * the whole bus hierarchy. | |
93 | */ | |
94 | ocp { | |
95 | compatible = "simple-bus"; | |
96 | #address-cells = <1>; | |
97 | #size-cells = <1>; | |
98 | ranges; | |
99 | ti,hwmods = "l3_main"; | |
100 | ||
e3bc5358 TK |
101 | l4_wkup: l4_wkup@44c00000 { |
102 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
103 | #address-cells = <1>; | |
104 | #size-cells = <1>; | |
105 | ranges = <0 0x44c00000 0x280000>; | |
ea291c98 | 106 | |
d129be27 SA |
107 | wkup_m3: wkup_m3@100000 { |
108 | compatible = "ti,am3352-wkup-m3"; | |
109 | reg = <0x100000 0x4000>, | |
110 | <0x180000 0x2000>; | |
111 | reg-names = "umem", "dmem"; | |
112 | ti,hwmods = "wkup_m3"; | |
113 | ti,pm-firmware = "am335x-pm-firmware.elf"; | |
114 | }; | |
115 | ||
e3bc5358 TK |
116 | prcm: prcm@200000 { |
117 | compatible = "ti,am3-prcm"; | |
118 | reg = <0x200000 0x4000>; | |
ea291c98 | 119 | |
e3bc5358 TK |
120 | prcm_clocks: clocks { |
121 | #address-cells = <1>; | |
122 | #size-cells = <0>; | |
123 | }; | |
ea291c98 | 124 | |
e3bc5358 TK |
125 | prcm_clockdomains: clockdomains { |
126 | }; | |
ea291c98 TK |
127 | }; |
128 | ||
e3bc5358 TK |
129 | scm: scm@210000 { |
130 | compatible = "ti,am3-scm", "simple-bus"; | |
131 | reg = <0x210000 0x2000>; | |
132 | #address-cells = <1>; | |
133 | #size-cells = <1>; | |
be76fd31 | 134 | #pinctrl-cells = <1>; |
e3bc5358 TK |
135 | ranges = <0 0x210000 0x2000>; |
136 | ||
137 | am33xx_pinmux: pinmux@800 { | |
138 | compatible = "pinctrl-single"; | |
139 | reg = <0x800 0x238>; | |
140 | #address-cells = <1>; | |
141 | #size-cells = <0>; | |
be76fd31 | 142 | #pinctrl-cells = <1>; |
e3bc5358 TK |
143 | pinctrl-single,register-width = <32>; |
144 | pinctrl-single,function-mask = <0x7f>; | |
145 | }; | |
146 | ||
147 | scm_conf: scm_conf@0 { | |
148 | compatible = "syscon"; | |
149 | reg = <0x0 0x800>; | |
150 | #address-cells = <1>; | |
151 | #size-cells = <1>; | |
152 | ||
153 | scm_clocks: clocks { | |
154 | #address-cells = <1>; | |
155 | #size-cells = <0>; | |
156 | }; | |
157 | }; | |
158 | ||
99937129 SA |
159 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
160 | compatible = "ti,am3352-wkup-m3-ipc"; | |
161 | reg = <0x1324 0x24>; | |
162 | interrupts = <78>; | |
163 | ti,rproc = <&wkup_m3>; | |
164 | mboxes = <&mailbox &mbox_wkupm3>; | |
165 | }; | |
166 | ||
b5e50906 PU |
167 | edma_xbar: dma-router@f90 { |
168 | compatible = "ti,am335x-edma-crossbar"; | |
169 | reg = <0xf90 0x40>; | |
170 | #dma-cells = <3>; | |
171 | dma-requests = <32>; | |
172 | dma-masters = <&edma>; | |
173 | }; | |
174 | ||
e3bc5358 TK |
175 | scm_clockdomains: clockdomains { |
176 | }; | |
ea291c98 TK |
177 | }; |
178 | }; | |
179 | ||
5fc0b42a | 180 | intc: interrupt-controller@48200000 { |
cab82b76 | 181 | compatible = "ti,am33xx-intc"; |
5fc0b42a AC |
182 | interrupt-controller; |
183 | #interrupt-cells = <1>; | |
5fc0b42a AC |
184 | reg = <0x48200000 0x1000>; |
185 | }; | |
186 | ||
505975d3 | 187 | edma: edma@49000000 { |
b5e50906 PU |
188 | compatible = "ti,edma3-tpcc"; |
189 | ti,hwmods = "tpcc"; | |
190 | reg = <0x49000000 0x10000>; | |
191 | reg-names = "edma3_cc"; | |
505975d3 | 192 | interrupts = <12 13 14>; |
a5206553 | 193 | interrupt-names = "edma3_ccint", "edma3_mperr", |
b5e50906 PU |
194 | "edma3_ccerrint"; |
195 | dma-requests = <64>; | |
196 | #dma-cells = <2>; | |
197 | ||
198 | ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, | |
199 | <&edma_tptc2 0>; | |
200 | ||
201 | ti,edma-memcpy-channels = <20 21>; | |
202 | }; | |
203 | ||
204 | edma_tptc0: tptc@49800000 { | |
205 | compatible = "ti,edma3-tptc"; | |
206 | ti,hwmods = "tptc0"; | |
207 | reg = <0x49800000 0x100000>; | |
208 | interrupts = <112>; | |
209 | interrupt-names = "edma3_tcerrint"; | |
210 | }; | |
211 | ||
212 | edma_tptc1: tptc@49900000 { | |
213 | compatible = "ti,edma3-tptc"; | |
214 | ti,hwmods = "tptc1"; | |
215 | reg = <0x49900000 0x100000>; | |
216 | interrupts = <113>; | |
217 | interrupt-names = "edma3_tcerrint"; | |
218 | }; | |
219 | ||
220 | edma_tptc2: tptc@49a00000 { | |
221 | compatible = "ti,edma3-tptc"; | |
222 | ti,hwmods = "tptc2"; | |
223 | reg = <0x49a00000 0x100000>; | |
224 | interrupts = <114>; | |
225 | interrupt-names = "edma3_tcerrint"; | |
505975d3 MP |
226 | }; |
227 | ||
b918e2c0 | 228 | gpio0: gpio@44e07000 { |
5fc0b42a AC |
229 | compatible = "ti,omap4-gpio"; |
230 | ti,hwmods = "gpio1"; | |
231 | gpio-controller; | |
232 | #gpio-cells = <2>; | |
233 | interrupt-controller; | |
5eac0eb7 | 234 | #interrupt-cells = <2>; |
4462b31c | 235 | reg = <0x44e07000 0x1000>; |
4462b31c | 236 | interrupts = <96>; |
5fc0b42a AC |
237 | }; |
238 | ||
b918e2c0 | 239 | gpio1: gpio@4804c000 { |
5fc0b42a AC |
240 | compatible = "ti,omap4-gpio"; |
241 | ti,hwmods = "gpio2"; | |
242 | gpio-controller; | |
243 | #gpio-cells = <2>; | |
244 | interrupt-controller; | |
5eac0eb7 | 245 | #interrupt-cells = <2>; |
4462b31c | 246 | reg = <0x4804c000 0x1000>; |
4462b31c | 247 | interrupts = <98>; |
5fc0b42a AC |
248 | }; |
249 | ||
b918e2c0 | 250 | gpio2: gpio@481ac000 { |
5fc0b42a AC |
251 | compatible = "ti,omap4-gpio"; |
252 | ti,hwmods = "gpio3"; | |
253 | gpio-controller; | |
254 | #gpio-cells = <2>; | |
255 | interrupt-controller; | |
5eac0eb7 | 256 | #interrupt-cells = <2>; |
4462b31c | 257 | reg = <0x481ac000 0x1000>; |
4462b31c | 258 | interrupts = <32>; |
5fc0b42a AC |
259 | }; |
260 | ||
b918e2c0 | 261 | gpio3: gpio@481ae000 { |
5fc0b42a AC |
262 | compatible = "ti,omap4-gpio"; |
263 | ti,hwmods = "gpio4"; | |
264 | gpio-controller; | |
265 | #gpio-cells = <2>; | |
266 | interrupt-controller; | |
5eac0eb7 | 267 | #interrupt-cells = <2>; |
4462b31c | 268 | reg = <0x481ae000 0x1000>; |
4462b31c | 269 | interrupts = <62>; |
5fc0b42a AC |
270 | }; |
271 | ||
dde3b0d6 | 272 | uart0: serial@44e09000 { |
4fcdff9b | 273 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
274 | ti,hwmods = "uart1"; |
275 | clock-frequency = <48000000>; | |
4462b31c | 276 | reg = <0x44e09000 0x2000>; |
4462b31c | 277 | interrupts = <72>; |
53d91034 | 278 | status = "disabled"; |
b5e50906 | 279 | dmas = <&edma 26 0>, <&edma 27 0>; |
13fd3d57 | 280 | dma-names = "tx", "rx"; |
5fc0b42a AC |
281 | }; |
282 | ||
dde3b0d6 | 283 | uart1: serial@48022000 { |
4fcdff9b | 284 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
285 | ti,hwmods = "uart2"; |
286 | clock-frequency = <48000000>; | |
4462b31c | 287 | reg = <0x48022000 0x2000>; |
4462b31c | 288 | interrupts = <73>; |
53d91034 | 289 | status = "disabled"; |
b5e50906 | 290 | dmas = <&edma 28 0>, <&edma 29 0>; |
13fd3d57 | 291 | dma-names = "tx", "rx"; |
5fc0b42a AC |
292 | }; |
293 | ||
dde3b0d6 | 294 | uart2: serial@48024000 { |
4fcdff9b | 295 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
296 | ti,hwmods = "uart3"; |
297 | clock-frequency = <48000000>; | |
4462b31c | 298 | reg = <0x48024000 0x2000>; |
4462b31c | 299 | interrupts = <74>; |
53d91034 | 300 | status = "disabled"; |
b5e50906 | 301 | dmas = <&edma 30 0>, <&edma 31 0>; |
13fd3d57 | 302 | dma-names = "tx", "rx"; |
5fc0b42a AC |
303 | }; |
304 | ||
dde3b0d6 | 305 | uart3: serial@481a6000 { |
4fcdff9b | 306 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
307 | ti,hwmods = "uart4"; |
308 | clock-frequency = <48000000>; | |
4462b31c | 309 | reg = <0x481a6000 0x2000>; |
4462b31c | 310 | interrupts = <44>; |
53d91034 | 311 | status = "disabled"; |
5fc0b42a AC |
312 | }; |
313 | ||
dde3b0d6 | 314 | uart4: serial@481a8000 { |
4fcdff9b | 315 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
316 | ti,hwmods = "uart5"; |
317 | clock-frequency = <48000000>; | |
4462b31c | 318 | reg = <0x481a8000 0x2000>; |
4462b31c | 319 | interrupts = <45>; |
53d91034 | 320 | status = "disabled"; |
5fc0b42a AC |
321 | }; |
322 | ||
dde3b0d6 | 323 | uart5: serial@481aa000 { |
4fcdff9b | 324 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
325 | ti,hwmods = "uart6"; |
326 | clock-frequency = <48000000>; | |
4462b31c | 327 | reg = <0x481aa000 0x2000>; |
4462b31c | 328 | interrupts = <46>; |
53d91034 | 329 | status = "disabled"; |
5fc0b42a AC |
330 | }; |
331 | ||
b918e2c0 | 332 | i2c0: i2c@44e0b000 { |
5fc0b42a AC |
333 | compatible = "ti,omap4-i2c"; |
334 | #address-cells = <1>; | |
335 | #size-cells = <0>; | |
336 | ti,hwmods = "i2c1"; | |
4462b31c | 337 | reg = <0x44e0b000 0x1000>; |
4462b31c | 338 | interrupts = <70>; |
53d91034 | 339 | status = "disabled"; |
5fc0b42a AC |
340 | }; |
341 | ||
b918e2c0 | 342 | i2c1: i2c@4802a000 { |
5fc0b42a AC |
343 | compatible = "ti,omap4-i2c"; |
344 | #address-cells = <1>; | |
345 | #size-cells = <0>; | |
346 | ti,hwmods = "i2c2"; | |
4462b31c | 347 | reg = <0x4802a000 0x1000>; |
4462b31c | 348 | interrupts = <71>; |
53d91034 | 349 | status = "disabled"; |
5fc0b42a AC |
350 | }; |
351 | ||
b918e2c0 | 352 | i2c2: i2c@4819c000 { |
5fc0b42a AC |
353 | compatible = "ti,omap4-i2c"; |
354 | #address-cells = <1>; | |
355 | #size-cells = <0>; | |
356 | ti,hwmods = "i2c3"; | |
4462b31c | 357 | reg = <0x4819c000 0x1000>; |
4462b31c | 358 | interrupts = <30>; |
53d91034 | 359 | status = "disabled"; |
5fc0b42a | 360 | }; |
5f789ebc | 361 | |
55b4452b MP |
362 | mmc1: mmc@48060000 { |
363 | compatible = "ti,omap4-hsmmc"; | |
364 | ti,hwmods = "mmc1"; | |
365 | ti,dual-volt; | |
366 | ti,needs-special-reset; | |
367 | ti,needs-special-hs-handling; | |
b5e50906 PU |
368 | dmas = <&edma_xbar 24 0 0 |
369 | &edma_xbar 25 0 0>; | |
55b4452b MP |
370 | dma-names = "tx", "rx"; |
371 | interrupts = <64>; | |
372 | interrupt-parent = <&intc>; | |
373 | reg = <0x48060000 0x1000>; | |
374 | status = "disabled"; | |
375 | }; | |
376 | ||
377 | mmc2: mmc@481d8000 { | |
378 | compatible = "ti,omap4-hsmmc"; | |
379 | ti,hwmods = "mmc2"; | |
380 | ti,needs-special-reset; | |
b5e50906 PU |
381 | dmas = <&edma 2 0 |
382 | &edma 3 0>; | |
55b4452b MP |
383 | dma-names = "tx", "rx"; |
384 | interrupts = <28>; | |
385 | interrupt-parent = <&intc>; | |
386 | reg = <0x481d8000 0x1000>; | |
387 | status = "disabled"; | |
388 | }; | |
389 | ||
390 | mmc3: mmc@47810000 { | |
391 | compatible = "ti,omap4-hsmmc"; | |
392 | ti,hwmods = "mmc3"; | |
393 | ti,needs-special-reset; | |
394 | interrupts = <29>; | |
395 | interrupt-parent = <&intc>; | |
396 | reg = <0x47810000 0x1000>; | |
397 | status = "disabled"; | |
398 | }; | |
399 | ||
d4cbe80d SA |
400 | hwspinlock: spinlock@480ca000 { |
401 | compatible = "ti,omap4-hwspinlock"; | |
402 | reg = <0x480ca000 0x1000>; | |
403 | ti,hwmods = "spinlock"; | |
34054213 | 404 | #hwlock-cells = <1>; |
d4cbe80d SA |
405 | }; |
406 | ||
5f789ebc AM |
407 | wdt2: wdt@44e35000 { |
408 | compatible = "ti,omap3-wdt"; | |
409 | ti,hwmods = "wd_timer2"; | |
4462b31c | 410 | reg = <0x44e35000 0x1000>; |
4462b31c | 411 | interrupts = <91>; |
5f789ebc | 412 | }; |
059b185d | 413 | |
e23aabc6 RQ |
414 | dcan0: can@481cc000 { |
415 | compatible = "ti,am3352-d_can"; | |
059b185d | 416 | ti,hwmods = "d_can0"; |
e23aabc6 RQ |
417 | reg = <0x481cc000 0x2000>; |
418 | clocks = <&dcan0_fck>; | |
419 | clock-names = "fck"; | |
e3bc5358 | 420 | syscon-raminit = <&scm_conf 0x644 0>; |
059b185d | 421 | interrupts = <52>; |
059b185d AC |
422 | status = "disabled"; |
423 | }; | |
424 | ||
e23aabc6 RQ |
425 | dcan1: can@481d0000 { |
426 | compatible = "ti,am3352-d_can"; | |
059b185d | 427 | ti,hwmods = "d_can1"; |
e23aabc6 RQ |
428 | reg = <0x481d0000 0x2000>; |
429 | clocks = <&dcan1_fck>; | |
430 | clock-names = "fck"; | |
e3bc5358 | 431 | syscon-raminit = <&scm_conf 0x644 1>; |
059b185d | 432 | interrupts = <55>; |
059b185d AC |
433 | status = "disabled"; |
434 | }; | |
fab8ad0b | 435 | |
40242301 SA |
436 | mailbox: mailbox@480C8000 { |
437 | compatible = "ti,omap4-mailbox"; | |
438 | reg = <0x480C8000 0x200>; | |
439 | interrupts = <77>; | |
440 | ti,hwmods = "mailbox"; | |
24df0453 | 441 | #mbox-cells = <1>; |
40242301 SA |
442 | ti,mbox-num-users = <4>; |
443 | ti,mbox-num-fifos = <8>; | |
d27704d1 | 444 | mbox_wkupm3: wkup_m3 { |
2800971f | 445 | ti,mbox-send-noirq; |
d27704d1 SA |
446 | ti,mbox-tx = <0 0 0>; |
447 | ti,mbox-rx = <0 0 3>; | |
448 | }; | |
40242301 SA |
449 | }; |
450 | ||
fab8ad0b | 451 | timer1: timer@44e31000 { |
002e1ec5 | 452 | compatible = "ti,am335x-timer-1ms"; |
fab8ad0b JH |
453 | reg = <0x44e31000 0x400>; |
454 | interrupts = <67>; | |
455 | ti,hwmods = "timer1"; | |
456 | ti,timer-alwon; | |
457 | }; | |
458 | ||
459 | timer2: timer@48040000 { | |
002e1ec5 | 460 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
461 | reg = <0x48040000 0x400>; |
462 | interrupts = <68>; | |
463 | ti,hwmods = "timer2"; | |
464 | }; | |
465 | ||
466 | timer3: timer@48042000 { | |
002e1ec5 | 467 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
468 | reg = <0x48042000 0x400>; |
469 | interrupts = <69>; | |
470 | ti,hwmods = "timer3"; | |
471 | }; | |
472 | ||
473 | timer4: timer@48044000 { | |
002e1ec5 | 474 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
475 | reg = <0x48044000 0x400>; |
476 | interrupts = <92>; | |
477 | ti,hwmods = "timer4"; | |
478 | ti,timer-pwm; | |
479 | }; | |
480 | ||
481 | timer5: timer@48046000 { | |
002e1ec5 | 482 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
483 | reg = <0x48046000 0x400>; |
484 | interrupts = <93>; | |
485 | ti,hwmods = "timer5"; | |
486 | ti,timer-pwm; | |
487 | }; | |
488 | ||
489 | timer6: timer@48048000 { | |
002e1ec5 | 490 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
491 | reg = <0x48048000 0x400>; |
492 | interrupts = <94>; | |
493 | ti,hwmods = "timer6"; | |
494 | ti,timer-pwm; | |
495 | }; | |
496 | ||
497 | timer7: timer@4804a000 { | |
002e1ec5 | 498 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
499 | reg = <0x4804a000 0x400>; |
500 | interrupts = <95>; | |
501 | ti,hwmods = "timer7"; | |
502 | ti,timer-pwm; | |
503 | }; | |
0d935c16 | 504 | |
ccd8b9e0 | 505 | rtc: rtc@44e3e000 { |
6ac7b4a2 | 506 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
0d935c16 AM |
507 | reg = <0x44e3e000 0x1000>; |
508 | interrupts = <75 | |
509 | 76>; | |
510 | ti,hwmods = "rtc"; | |
17fad5f3 K |
511 | clocks = <&clkdiv32k_ick>; |
512 | clock-names = "int-clk"; | |
0d935c16 | 513 | }; |
9fd3c748 PA |
514 | |
515 | spi0: spi@48030000 { | |
516 | compatible = "ti,omap4-mcspi"; | |
517 | #address-cells = <1>; | |
518 | #size-cells = <0>; | |
519 | reg = <0x48030000 0x400>; | |
7b3754c6 | 520 | interrupts = <65>; |
9fd3c748 PA |
521 | ti,spi-num-cs = <2>; |
522 | ti,hwmods = "spi0"; | |
b5e50906 PU |
523 | dmas = <&edma 16 0 |
524 | &edma 17 0 | |
525 | &edma 18 0 | |
526 | &edma 19 0>; | |
f5e2f807 | 527 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
528 | status = "disabled"; |
529 | }; | |
530 | ||
531 | spi1: spi@481a0000 { | |
532 | compatible = "ti,omap4-mcspi"; | |
533 | #address-cells = <1>; | |
534 | #size-cells = <0>; | |
535 | reg = <0x481a0000 0x400>; | |
7b3754c6 | 536 | interrupts = <125>; |
9fd3c748 PA |
537 | ti,spi-num-cs = <2>; |
538 | ti,hwmods = "spi1"; | |
b5e50906 PU |
539 | dmas = <&edma 42 0 |
540 | &edma 43 0 | |
541 | &edma 44 0 | |
542 | &edma 45 0>; | |
f5e2f807 | 543 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
544 | status = "disabled"; |
545 | }; | |
35b47fbb | 546 | |
97238b35 SAS |
547 | usb: usb@47400000 { |
548 | compatible = "ti,am33xx-usb"; | |
549 | reg = <0x47400000 0x1000>; | |
550 | ranges; | |
551 | #address-cells = <1>; | |
552 | #size-cells = <1>; | |
35b47fbb | 553 | ti,hwmods = "usb_otg_hs"; |
97238b35 SAS |
554 | status = "disabled"; |
555 | ||
8abcdd68 | 556 | usb_ctrl_mod: control@44e10620 { |
97238b35 SAS |
557 | compatible = "ti,am335x-usb-ctrl-module"; |
558 | reg = <0x44e10620 0x10 | |
559 | 0x44e10648 0x4>; | |
560 | reg-names = "phy_ctrl", "wakeup"; | |
561 | status = "disabled"; | |
562 | }; | |
563 | ||
c031a7d4 | 564 | usb0_phy: usb-phy@47401300 { |
97238b35 SAS |
565 | compatible = "ti,am335x-usb-phy"; |
566 | reg = <0x47401300 0x100>; | |
567 | reg-names = "phy"; | |
568 | status = "disabled"; | |
e7243b76 | 569 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
570 | }; |
571 | ||
572 | usb0: usb@47401000 { | |
573 | compatible = "ti,musb-am33xx"; | |
97238b35 | 574 | status = "disabled"; |
c031a7d4 SAS |
575 | reg = <0x47401400 0x400 |
576 | 0x47401000 0x200>; | |
577 | reg-names = "mc", "control"; | |
578 | ||
579 | interrupts = <18>; | |
580 | interrupt-names = "mc"; | |
581 | dr_mode = "otg"; | |
582 | mentor,multipoint = <1>; | |
583 | mentor,num-eps = <16>; | |
584 | mentor,ram-bits = <12>; | |
585 | mentor,power = <500>; | |
586 | phys = <&usb0_phy>; | |
9b3452d1 SAS |
587 | |
588 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
589 | &cppi41dma 2 0 &cppi41dma 3 0 | |
590 | &cppi41dma 4 0 &cppi41dma 5 0 | |
591 | &cppi41dma 6 0 &cppi41dma 7 0 | |
592 | &cppi41dma 8 0 &cppi41dma 9 0 | |
593 | &cppi41dma 10 0 &cppi41dma 11 0 | |
594 | &cppi41dma 12 0 &cppi41dma 13 0 | |
595 | &cppi41dma 14 0 &cppi41dma 0 1 | |
596 | &cppi41dma 1 1 &cppi41dma 2 1 | |
597 | &cppi41dma 3 1 &cppi41dma 4 1 | |
598 | &cppi41dma 5 1 &cppi41dma 6 1 | |
599 | &cppi41dma 7 1 &cppi41dma 8 1 | |
600 | &cppi41dma 9 1 &cppi41dma 10 1 | |
601 | &cppi41dma 11 1 &cppi41dma 12 1 | |
602 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
603 | dma-names = | |
604 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
605 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
606 | "rx14", "rx15", | |
607 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
608 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
609 | "tx14", "tx15"; | |
97238b35 SAS |
610 | }; |
611 | ||
c031a7d4 | 612 | usb1_phy: usb-phy@47401b00 { |
97238b35 SAS |
613 | compatible = "ti,am335x-usb-phy"; |
614 | reg = <0x47401b00 0x100>; | |
615 | reg-names = "phy"; | |
616 | status = "disabled"; | |
e7243b76 | 617 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
618 | }; |
619 | ||
620 | usb1: usb@47401800 { | |
621 | compatible = "ti,musb-am33xx"; | |
97238b35 | 622 | status = "disabled"; |
c031a7d4 SAS |
623 | reg = <0x47401c00 0x400 |
624 | 0x47401800 0x200>; | |
625 | reg-names = "mc", "control"; | |
626 | interrupts = <19>; | |
627 | interrupt-names = "mc"; | |
628 | dr_mode = "otg"; | |
629 | mentor,multipoint = <1>; | |
630 | mentor,num-eps = <16>; | |
631 | mentor,ram-bits = <12>; | |
632 | mentor,power = <500>; | |
633 | phys = <&usb1_phy>; | |
9b3452d1 SAS |
634 | |
635 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
636 | &cppi41dma 17 0 &cppi41dma 18 0 | |
637 | &cppi41dma 19 0 &cppi41dma 20 0 | |
638 | &cppi41dma 21 0 &cppi41dma 22 0 | |
639 | &cppi41dma 23 0 &cppi41dma 24 0 | |
640 | &cppi41dma 25 0 &cppi41dma 26 0 | |
641 | &cppi41dma 27 0 &cppi41dma 28 0 | |
642 | &cppi41dma 29 0 &cppi41dma 15 1 | |
643 | &cppi41dma 16 1 &cppi41dma 17 1 | |
644 | &cppi41dma 18 1 &cppi41dma 19 1 | |
645 | &cppi41dma 20 1 &cppi41dma 21 1 | |
646 | &cppi41dma 22 1 &cppi41dma 23 1 | |
647 | &cppi41dma 24 1 &cppi41dma 25 1 | |
648 | &cppi41dma 26 1 &cppi41dma 27 1 | |
649 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
650 | dma-names = | |
651 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
652 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
653 | "rx14", "rx15", | |
654 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
655 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
656 | "tx14", "tx15"; | |
97238b35 | 657 | }; |
9b3452d1 | 658 | |
8abcdd68 | 659 | cppi41dma: dma-controller@47402000 { |
9b3452d1 SAS |
660 | compatible = "ti,am3359-cppi41"; |
661 | reg = <0x47400000 0x1000 | |
662 | 0x47402000 0x1000 | |
663 | 0x47403000 0x1000 | |
664 | 0x47404000 0x4000>; | |
3b6394b4 | 665 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
9b3452d1 SAS |
666 | interrupts = <17>; |
667 | interrupt-names = "glue"; | |
668 | #dma-cells = <2>; | |
669 | #dma-channels = <30>; | |
670 | #dma-requests = <256>; | |
671 | status = "disabled"; | |
672 | }; | |
35b47fbb | 673 | }; |
6be35c70 | 674 | |
0a7486c9 PA |
675 | epwmss0: epwmss@48300000 { |
676 | compatible = "ti,am33xx-pwmss"; | |
677 | reg = <0x48300000 0x10>; | |
678 | ti,hwmods = "epwmss0"; | |
679 | #address-cells = <1>; | |
680 | #size-cells = <1>; | |
681 | status = "disabled"; | |
682 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
683 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
684 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
685 | ||
686 | ecap0: ecap@48300100 { | |
229110c1 FCJ |
687 | compatible = "ti,am3352-ecap", |
688 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
689 | #pwm-cells = <3>; |
690 | reg = <0x48300100 0x80>; | |
229110c1 FCJ |
691 | clocks = <&l4ls_gclk>; |
692 | clock-names = "fck"; | |
e8c85a3e MP |
693 | interrupts = <31>; |
694 | interrupt-names = "ecap0"; | |
0a7486c9 PA |
695 | status = "disabled"; |
696 | }; | |
697 | ||
dce2a652 | 698 | ehrpwm0: pwm@48300200 { |
229110c1 FCJ |
699 | compatible = "ti,am3352-ehrpwm", |
700 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
701 | #pwm-cells = <3>; |
702 | reg = <0x48300200 0x80>; | |
229110c1 FCJ |
703 | clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; |
704 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
705 | status = "disabled"; |
706 | }; | |
707 | }; | |
708 | ||
709 | epwmss1: epwmss@48302000 { | |
710 | compatible = "ti,am33xx-pwmss"; | |
711 | reg = <0x48302000 0x10>; | |
712 | ti,hwmods = "epwmss1"; | |
713 | #address-cells = <1>; | |
714 | #size-cells = <1>; | |
715 | status = "disabled"; | |
716 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
717 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
718 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
719 | ||
720 | ecap1: ecap@48302100 { | |
229110c1 FCJ |
721 | compatible = "ti,am3352-ecap", |
722 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
723 | #pwm-cells = <3>; |
724 | reg = <0x48302100 0x80>; | |
229110c1 FCJ |
725 | clocks = <&l4ls_gclk>; |
726 | clock-names = "fck"; | |
e8c85a3e MP |
727 | interrupts = <47>; |
728 | interrupt-names = "ecap1"; | |
0a7486c9 PA |
729 | status = "disabled"; |
730 | }; | |
731 | ||
dce2a652 | 732 | ehrpwm1: pwm@48302200 { |
229110c1 FCJ |
733 | compatible = "ti,am3352-ehrpwm", |
734 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
735 | #pwm-cells = <3>; |
736 | reg = <0x48302200 0x80>; | |
229110c1 FCJ |
737 | clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; |
738 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
739 | status = "disabled"; |
740 | }; | |
741 | }; | |
742 | ||
743 | epwmss2: epwmss@48304000 { | |
744 | compatible = "ti,am33xx-pwmss"; | |
745 | reg = <0x48304000 0x10>; | |
746 | ti,hwmods = "epwmss2"; | |
747 | #address-cells = <1>; | |
748 | #size-cells = <1>; | |
749 | status = "disabled"; | |
750 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
751 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
752 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
753 | ||
754 | ecap2: ecap@48304100 { | |
229110c1 FCJ |
755 | compatible = "ti,am3352-ecap", |
756 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
757 | #pwm-cells = <3>; |
758 | reg = <0x48304100 0x80>; | |
229110c1 FCJ |
759 | clocks = <&l4ls_gclk>; |
760 | clock-names = "fck"; | |
e8c85a3e MP |
761 | interrupts = <61>; |
762 | interrupt-names = "ecap2"; | |
0a7486c9 PA |
763 | status = "disabled"; |
764 | }; | |
765 | ||
dce2a652 | 766 | ehrpwm2: pwm@48304200 { |
229110c1 FCJ |
767 | compatible = "ti,am3352-ehrpwm", |
768 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
769 | #pwm-cells = <3>; |
770 | reg = <0x48304200 0x80>; | |
229110c1 FCJ |
771 | clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; |
772 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
773 | status = "disabled"; |
774 | }; | |
775 | }; | |
776 | ||
1a39a65c | 777 | mac: ethernet@4a100000 { |
21696f71 | 778 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
1a39a65c | 779 | ti,hwmods = "cpgmac0"; |
0987a6ef GC |
780 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
781 | clock-names = "fck", "cpts"; | |
1a39a65c M |
782 | cpdma_channels = <8>; |
783 | ale_entries = <1024>; | |
784 | bd_ram_size = <0x2000>; | |
785 | no_bd_ram = <0>; | |
1a39a65c M |
786 | mac_control = <0x20>; |
787 | slaves = <2>; | |
e86ac13b | 788 | active_slave = <0>; |
1a39a65c M |
789 | cpts_clock_mult = <0x80000000>; |
790 | cpts_clock_shift = <29>; | |
791 | reg = <0x4a100000 0x800 | |
792 | 0x4a101200 0x100>; | |
793 | #address-cells = <1>; | |
794 | #size-cells = <1>; | |
795 | interrupt-parent = <&intc>; | |
796 | /* | |
797 | * c0_rx_thresh_pend | |
798 | * c0_rx_pend | |
799 | * c0_tx_pend | |
800 | * c0_misc_pend | |
801 | */ | |
802 | interrupts = <40 41 42 43>; | |
803 | ranges; | |
e3bc5358 | 804 | syscon = <&scm_conf>; |
16c75a13 | 805 | status = "disabled"; |
1a39a65c M |
806 | |
807 | davinci_mdio: mdio@4a101000 { | |
9efd1a6f | 808 | compatible = "ti,cpsw-mdio","ti,davinci_mdio"; |
1a39a65c M |
809 | #address-cells = <1>; |
810 | #size-cells = <0>; | |
811 | ti,hwmods = "davinci_mdio"; | |
812 | bus_freq = <1000000>; | |
813 | reg = <0x4a101000 0x100>; | |
16c75a13 | 814 | status = "disabled"; |
1a39a65c M |
815 | }; |
816 | ||
817 | cpsw_emac0: slave@4a100200 { | |
818 | /* Filled in by U-Boot */ | |
819 | mac-address = [ 00 00 00 00 00 00 ]; | |
820 | }; | |
821 | ||
822 | cpsw_emac1: slave@4a100300 { | |
823 | /* Filled in by U-Boot */ | |
824 | mac-address = [ 00 00 00 00 00 00 ]; | |
825 | }; | |
39ffbd91 M |
826 | |
827 | phy_sel: cpsw-phy-sel@44e10650 { | |
828 | compatible = "ti,am3352-cpsw-phy-sel"; | |
829 | reg= <0x44e10650 0x4>; | |
830 | reg-names = "gmii-sel"; | |
831 | }; | |
1a39a65c | 832 | }; |
f6575c90 VB |
833 | |
834 | ocmcram: ocmcram@40300000 { | |
8b9a2810 RN |
835 | compatible = "mmio-sram"; |
836 | reg = <0x40300000 0x10000>; /* 64k */ | |
f6575c90 VB |
837 | }; |
838 | ||
15e8246b PA |
839 | elm: elm@48080000 { |
840 | compatible = "ti,am3352-elm"; | |
841 | reg = <0x48080000 0x2000>; | |
842 | interrupts = <4>; | |
843 | ti,hwmods = "elm"; | |
d6cfc1e2 BP |
844 | status = "disabled"; |
845 | }; | |
846 | ||
847 | lcdc: lcdc@4830e000 { | |
848 | compatible = "ti,am33xx-tilcdc"; | |
849 | reg = <0x4830e000 0x1000>; | |
850 | interrupt-parent = <&intc>; | |
851 | interrupts = <36>; | |
852 | ti,hwmods = "lcdc"; | |
15e8246b PA |
853 | status = "disabled"; |
854 | }; | |
855 | ||
a82279dd PR |
856 | tscadc: tscadc@44e0d000 { |
857 | compatible = "ti,am3359-tscadc"; | |
858 | reg = <0x44e0d000 0x1000>; | |
859 | interrupt-parent = <&intc>; | |
860 | interrupts = <16>; | |
861 | ti,hwmods = "adc_tsc"; | |
862 | status = "disabled"; | |
55e871fc M |
863 | dmas = <&edma 53 0>, <&edma 57 0>; |
864 | dma-names = "fifo0", "fifo1"; | |
a82279dd PR |
865 | |
866 | tsc { | |
867 | compatible = "ti,am3359-tsc"; | |
868 | }; | |
869 | am335x_adc: adc { | |
870 | #io-channel-cells = <1>; | |
871 | compatible = "ti,am3359-adc"; | |
872 | }; | |
a82279dd PR |
873 | }; |
874 | ||
e45879ec PA |
875 | gpmc: gpmc@50000000 { |
876 | compatible = "ti,am3352-gpmc"; | |
877 | ti,hwmods = "gpmc"; | |
f12ecbe2 | 878 | ti,no-idle-on-init; |
e45879ec PA |
879 | reg = <0x50000000 0x2000>; |
880 | interrupts = <100>; | |
a2abf904 | 881 | dmas = <&edma 52 0>; |
201c7e33 | 882 | dma-names = "rxtx"; |
00dddcaa LP |
883 | gpmc,num-cs = <7>; |
884 | gpmc,num-waitpins = <2>; | |
e45879ec PA |
885 | #address-cells = <2>; |
886 | #size-cells = <1>; | |
03752148 RQ |
887 | interrupt-controller; |
888 | #interrupt-cells = <2>; | |
4eb4dd57 RQ |
889 | gpio-controller; |
890 | #gpio-cells = <2>; | |
e45879ec PA |
891 | status = "disabled"; |
892 | }; | |
f8302e1e MG |
893 | |
894 | sham: sham@53100000 { | |
895 | compatible = "ti,omap4-sham"; | |
896 | ti,hwmods = "sham"; | |
897 | reg = <0x53100000 0x200>; | |
898 | interrupts = <109>; | |
b5e50906 | 899 | dmas = <&edma 36 0>; |
f8302e1e MG |
900 | dma-names = "rx"; |
901 | }; | |
99919e5e MG |
902 | |
903 | aes: aes@53500000 { | |
904 | compatible = "ti,omap4-aes"; | |
905 | ti,hwmods = "aes"; | |
906 | reg = <0x53500000 0xa0>; | |
7af8884a | 907 | interrupts = <103>; |
b5e50906 PU |
908 | dmas = <&edma 6 0>, |
909 | <&edma 5 0>; | |
99919e5e MG |
910 | dma-names = "tx", "rx"; |
911 | }; | |
3f72f875 PA |
912 | |
913 | mcasp0: mcasp@48038000 { | |
914 | compatible = "ti,am33xx-mcasp-audio"; | |
915 | ti,hwmods = "mcasp0"; | |
0bee55ab JS |
916 | reg = <0x48038000 0x2000>, |
917 | <0x46000000 0x400000>; | |
918 | reg-names = "mpu", "dat"; | |
3f72f875 | 919 | interrupts = <80>, <81>; |
ae107d06 | 920 | interrupt-names = "tx", "rx"; |
3f72f875 | 921 | status = "disabled"; |
b5e50906 PU |
922 | dmas = <&edma 8 2>, |
923 | <&edma 9 2>; | |
3f72f875 PA |
924 | dma-names = "tx", "rx"; |
925 | }; | |
926 | ||
927 | mcasp1: mcasp@4803C000 { | |
928 | compatible = "ti,am33xx-mcasp-audio"; | |
929 | ti,hwmods = "mcasp1"; | |
0bee55ab JS |
930 | reg = <0x4803C000 0x2000>, |
931 | <0x46400000 0x400000>; | |
932 | reg-names = "mpu", "dat"; | |
3f72f875 | 933 | interrupts = <82>, <83>; |
ae107d06 | 934 | interrupt-names = "tx", "rx"; |
3f72f875 | 935 | status = "disabled"; |
b5e50906 PU |
936 | dmas = <&edma 10 2>, |
937 | <&edma 11 2>; | |
3f72f875 PA |
938 | dma-names = "tx", "rx"; |
939 | }; | |
ed845d6b LV |
940 | |
941 | rng: rng@48310000 { | |
942 | compatible = "ti,omap4-rng"; | |
943 | ti,hwmods = "rng"; | |
944 | reg = <0x48310000 0x2000>; | |
945 | interrupts = <111>; | |
946 | }; | |
5fc0b42a AC |
947 | }; |
948 | }; | |
ea291c98 TK |
949 | |
950 | /include/ "am33xx-clocks.dtsi" |