projects / mirror_ubuntu-eoan-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 5fc0b42a AC |
1 | /* |
| 2 | * Device Tree Source for AM33XX SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
| 6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
| e94233c2 | 13 | |
| 5fc0b42a AC |
14 | / { |
| 15 | compatible = "ti,am33xx"; | |
| 4c94ac29 | 16 | interrupt-parent = <&intc>; |
| f8bf0161 JMC |
17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; | |
| 1d8d6d3f | 19 | chosen { }; |
| 5fc0b42a AC |
20 | |
| 21 | aliases { | |
| 6a968678 NM |
22 | i2c0 = &i2c0; |
| 23 | i2c1 = &i2c1; | |
| 24 | i2c2 = &i2c2; | |
| dde3b0d6 VH |
25 | serial0 = &uart0; |
| 26 | serial1 = &uart1; | |
| 27 | serial2 = &uart2; | |
| 28 | serial3 = &uart3; | |
| 29 | serial4 = &uart4; | |
| 30 | serial5 = &uart5; | |
| 7a57ee87 AC |
31 | d_can0 = &dcan0; |
| 32 | d_can1 = &dcan1; | |
| 97238b35 SAS |
33 | usb0 = &usb0; |
| 34 | usb1 = &usb1; | |
| 35 | phy0 = &usb0_phy; | |
| 36 | phy1 = &usb1_phy; | |
| 8170056d DM |
37 | ethernet0 = &cpsw_emac0; |
| 38 | ethernet1 = &cpsw_emac1; | |
| 5fc0b42a AC |
39 | }; |
| 40 | ||
| 41 | cpus { | |
| 2e0d513f LP |
42 | #address-cells = <1>; |
| 43 | #size-cells = <0>; | |
| 5fc0b42a AC |
44 | cpu@0 { |
| 45 | compatible = "arm,cortex-a8"; | |
| 2e0d513f LP |
46 | device_type = "cpu"; |
| 47 | reg = <0>; | |
| efeedcf2 | 48 | |
| 0f416d13 DG |
49 | /* |
| 50 | * To consider voltage drop between PMIC and SoC, | |
| 51 | * tolerance value is reduced to 2% from 4% and | |
| 52 | * voltage value is increased as a precaution. | |
| 53 | */ | |
| 54 | operating-points = < | |
| 55 | /* kHz uV */ | |
| 56 | 720000 1285000 | |
| 57 | 600000 1225000 | |
| 58 | 500000 1125000 | |
| 59 | 275000 1125000 | |
| 60 | >; | |
| 61 | voltage-tolerance = <2>; /* 2 percentage */ | |
| 8d766fa2 NM |
62 | |
| 63 | clocks = <&dpll_mpu_ck>; | |
| 64 | clock-names = "cpu"; | |
| 65 | ||
| efeedcf2 | 66 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
| 5fc0b42a AC |
67 | }; |
| 68 | }; | |
| 69 | ||
| 6797cdbe AB |
70 | pmu { |
| 71 | compatible = "arm,cortex-a8-pmu"; | |
| 72 | interrupts = <3>; | |
| 73 | }; | |
| 74 | ||
| 5fc0b42a | 75 | /* |
| 5c5be9db | 76 | * The soc node represents the soc top level view. It is used for IPs |
| 5fc0b42a AC |
77 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 78 | */ | |
| 79 | soc { | |
| 80 | compatible = "ti,omap-infra"; | |
| 81 | mpu { | |
| 82 | compatible = "ti,omap3-mpu"; | |
| 83 | ti,hwmods = "mpu"; | |
| 84 | }; | |
| 85 | }; | |
| 86 | ||
| 87 | /* | |
| 88 | * XXX: Use a flat representation of the AM33XX interconnect. | |
| b7ab524b GU |
89 | * The real AM33XX interconnect network is quite complex. Since |
| 90 | * it will not bring real advantage to represent that in DT | |
| 5fc0b42a AC |
91 | * for the moment, just use a fake OCP bus entry to represent |
| 92 | * the whole bus hierarchy. | |
| 93 | */ | |
| 94 | ocp { | |
| 95 | compatible = "simple-bus"; | |
| 96 | #address-cells = <1>; | |
| 97 | #size-cells = <1>; | |
| 98 | ranges; | |
| 99 | ti,hwmods = "l3_main"; | |
| 100 | ||
| e3bc5358 TK |
101 | l4_wkup: l4_wkup@44c00000 { |
| 102 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
| 103 | #address-cells = <1>; | |
| 104 | #size-cells = <1>; | |
| 105 | ranges = <0 0x44c00000 0x280000>; | |
| ea291c98 | 106 | |
| d129be27 SA |
107 | wkup_m3: wkup_m3@100000 { |
| 108 | compatible = "ti,am3352-wkup-m3"; | |
| 109 | reg = <0x100000 0x4000>, | |
| 110 | <0x180000 0x2000>; | |
| 111 | reg-names = "umem", "dmem"; | |
| 112 | ti,hwmods = "wkup_m3"; | |
| 113 | ti,pm-firmware = "am335x-pm-firmware.elf"; | |
| 114 | }; | |
| 115 | ||
| e3bc5358 TK |
116 | prcm: prcm@200000 { |
| 117 | compatible = "ti,am3-prcm"; | |
| 118 | reg = <0x200000 0x4000>; | |
| ea291c98 | 119 | |
| e3bc5358 TK |
120 | prcm_clocks: clocks { |
| 121 | #address-cells = <1>; | |
| 122 | #size-cells = <0>; | |
| 123 | }; | |
| ea291c98 | 124 | |
| e3bc5358 TK |
125 | prcm_clockdomains: clockdomains { |
| 126 | }; | |
| ea291c98 TK |
127 | }; |
| 128 | ||
| e3bc5358 TK |
129 | scm: scm@210000 { |
| 130 | compatible = "ti,am3-scm", "simple-bus"; | |
| 131 | reg = <0x210000 0x2000>; | |
| 132 | #address-cells = <1>; | |
| 133 | #size-cells = <1>; | |
| be76fd31 | 134 | #pinctrl-cells = <1>; |
| e3bc5358 TK |
135 | ranges = <0 0x210000 0x2000>; |
| 136 | ||
| 137 | am33xx_pinmux: pinmux@800 { | |
| 138 | compatible = "pinctrl-single"; | |
| 139 | reg = <0x800 0x238>; | |
| 140 | #address-cells = <1>; | |
| 141 | #size-cells = <0>; | |
| be76fd31 | 142 | #pinctrl-cells = <1>; |
| e3bc5358 TK |
143 | pinctrl-single,register-width = <32>; |
| 144 | pinctrl-single,function-mask = <0x7f>; | |
| 145 | }; | |
| 146 | ||
| 147 | scm_conf: scm_conf@0 { | |
| 1aa09df0 | 148 | compatible = "syscon", "simple-bus"; |
| e3bc5358 TK |
149 | reg = <0x0 0x800>; |
| 150 | #address-cells = <1>; | |
| 151 | #size-cells = <1>; | |
| 1aa09df0 | 152 | ranges = <0 0 0x800>; |
| e3bc5358 TK |
153 | |
| 154 | scm_clocks: clocks { | |
| 155 | #address-cells = <1>; | |
| 156 | #size-cells = <0>; | |
| 157 | }; | |
| 158 | }; | |
| 159 | ||
| 99937129 SA |
160 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
| 161 | compatible = "ti,am3352-wkup-m3-ipc"; | |
| 162 | reg = <0x1324 0x24>; | |
| 163 | interrupts = <78>; | |
| 164 | ti,rproc = <&wkup_m3>; | |
| 165 | mboxes = <&mailbox &mbox_wkupm3>; | |
| 166 | }; | |
| 167 | ||
| b5e50906 PU |
168 | edma_xbar: dma-router@f90 { |
| 169 | compatible = "ti,am335x-edma-crossbar"; | |
| 170 | reg = <0xf90 0x40>; | |
| 171 | #dma-cells = <3>; | |
| 172 | dma-requests = <32>; | |
| 173 | dma-masters = <&edma>; | |
| 174 | }; | |
| 175 | ||
| e3bc5358 TK |
176 | scm_clockdomains: clockdomains { |
| 177 | }; | |
| ea291c98 TK |
178 | }; |
| 179 | }; | |
| 180 | ||
| 5fc0b42a | 181 | intc: interrupt-controller@48200000 { |
| cab82b76 | 182 | compatible = "ti,am33xx-intc"; |
| 5fc0b42a AC |
183 | interrupt-controller; |
| 184 | #interrupt-cells = <1>; | |
| 5fc0b42a AC |
185 | reg = <0x48200000 0x1000>; |
| 186 | }; | |
| 187 | ||
| 505975d3 | 188 | edma: edma@49000000 { |
| b5e50906 PU |
189 | compatible = "ti,edma3-tpcc"; |
| 190 | ti,hwmods = "tpcc"; | |
| 191 | reg = <0x49000000 0x10000>; | |
| 192 | reg-names = "edma3_cc"; | |
| 505975d3 | 193 | interrupts = <12 13 14>; |
| a5206553 | 194 | interrupt-names = "edma3_ccint", "edma3_mperr", |
| b5e50906 PU |
195 | "edma3_ccerrint"; |
| 196 | dma-requests = <64>; | |
| 197 | #dma-cells = <2>; | |
| 198 | ||
| 199 | ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, | |
| 200 | <&edma_tptc2 0>; | |
| 201 | ||
| 202 | ti,edma-memcpy-channels = <20 21>; | |
| 203 | }; | |
| 204 | ||
| 205 | edma_tptc0: tptc@49800000 { | |
| 206 | compatible = "ti,edma3-tptc"; | |
| 207 | ti,hwmods = "tptc0"; | |
| 208 | reg = <0x49800000 0x100000>; | |
| 209 | interrupts = <112>; | |
| 210 | interrupt-names = "edma3_tcerrint"; | |
| 211 | }; | |
| 212 | ||
| 213 | edma_tptc1: tptc@49900000 { | |
| 214 | compatible = "ti,edma3-tptc"; | |
| 215 | ti,hwmods = "tptc1"; | |
| 216 | reg = <0x49900000 0x100000>; | |
| 217 | interrupts = <113>; | |
| 218 | interrupt-names = "edma3_tcerrint"; | |
| 219 | }; | |
| 220 | ||
| 221 | edma_tptc2: tptc@49a00000 { | |
| 222 | compatible = "ti,edma3-tptc"; | |
| 223 | ti,hwmods = "tptc2"; | |
| 224 | reg = <0x49a00000 0x100000>; | |
| 225 | interrupts = <114>; | |
| 226 | interrupt-names = "edma3_tcerrint"; | |
| 505975d3 MP |
227 | }; |
| 228 | ||
| b918e2c0 | 229 | gpio0: gpio@44e07000 { |
| 5fc0b42a AC |
230 | compatible = "ti,omap4-gpio"; |
| 231 | ti,hwmods = "gpio1"; | |
| 232 | gpio-controller; | |
| 233 | #gpio-cells = <2>; | |
| 234 | interrupt-controller; | |
| 5eac0eb7 | 235 | #interrupt-cells = <2>; |
| 4462b31c | 236 | reg = <0x44e07000 0x1000>; |
| 4462b31c | 237 | interrupts = <96>; |
| 5fc0b42a AC |
238 | }; |
| 239 | ||
| b918e2c0 | 240 | gpio1: gpio@4804c000 { |
| 5fc0b42a AC |
241 | compatible = "ti,omap4-gpio"; |
| 242 | ti,hwmods = "gpio2"; | |
| 243 | gpio-controller; | |
| 244 | #gpio-cells = <2>; | |
| 245 | interrupt-controller; | |
| 5eac0eb7 | 246 | #interrupt-cells = <2>; |
| 4462b31c | 247 | reg = <0x4804c000 0x1000>; |
| 4462b31c | 248 | interrupts = <98>; |
| 5fc0b42a AC |
249 | }; |
| 250 | ||
| b918e2c0 | 251 | gpio2: gpio@481ac000 { |
| 5fc0b42a AC |
252 | compatible = "ti,omap4-gpio"; |
| 253 | ti,hwmods = "gpio3"; | |
| 254 | gpio-controller; | |
| 255 | #gpio-cells = <2>; | |
| 256 | interrupt-controller; | |
| 5eac0eb7 | 257 | #interrupt-cells = <2>; |
| 4462b31c | 258 | reg = <0x481ac000 0x1000>; |
| 4462b31c | 259 | interrupts = <32>; |
| 5fc0b42a AC |
260 | }; |
| 261 | ||
| b918e2c0 | 262 | gpio3: gpio@481ae000 { |
| 5fc0b42a AC |
263 | compatible = "ti,omap4-gpio"; |
| 264 | ti,hwmods = "gpio4"; | |
| 265 | gpio-controller; | |
| 266 | #gpio-cells = <2>; | |
| 267 | interrupt-controller; | |
| 5eac0eb7 | 268 | #interrupt-cells = <2>; |
| 4462b31c | 269 | reg = <0x481ae000 0x1000>; |
| 4462b31c | 270 | interrupts = <62>; |
| 5fc0b42a AC |
271 | }; |
| 272 | ||
| dde3b0d6 | 273 | uart0: serial@44e09000 { |
| 4fcdff9b | 274 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
275 | ti,hwmods = "uart1"; |
| 276 | clock-frequency = <48000000>; | |
| 4462b31c | 277 | reg = <0x44e09000 0x2000>; |
| 4462b31c | 278 | interrupts = <72>; |
| 53d91034 | 279 | status = "disabled"; |
| b5e50906 | 280 | dmas = <&edma 26 0>, <&edma 27 0>; |
| 13fd3d57 | 281 | dma-names = "tx", "rx"; |
| 5fc0b42a AC |
282 | }; |
| 283 | ||
| dde3b0d6 | 284 | uart1: serial@48022000 { |
| 4fcdff9b | 285 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
286 | ti,hwmods = "uart2"; |
| 287 | clock-frequency = <48000000>; | |
| 4462b31c | 288 | reg = <0x48022000 0x2000>; |
| 4462b31c | 289 | interrupts = <73>; |
| 53d91034 | 290 | status = "disabled"; |
| b5e50906 | 291 | dmas = <&edma 28 0>, <&edma 29 0>; |
| 13fd3d57 | 292 | dma-names = "tx", "rx"; |
| 5fc0b42a AC |
293 | }; |
| 294 | ||
| dde3b0d6 | 295 | uart2: serial@48024000 { |
| 4fcdff9b | 296 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
297 | ti,hwmods = "uart3"; |
| 298 | clock-frequency = <48000000>; | |
| 4462b31c | 299 | reg = <0x48024000 0x2000>; |
| 4462b31c | 300 | interrupts = <74>; |
| 53d91034 | 301 | status = "disabled"; |
| b5e50906 | 302 | dmas = <&edma 30 0>, <&edma 31 0>; |
| 13fd3d57 | 303 | dma-names = "tx", "rx"; |
| 5fc0b42a AC |
304 | }; |
| 305 | ||
| dde3b0d6 | 306 | uart3: serial@481a6000 { |
| 4fcdff9b | 307 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
308 | ti,hwmods = "uart4"; |
| 309 | clock-frequency = <48000000>; | |
| 4462b31c | 310 | reg = <0x481a6000 0x2000>; |
| 4462b31c | 311 | interrupts = <44>; |
| 53d91034 | 312 | status = "disabled"; |
| 5fc0b42a AC |
313 | }; |
| 314 | ||
| dde3b0d6 | 315 | uart4: serial@481a8000 { |
| 4fcdff9b | 316 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
317 | ti,hwmods = "uart5"; |
| 318 | clock-frequency = <48000000>; | |
| 4462b31c | 319 | reg = <0x481a8000 0x2000>; |
| 4462b31c | 320 | interrupts = <45>; |
| 53d91034 | 321 | status = "disabled"; |
| 5fc0b42a AC |
322 | }; |
| 323 | ||
| dde3b0d6 | 324 | uart5: serial@481aa000 { |
| 4fcdff9b | 325 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 5fc0b42a AC |
326 | ti,hwmods = "uart6"; |
| 327 | clock-frequency = <48000000>; | |
| 4462b31c | 328 | reg = <0x481aa000 0x2000>; |
| 4462b31c | 329 | interrupts = <46>; |
| 53d91034 | 330 | status = "disabled"; |
| 5fc0b42a AC |
331 | }; |
| 332 | ||
| b918e2c0 | 333 | i2c0: i2c@44e0b000 { |
| 5fc0b42a AC |
334 | compatible = "ti,omap4-i2c"; |
| 335 | #address-cells = <1>; | |
| 336 | #size-cells = <0>; | |
| 337 | ti,hwmods = "i2c1"; | |
| 4462b31c | 338 | reg = <0x44e0b000 0x1000>; |
| 4462b31c | 339 | interrupts = <70>; |
| 53d91034 | 340 | status = "disabled"; |
| 5fc0b42a AC |
341 | }; |
| 342 | ||
| b918e2c0 | 343 | i2c1: i2c@4802a000 { |
| 5fc0b42a AC |
344 | compatible = "ti,omap4-i2c"; |
| 345 | #address-cells = <1>; | |
| 346 | #size-cells = <0>; | |
| 347 | ti,hwmods = "i2c2"; | |
| 4462b31c | 348 | reg = <0x4802a000 0x1000>; |
| 4462b31c | 349 | interrupts = <71>; |
| 53d91034 | 350 | status = "disabled"; |
| 5fc0b42a AC |
351 | }; |
| 352 | ||
| b918e2c0 | 353 | i2c2: i2c@4819c000 { |
| 5fc0b42a AC |
354 | compatible = "ti,omap4-i2c"; |
| 355 | #address-cells = <1>; | |
| 356 | #size-cells = <0>; | |
| 357 | ti,hwmods = "i2c3"; | |
| 4462b31c | 358 | reg = <0x4819c000 0x1000>; |
| 4462b31c | 359 | interrupts = <30>; |
| 53d91034 | 360 | status = "disabled"; |
| 5fc0b42a | 361 | }; |
| 5f789ebc | 362 | |
| 55b4452b MP |
363 | mmc1: mmc@48060000 { |
| 364 | compatible = "ti,omap4-hsmmc"; | |
| 365 | ti,hwmods = "mmc1"; | |
| 366 | ti,dual-volt; | |
| 367 | ti,needs-special-reset; | |
| 368 | ti,needs-special-hs-handling; | |
| b5e50906 PU |
369 | dmas = <&edma_xbar 24 0 0 |
| 370 | &edma_xbar 25 0 0>; | |
| 55b4452b MP |
371 | dma-names = "tx", "rx"; |
| 372 | interrupts = <64>; | |
| 373 | interrupt-parent = <&intc>; | |
| 374 | reg = <0x48060000 0x1000>; | |
| 375 | status = "disabled"; | |
| 376 | }; | |
| 377 | ||
| 378 | mmc2: mmc@481d8000 { | |
| 379 | compatible = "ti,omap4-hsmmc"; | |
| 380 | ti,hwmods = "mmc2"; | |
| 381 | ti,needs-special-reset; | |
| b5e50906 PU |
382 | dmas = <&edma 2 0 |
| 383 | &edma 3 0>; | |
| 55b4452b MP |
384 | dma-names = "tx", "rx"; |
| 385 | interrupts = <28>; | |
| 386 | interrupt-parent = <&intc>; | |
| 387 | reg = <0x481d8000 0x1000>; | |
| 388 | status = "disabled"; | |
| 389 | }; | |
| 390 | ||
| 391 | mmc3: mmc@47810000 { | |
| 392 | compatible = "ti,omap4-hsmmc"; | |
| 393 | ti,hwmods = "mmc3"; | |
| 394 | ti,needs-special-reset; | |
| 395 | interrupts = <29>; | |
| 396 | interrupt-parent = <&intc>; | |
| 397 | reg = <0x47810000 0x1000>; | |
| 398 | status = "disabled"; | |
| 399 | }; | |
| 400 | ||
| d4cbe80d SA |
401 | hwspinlock: spinlock@480ca000 { |
| 402 | compatible = "ti,omap4-hwspinlock"; | |
| 403 | reg = <0x480ca000 0x1000>; | |
| 404 | ti,hwmods = "spinlock"; | |
| 34054213 | 405 | #hwlock-cells = <1>; |
| d4cbe80d SA |
406 | }; |
| 407 | ||
| 5f789ebc AM |
408 | wdt2: wdt@44e35000 { |
| 409 | compatible = "ti,omap3-wdt"; | |
| 410 | ti,hwmods = "wd_timer2"; | |
| 4462b31c | 411 | reg = <0x44e35000 0x1000>; |
| 4462b31c | 412 | interrupts = <91>; |
| 5f789ebc | 413 | }; |
| 059b185d | 414 | |
| e23aabc6 RQ |
415 | dcan0: can@481cc000 { |
| 416 | compatible = "ti,am3352-d_can"; | |
| 059b185d | 417 | ti,hwmods = "d_can0"; |
| e23aabc6 RQ |
418 | reg = <0x481cc000 0x2000>; |
| 419 | clocks = <&dcan0_fck>; | |
| 420 | clock-names = "fck"; | |
| e3bc5358 | 421 | syscon-raminit = <&scm_conf 0x644 0>; |
| 059b185d | 422 | interrupts = <52>; |
| 059b185d AC |
423 | status = "disabled"; |
| 424 | }; | |
| 425 | ||
| e23aabc6 RQ |
426 | dcan1: can@481d0000 { |
| 427 | compatible = "ti,am3352-d_can"; | |
| 059b185d | 428 | ti,hwmods = "d_can1"; |
| e23aabc6 RQ |
429 | reg = <0x481d0000 0x2000>; |
| 430 | clocks = <&dcan1_fck>; | |
| 431 | clock-names = "fck"; | |
| e3bc5358 | 432 | syscon-raminit = <&scm_conf 0x644 1>; |
| 059b185d | 433 | interrupts = <55>; |
| 059b185d AC |
434 | status = "disabled"; |
| 435 | }; | |
| fab8ad0b | 436 | |
| 40242301 SA |
437 | mailbox: mailbox@480C8000 { |
| 438 | compatible = "ti,omap4-mailbox"; | |
| 439 | reg = <0x480C8000 0x200>; | |
| 440 | interrupts = <77>; | |
| 441 | ti,hwmods = "mailbox"; | |
| 24df0453 | 442 | #mbox-cells = <1>; |
| 40242301 SA |
443 | ti,mbox-num-users = <4>; |
| 444 | ti,mbox-num-fifos = <8>; | |
| d27704d1 | 445 | mbox_wkupm3: wkup_m3 { |
| 2800971f | 446 | ti,mbox-send-noirq; |
| d27704d1 SA |
447 | ti,mbox-tx = <0 0 0>; |
| 448 | ti,mbox-rx = <0 0 3>; | |
| 449 | }; | |
| 40242301 SA |
450 | }; |
| 451 | ||
| fab8ad0b | 452 | timer1: timer@44e31000 { |
| 002e1ec5 | 453 | compatible = "ti,am335x-timer-1ms"; |
| fab8ad0b JH |
454 | reg = <0x44e31000 0x400>; |
| 455 | interrupts = <67>; | |
| 456 | ti,hwmods = "timer1"; | |
| 457 | ti,timer-alwon; | |
| 458 | }; | |
| 459 | ||
| 460 | timer2: timer@48040000 { | |
| 002e1ec5 | 461 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
462 | reg = <0x48040000 0x400>; |
| 463 | interrupts = <68>; | |
| 464 | ti,hwmods = "timer2"; | |
| 465 | }; | |
| 466 | ||
| 467 | timer3: timer@48042000 { | |
| 002e1ec5 | 468 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
469 | reg = <0x48042000 0x400>; |
| 470 | interrupts = <69>; | |
| 471 | ti,hwmods = "timer3"; | |
| 472 | }; | |
| 473 | ||
| 474 | timer4: timer@48044000 { | |
| 002e1ec5 | 475 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
476 | reg = <0x48044000 0x400>; |
| 477 | interrupts = <92>; | |
| 478 | ti,hwmods = "timer4"; | |
| 479 | ti,timer-pwm; | |
| 480 | }; | |
| 481 | ||
| 482 | timer5: timer@48046000 { | |
| 002e1ec5 | 483 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
484 | reg = <0x48046000 0x400>; |
| 485 | interrupts = <93>; | |
| 486 | ti,hwmods = "timer5"; | |
| 487 | ti,timer-pwm; | |
| 488 | }; | |
| 489 | ||
| 490 | timer6: timer@48048000 { | |
| 002e1ec5 | 491 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
492 | reg = <0x48048000 0x400>; |
| 493 | interrupts = <94>; | |
| 494 | ti,hwmods = "timer6"; | |
| 495 | ti,timer-pwm; | |
| 496 | }; | |
| 497 | ||
| 498 | timer7: timer@4804a000 { | |
| 002e1ec5 | 499 | compatible = "ti,am335x-timer"; |
| fab8ad0b JH |
500 | reg = <0x4804a000 0x400>; |
| 501 | interrupts = <95>; | |
| 502 | ti,hwmods = "timer7"; | |
| 503 | ti,timer-pwm; | |
| 504 | }; | |
| 0d935c16 | 505 | |
| ccd8b9e0 | 506 | rtc: rtc@44e3e000 { |
| 6ac7b4a2 | 507 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
| 0d935c16 AM |
508 | reg = <0x44e3e000 0x1000>; |
| 509 | interrupts = <75 | |
| 510 | 76>; | |
| 511 | ti,hwmods = "rtc"; | |
| 17fad5f3 K |
512 | clocks = <&clkdiv32k_ick>; |
| 513 | clock-names = "int-clk"; | |
| 0d935c16 | 514 | }; |
| 9fd3c748 PA |
515 | |
| 516 | spi0: spi@48030000 { | |
| 517 | compatible = "ti,omap4-mcspi"; | |
| 518 | #address-cells = <1>; | |
| 519 | #size-cells = <0>; | |
| 520 | reg = <0x48030000 0x400>; | |
| 7b3754c6 | 521 | interrupts = <65>; |
| 9fd3c748 PA |
522 | ti,spi-num-cs = <2>; |
| 523 | ti,hwmods = "spi0"; | |
| b5e50906 PU |
524 | dmas = <&edma 16 0 |
| 525 | &edma 17 0 | |
| 526 | &edma 18 0 | |
| 527 | &edma 19 0>; | |
| f5e2f807 | 528 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
| 9fd3c748 PA |
529 | status = "disabled"; |
| 530 | }; | |
| 531 | ||
| 532 | spi1: spi@481a0000 { | |
| 533 | compatible = "ti,omap4-mcspi"; | |
| 534 | #address-cells = <1>; | |
| 535 | #size-cells = <0>; | |
| 536 | reg = <0x481a0000 0x400>; | |
| 7b3754c6 | 537 | interrupts = <125>; |
| 9fd3c748 PA |
538 | ti,spi-num-cs = <2>; |
| 539 | ti,hwmods = "spi1"; | |
| b5e50906 PU |
540 | dmas = <&edma 42 0 |
| 541 | &edma 43 0 | |
| 542 | &edma 44 0 | |
| 543 | &edma 45 0>; | |
| f5e2f807 | 544 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
| 9fd3c748 PA |
545 | status = "disabled"; |
| 546 | }; | |
| 35b47fbb | 547 | |
| 97238b35 SAS |
548 | usb: usb@47400000 { |
| 549 | compatible = "ti,am33xx-usb"; | |
| 550 | reg = <0x47400000 0x1000>; | |
| 551 | ranges; | |
| 552 | #address-cells = <1>; | |
| 553 | #size-cells = <1>; | |
| 35b47fbb | 554 | ti,hwmods = "usb_otg_hs"; |
| 97238b35 SAS |
555 | status = "disabled"; |
| 556 | ||
| 8abcdd68 | 557 | usb_ctrl_mod: control@44e10620 { |
| 97238b35 SAS |
558 | compatible = "ti,am335x-usb-ctrl-module"; |
| 559 | reg = <0x44e10620 0x10 | |
| 560 | 0x44e10648 0x4>; | |
| 561 | reg-names = "phy_ctrl", "wakeup"; | |
| 562 | status = "disabled"; | |
| 563 | }; | |
| 564 | ||
| c031a7d4 | 565 | usb0_phy: usb-phy@47401300 { |
| 97238b35 SAS |
566 | compatible = "ti,am335x-usb-phy"; |
| 567 | reg = <0x47401300 0x100>; | |
| 568 | reg-names = "phy"; | |
| 569 | status = "disabled"; | |
| e7243b76 | 570 | ti,ctrl_mod = <&usb_ctrl_mod>; |
| 97238b35 SAS |
571 | }; |
| 572 | ||
| 573 | usb0: usb@47401000 { | |
| 574 | compatible = "ti,musb-am33xx"; | |
| 97238b35 | 575 | status = "disabled"; |
| c031a7d4 SAS |
576 | reg = <0x47401400 0x400 |
| 577 | 0x47401000 0x200>; | |
| 578 | reg-names = "mc", "control"; | |
| 579 | ||
| 580 | interrupts = <18>; | |
| 581 | interrupt-names = "mc"; | |
| 582 | dr_mode = "otg"; | |
| 583 | mentor,multipoint = <1>; | |
| 584 | mentor,num-eps = <16>; | |
| 585 | mentor,ram-bits = <12>; | |
| 586 | mentor,power = <500>; | |
| 587 | phys = <&usb0_phy>; | |
| 9b3452d1 SAS |
588 | |
| 589 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
| 590 | &cppi41dma 2 0 &cppi41dma 3 0 | |
| 591 | &cppi41dma 4 0 &cppi41dma 5 0 | |
| 592 | &cppi41dma 6 0 &cppi41dma 7 0 | |
| 593 | &cppi41dma 8 0 &cppi41dma 9 0 | |
| 594 | &cppi41dma 10 0 &cppi41dma 11 0 | |
| 595 | &cppi41dma 12 0 &cppi41dma 13 0 | |
| 596 | &cppi41dma 14 0 &cppi41dma 0 1 | |
| 597 | &cppi41dma 1 1 &cppi41dma 2 1 | |
| 598 | &cppi41dma 3 1 &cppi41dma 4 1 | |
| 599 | &cppi41dma 5 1 &cppi41dma 6 1 | |
| 600 | &cppi41dma 7 1 &cppi41dma 8 1 | |
| 601 | &cppi41dma 9 1 &cppi41dma 10 1 | |
| 602 | &cppi41dma 11 1 &cppi41dma 12 1 | |
| 603 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
| 604 | dma-names = | |
| 605 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
| 606 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
| 607 | "rx14", "rx15", | |
| 608 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
| 609 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
| 610 | "tx14", "tx15"; | |
| 97238b35 SAS |
611 | }; |
| 612 | ||
| c031a7d4 | 613 | usb1_phy: usb-phy@47401b00 { |
| 97238b35 SAS |
614 | compatible = "ti,am335x-usb-phy"; |
| 615 | reg = <0x47401b00 0x100>; | |
| 616 | reg-names = "phy"; | |
| 617 | status = "disabled"; | |
| e7243b76 | 618 | ti,ctrl_mod = <&usb_ctrl_mod>; |
| 97238b35 SAS |
619 | }; |
| 620 | ||
| 621 | usb1: usb@47401800 { | |
| 622 | compatible = "ti,musb-am33xx"; | |
| 97238b35 | 623 | status = "disabled"; |
| c031a7d4 SAS |
624 | reg = <0x47401c00 0x400 |
| 625 | 0x47401800 0x200>; | |
| 626 | reg-names = "mc", "control"; | |
| 627 | interrupts = <19>; | |
| 628 | interrupt-names = "mc"; | |
| 629 | dr_mode = "otg"; | |
| 630 | mentor,multipoint = <1>; | |
| 631 | mentor,num-eps = <16>; | |
| 632 | mentor,ram-bits = <12>; | |
| 633 | mentor,power = <500>; | |
| 634 | phys = <&usb1_phy>; | |
| 9b3452d1 SAS |
635 | |
| 636 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
| 637 | &cppi41dma 17 0 &cppi41dma 18 0 | |
| 638 | &cppi41dma 19 0 &cppi41dma 20 0 | |
| 639 | &cppi41dma 21 0 &cppi41dma 22 0 | |
| 640 | &cppi41dma 23 0 &cppi41dma 24 0 | |
| 641 | &cppi41dma 25 0 &cppi41dma 26 0 | |
| 642 | &cppi41dma 27 0 &cppi41dma 28 0 | |
| 643 | &cppi41dma 29 0 &cppi41dma 15 1 | |
| 644 | &cppi41dma 16 1 &cppi41dma 17 1 | |
| 645 | &cppi41dma 18 1 &cppi41dma 19 1 | |
| 646 | &cppi41dma 20 1 &cppi41dma 21 1 | |
| 647 | &cppi41dma 22 1 &cppi41dma 23 1 | |
| 648 | &cppi41dma 24 1 &cppi41dma 25 1 | |
| 649 | &cppi41dma 26 1 &cppi41dma 27 1 | |
| 650 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
| 651 | dma-names = | |
| 652 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
| 653 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
| 654 | "rx14", "rx15", | |
| 655 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
| 656 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
| 657 | "tx14", "tx15"; | |
| 97238b35 | 658 | }; |
| 9b3452d1 | 659 | |
| 8abcdd68 | 660 | cppi41dma: dma-controller@47402000 { |
| 9b3452d1 SAS |
661 | compatible = "ti,am3359-cppi41"; |
| 662 | reg = <0x47400000 0x1000 | |
| 663 | 0x47402000 0x1000 | |
| 664 | 0x47403000 0x1000 | |
| 665 | 0x47404000 0x4000>; | |
| 3b6394b4 | 666 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
| 9b3452d1 SAS |
667 | interrupts = <17>; |
| 668 | interrupt-names = "glue"; | |
| 669 | #dma-cells = <2>; | |
| 670 | #dma-channels = <30>; | |
| 671 | #dma-requests = <256>; | |
| 672 | status = "disabled"; | |
| 673 | }; | |
| 35b47fbb | 674 | }; |
| 6be35c70 | 675 | |
| 0a7486c9 PA |
676 | epwmss0: epwmss@48300000 { |
| 677 | compatible = "ti,am33xx-pwmss"; | |
| 678 | reg = <0x48300000 0x10>; | |
| 679 | ti,hwmods = "epwmss0"; | |
| 680 | #address-cells = <1>; | |
| 681 | #size-cells = <1>; | |
| 682 | status = "disabled"; | |
| 683 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
| 684 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
| 685 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
| 686 | ||
| 687 | ecap0: ecap@48300100 { | |
| 229110c1 FCJ |
688 | compatible = "ti,am3352-ecap", |
| 689 | "ti,am33xx-ecap"; | |
| 0a7486c9 PA |
690 | #pwm-cells = <3>; |
| 691 | reg = <0x48300100 0x80>; | |
| 229110c1 FCJ |
692 | clocks = <&l4ls_gclk>; |
| 693 | clock-names = "fck"; | |
| e8c85a3e MP |
694 | interrupts = <31>; |
| 695 | interrupt-names = "ecap0"; | |
| 0a7486c9 PA |
696 | status = "disabled"; |
| 697 | }; | |
| 698 | ||
| dce2a652 | 699 | ehrpwm0: pwm@48300200 { |
| 229110c1 FCJ |
700 | compatible = "ti,am3352-ehrpwm", |
| 701 | "ti,am33xx-ehrpwm"; | |
| 0a7486c9 PA |
702 | #pwm-cells = <3>; |
| 703 | reg = <0x48300200 0x80>; | |
| 229110c1 FCJ |
704 | clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; |
| 705 | clock-names = "tbclk", "fck"; | |
| 0a7486c9 PA |
706 | status = "disabled"; |
| 707 | }; | |
| 708 | }; | |
| 709 | ||
| 710 | epwmss1: epwmss@48302000 { | |
| 711 | compatible = "ti,am33xx-pwmss"; | |
| 712 | reg = <0x48302000 0x10>; | |
| 713 | ti,hwmods = "epwmss1"; | |
| 714 | #address-cells = <1>; | |
| 715 | #size-cells = <1>; | |
| 716 | status = "disabled"; | |
| 717 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
| 718 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
| 719 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
| 720 | ||
| 721 | ecap1: ecap@48302100 { | |
| 229110c1 FCJ |
722 | compatible = "ti,am3352-ecap", |
| 723 | "ti,am33xx-ecap"; | |
| 0a7486c9 PA |
724 | #pwm-cells = <3>; |
| 725 | reg = <0x48302100 0x80>; | |
| 229110c1 FCJ |
726 | clocks = <&l4ls_gclk>; |
| 727 | clock-names = "fck"; | |
| e8c85a3e MP |
728 | interrupts = <47>; |
| 729 | interrupt-names = "ecap1"; | |
| 0a7486c9 PA |
730 | status = "disabled"; |
| 731 | }; | |
| 732 | ||
| dce2a652 | 733 | ehrpwm1: pwm@48302200 { |
| 229110c1 FCJ |
734 | compatible = "ti,am3352-ehrpwm", |
| 735 | "ti,am33xx-ehrpwm"; | |
| 0a7486c9 PA |
736 | #pwm-cells = <3>; |
| 737 | reg = <0x48302200 0x80>; | |
| 229110c1 FCJ |
738 | clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; |
| 739 | clock-names = "tbclk", "fck"; | |
| 0a7486c9 PA |
740 | status = "disabled"; |
| 741 | }; | |
| 742 | }; | |
| 743 | ||
| 744 | epwmss2: epwmss@48304000 { | |
| 745 | compatible = "ti,am33xx-pwmss"; | |
| 746 | reg = <0x48304000 0x10>; | |
| 747 | ti,hwmods = "epwmss2"; | |
| 748 | #address-cells = <1>; | |
| 749 | #size-cells = <1>; | |
| 750 | status = "disabled"; | |
| 751 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
| 752 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
| 753 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
| 754 | ||
| 755 | ecap2: ecap@48304100 { | |
| 229110c1 FCJ |
756 | compatible = "ti,am3352-ecap", |
| 757 | "ti,am33xx-ecap"; | |
| 0a7486c9 PA |
758 | #pwm-cells = <3>; |
| 759 | reg = <0x48304100 0x80>; | |
| 229110c1 FCJ |
760 | clocks = <&l4ls_gclk>; |
| 761 | clock-names = "fck"; | |
| e8c85a3e MP |
762 | interrupts = <61>; |
| 763 | interrupt-names = "ecap2"; | |
| 0a7486c9 PA |
764 | status = "disabled"; |
| 765 | }; | |
| 766 | ||
| dce2a652 | 767 | ehrpwm2: pwm@48304200 { |
| 229110c1 FCJ |
768 | compatible = "ti,am3352-ehrpwm", |
| 769 | "ti,am33xx-ehrpwm"; | |
| 0a7486c9 PA |
770 | #pwm-cells = <3>; |
| 771 | reg = <0x48304200 0x80>; | |
| 229110c1 FCJ |
772 | clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; |
| 773 | clock-names = "tbclk", "fck"; | |
| 0a7486c9 PA |
774 | status = "disabled"; |
| 775 | }; | |
| 776 | }; | |
| 777 | ||
| 1a39a65c | 778 | mac: ethernet@4a100000 { |
| 21696f71 | 779 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
| 1a39a65c | 780 | ti,hwmods = "cpgmac0"; |
| 0987a6ef GC |
781 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
| 782 | clock-names = "fck", "cpts"; | |
| 1a39a65c M |
783 | cpdma_channels = <8>; |
| 784 | ale_entries = <1024>; | |
| 785 | bd_ram_size = <0x2000>; | |
| 1a39a65c M |
786 | mac_control = <0x20>; |
| 787 | slaves = <2>; | |
| e86ac13b | 788 | active_slave = <0>; |
| 1a39a65c M |
789 | cpts_clock_mult = <0x80000000>; |
| 790 | cpts_clock_shift = <29>; | |
| 791 | reg = <0x4a100000 0x800 | |
| 792 | 0x4a101200 0x100>; | |
| 793 | #address-cells = <1>; | |
| 794 | #size-cells = <1>; | |
| 795 | interrupt-parent = <&intc>; | |
| 796 | /* | |
| 797 | * c0_rx_thresh_pend | |
| 798 | * c0_rx_pend | |
| 799 | * c0_tx_pend | |
| 800 | * c0_misc_pend | |
| 801 | */ | |
| 802 | interrupts = <40 41 42 43>; | |
| 803 | ranges; | |
| e3bc5358 | 804 | syscon = <&scm_conf>; |
| 16c75a13 | 805 | status = "disabled"; |
| 1a39a65c M |
806 | |
| 807 | davinci_mdio: mdio@4a101000 { | |
| 9efd1a6f | 808 | compatible = "ti,cpsw-mdio","ti,davinci_mdio"; |
| 1a39a65c M |
809 | #address-cells = <1>; |
| 810 | #size-cells = <0>; | |
| 811 | ti,hwmods = "davinci_mdio"; | |
| 812 | bus_freq = <1000000>; | |
| 813 | reg = <0x4a101000 0x100>; | |
| 16c75a13 | 814 | status = "disabled"; |
| 1a39a65c M |
815 | }; |
| 816 | ||
| 817 | cpsw_emac0: slave@4a100200 { | |
| 818 | /* Filled in by U-Boot */ | |
| 819 | mac-address = [ 00 00 00 00 00 00 ]; | |
| 820 | }; | |
| 821 | ||
| 822 | cpsw_emac1: slave@4a100300 { | |
| 823 | /* Filled in by U-Boot */ | |
| 824 | mac-address = [ 00 00 00 00 00 00 ]; | |
| 825 | }; | |
| 39ffbd91 M |
826 | |
| 827 | phy_sel: cpsw-phy-sel@44e10650 { | |
| 828 | compatible = "ti,am3352-cpsw-phy-sel"; | |
| 829 | reg= <0x44e10650 0x4>; | |
| 830 | reg-names = "gmii-sel"; | |
| 831 | }; | |
| 1a39a65c | 832 | }; |
| f6575c90 VB |
833 | |
| 834 | ocmcram: ocmcram@40300000 { | |
| 8b9a2810 RN |
835 | compatible = "mmio-sram"; |
| 836 | reg = <0x40300000 0x10000>; /* 64k */ | |
| f6575c90 VB |
837 | }; |
| 838 | ||
| 15e8246b PA |
839 | elm: elm@48080000 { |
| 840 | compatible = "ti,am3352-elm"; | |
| 841 | reg = <0x48080000 0x2000>; | |
| 842 | interrupts = <4>; | |
| 843 | ti,hwmods = "elm"; | |
| d6cfc1e2 BP |
844 | status = "disabled"; |
| 845 | }; | |
| 846 | ||
| 847 | lcdc: lcdc@4830e000 { | |
| 848 | compatible = "ti,am33xx-tilcdc"; | |
| 849 | reg = <0x4830e000 0x1000>; | |
| 850 | interrupt-parent = <&intc>; | |
| 851 | interrupts = <36>; | |
| 852 | ti,hwmods = "lcdc"; | |
| 15e8246b PA |
853 | status = "disabled"; |
| 854 | }; | |
| 855 | ||
| a82279dd PR |
856 | tscadc: tscadc@44e0d000 { |
| 857 | compatible = "ti,am3359-tscadc"; | |
| 858 | reg = <0x44e0d000 0x1000>; | |
| 859 | interrupt-parent = <&intc>; | |
| 860 | interrupts = <16>; | |
| 861 | ti,hwmods = "adc_tsc"; | |
| 862 | status = "disabled"; | |
| 55e871fc M |
863 | dmas = <&edma 53 0>, <&edma 57 0>; |
| 864 | dma-names = "fifo0", "fifo1"; | |
| a82279dd PR |
865 | |
| 866 | tsc { | |
| 867 | compatible = "ti,am3359-tsc"; | |
| 868 | }; | |
| 869 | am335x_adc: adc { | |
| 870 | #io-channel-cells = <1>; | |
| 871 | compatible = "ti,am3359-adc"; | |
| 872 | }; | |
| a82279dd PR |
873 | }; |
| 874 | ||
| e45879ec PA |
875 | gpmc: gpmc@50000000 { |
| 876 | compatible = "ti,am3352-gpmc"; | |
| 877 | ti,hwmods = "gpmc"; | |
| f12ecbe2 | 878 | ti,no-idle-on-init; |
| e45879ec PA |
879 | reg = <0x50000000 0x2000>; |
| 880 | interrupts = <100>; | |
| a2abf904 | 881 | dmas = <&edma 52 0>; |
| 201c7e33 | 882 | dma-names = "rxtx"; |
| 00dddcaa LP |
883 | gpmc,num-cs = <7>; |
| 884 | gpmc,num-waitpins = <2>; | |
| e45879ec PA |
885 | #address-cells = <2>; |
| 886 | #size-cells = <1>; | |
| 03752148 RQ |
887 | interrupt-controller; |
| 888 | #interrupt-cells = <2>; | |
| 4eb4dd57 RQ |
889 | gpio-controller; |
| 890 | #gpio-cells = <2>; | |
| e45879ec PA |
891 | status = "disabled"; |
| 892 | }; | |
| f8302e1e MG |
893 | |
| 894 | sham: sham@53100000 { | |
| 895 | compatible = "ti,omap4-sham"; | |
| 896 | ti,hwmods = "sham"; | |
| 897 | reg = <0x53100000 0x200>; | |
| 898 | interrupts = <109>; | |
| b5e50906 | 899 | dmas = <&edma 36 0>; |
| f8302e1e MG |
900 | dma-names = "rx"; |
| 901 | }; | |
| 99919e5e MG |
902 | |
| 903 | aes: aes@53500000 { | |
| 904 | compatible = "ti,omap4-aes"; | |
| 905 | ti,hwmods = "aes"; | |
| 906 | reg = <0x53500000 0xa0>; | |
| 7af8884a | 907 | interrupts = <103>; |
| b5e50906 PU |
908 | dmas = <&edma 6 0>, |
| 909 | <&edma 5 0>; | |
| 99919e5e MG |
910 | dma-names = "tx", "rx"; |
| 911 | }; | |
| 3f72f875 PA |
912 | |
| 913 | mcasp0: mcasp@48038000 { | |
| 914 | compatible = "ti,am33xx-mcasp-audio"; | |
| 915 | ti,hwmods = "mcasp0"; | |
| 0bee55ab JS |
916 | reg = <0x48038000 0x2000>, |
| 917 | <0x46000000 0x400000>; | |
| 918 | reg-names = "mpu", "dat"; | |
| 3f72f875 | 919 | interrupts = <80>, <81>; |
| ae107d06 | 920 | interrupt-names = "tx", "rx"; |
| 3f72f875 | 921 | status = "disabled"; |
| b5e50906 PU |
922 | dmas = <&edma 8 2>, |
| 923 | <&edma 9 2>; | |
| 3f72f875 PA |
924 | dma-names = "tx", "rx"; |
| 925 | }; | |
| 926 | ||
| 927 | mcasp1: mcasp@4803C000 { | |
| 928 | compatible = "ti,am33xx-mcasp-audio"; | |
| 929 | ti,hwmods = "mcasp1"; | |
| 0bee55ab JS |
930 | reg = <0x4803C000 0x2000>, |
| 931 | <0x46400000 0x400000>; | |
| 932 | reg-names = "mpu", "dat"; | |
| 3f72f875 | 933 | interrupts = <82>, <83>; |
| ae107d06 | 934 | interrupt-names = "tx", "rx"; |
| 3f72f875 | 935 | status = "disabled"; |
| b5e50906 PU |
936 | dmas = <&edma 10 2>, |
| 937 | <&edma 11 2>; | |
| 3f72f875 PA |
938 | dma-names = "tx", "rx"; |
| 939 | }; | |
| ed845d6b LV |
940 | |
| 941 | rng: rng@48310000 { | |
| 942 | compatible = "ti,omap4-rng"; | |
| 943 | ti,hwmods = "rng"; | |
| 944 | reg = <0x48310000 0x2000>; | |
| 945 | interrupts = <111>; | |
| 946 | }; | |
| 5fc0b42a AC |
947 | }; |
| 948 | }; | |
| ea291c98 TK |
949 | |
| 950 | /include/ "am33xx-clocks.dtsi" |