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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4a45787d FB |
2 | /* |
3 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
4a45787d FB |
4 | */ |
5 | ||
6 | /* AM437x SK EVM */ | |
7 | ||
8 | /dts-v1/; | |
9 | ||
10 | #include "am4372.dtsi" | |
11 | #include <dt-bindings/pinctrl/am43xx.h> | |
12 | #include <dt-bindings/pwm/pwm.h> | |
13 | #include <dt-bindings/gpio/gpio.h> | |
14 | #include <dt-bindings/input/input.h> | |
443ef126 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
4a45787d FB |
16 | |
17 | / { | |
18 | model = "TI AM437x SK EVM"; | |
19 | compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; | |
20 | ||
21 | aliases { | |
22 | display0 = &lcd0; | |
23 | }; | |
24 | ||
24a1eb45 LV |
25 | chosen { |
26 | stdout-path = &uart0; | |
27 | }; | |
28 | ||
fff51e77 K |
29 | /* fixed 32k external oscillator clock */ |
30 | clk_32k_rtc: clk_32k_rtc { | |
31 | #clock-cells = <0>; | |
32 | compatible = "fixed-clock"; | |
33 | clock-frequency = <32768>; | |
34 | }; | |
35 | ||
dc5eedd3 | 36 | lcd_bl: backlight { |
4a45787d FB |
37 | compatible = "pwm-backlight"; |
38 | pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; | |
39 | brightness-levels = <0 51 53 56 62 75 101 152 255>; | |
40 | default-brightness-level = <8>; | |
41 | }; | |
42 | ||
43 | sound { | |
20746c50 PU |
44 | compatible = "simple-audio-card"; |
45 | simple-audio-card,name = "AM437x-SK-EVM"; | |
46 | simple-audio-card,widgets = | |
47 | "Headphone", "Headphone Jack", | |
48 | "Line", "Line In"; | |
49 | simple-audio-card,routing = | |
50 | "Headphone Jack", "HPLOUT", | |
51 | "Headphone Jack", "HPROUT", | |
52 | "LINE1L", "Line In", | |
53 | "LINE1R", "Line In"; | |
54 | simple-audio-card,format = "dsp_b"; | |
55 | simple-audio-card,bitclock-master = <&sound_master>; | |
56 | simple-audio-card,frame-master = <&sound_master>; | |
57 | simple-audio-card,bitclock-inversion; | |
58 | ||
59 | simple-audio-card,cpu { | |
60 | sound-dai = <&mcasp1>; | |
61 | }; | |
62 | ||
63 | sound_master: simple-audio-card,codec { | |
64 | sound-dai = <&tlv320aic3106>; | |
65 | system-clock-frequency = <24000000>; | |
66 | }; | |
4a45787d FB |
67 | }; |
68 | ||
18ad99d4 | 69 | matrix_keypad: matrix_keypad0 { |
4a45787d FB |
70 | compatible = "gpio-matrix-keypad"; |
71 | ||
72 | pinctrl-names = "default"; | |
73 | pinctrl-0 = <&matrix_keypad_pins>; | |
74 | ||
75 | debounce-delay-ms = <5>; | |
f6b957fd | 76 | col-scan-delay-us = <5>; |
4a45787d FB |
77 | |
78 | row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ | |
79 | &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ | |
80 | ||
81 | col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ | |
82 | &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ | |
83 | ||
84 | linux,keymap = < | |
85 | MATRIX_KEY(0, 0, KEY_DOWN) | |
86 | MATRIX_KEY(0, 1, KEY_RIGHT) | |
87 | MATRIX_KEY(1, 0, KEY_LEFT) | |
88 | MATRIX_KEY(1, 1, KEY_UP) | |
89 | >; | |
90 | }; | |
91 | ||
92 | leds { | |
93 | compatible = "gpio-leds"; | |
94 | ||
95 | pinctrl-names = "default"; | |
96 | pinctrl-0 = <&leds_pins>; | |
97 | ||
c731abd9 | 98 | led0 { |
4a45787d FB |
99 | label = "am437x-sk:red:heartbeat"; |
100 | gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ | |
101 | linux,default-trigger = "heartbeat"; | |
102 | default-state = "off"; | |
103 | }; | |
104 | ||
c731abd9 | 105 | led1 { |
4a45787d FB |
106 | label = "am437x-sk:green:mmc1"; |
107 | gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ | |
108 | linux,default-trigger = "mmc0"; | |
109 | default-state = "off"; | |
110 | }; | |
111 | ||
c731abd9 | 112 | led2 { |
4a45787d FB |
113 | label = "am437x-sk:blue:cpu0"; |
114 | gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ | |
115 | linux,default-trigger = "cpu0"; | |
116 | default-state = "off"; | |
117 | }; | |
118 | ||
c731abd9 | 119 | led3 { |
4a45787d FB |
120 | label = "am437x-sk:blue:usr3"; |
121 | gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ | |
122 | default-state = "off"; | |
123 | }; | |
124 | }; | |
125 | ||
126 | lcd0: display { | |
d73f825e | 127 | compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; |
4a45787d FB |
128 | label = "lcd"; |
129 | ||
130 | pinctrl-names = "default"; | |
131 | pinctrl-0 = <&lcd_pins>; | |
132 | ||
dc5eedd3 PU |
133 | backlight = <&lcd_bl>; |
134 | ||
4a45787d FB |
135 | enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
136 | ||
137 | panel-timing { | |
138 | clock-frequency = <9000000>; | |
139 | hactive = <480>; | |
140 | vactive = <272>; | |
d73f825e TV |
141 | hfront-porch = <2>; |
142 | hback-porch = <2>; | |
143 | hsync-len = <41>; | |
144 | vfront-porch = <2>; | |
145 | vback-porch = <2>; | |
4a45787d FB |
146 | vsync-len = <10>; |
147 | hsync-active = <0>; | |
148 | vsync-active = <0>; | |
149 | de-active = <1>; | |
150 | pixelclk-active = <1>; | |
151 | }; | |
152 | ||
153 | port { | |
154 | lcd_in: endpoint { | |
155 | remote-endpoint = <&dpi_out>; | |
156 | }; | |
157 | }; | |
158 | }; | |
443ef126 ER |
159 | |
160 | vmmcwl_fixed: fixedregulator-mmcwl { | |
161 | /* | |
162 | * WL_EN is not SDIO standard compliant. It is an out of band | |
163 | * signal and hard to be dealt with in a standard way by the | |
164 | * SDIO core driver. | |
165 | * So modelling the WL_EN line as a regulator was a natural | |
166 | * choice as the MMC core already deals with MMC supplies. | |
167 | */ | |
168 | compatible = "regulator-fixed"; | |
169 | regulator-name = "vmmcwl_fixed"; | |
170 | regulator-min-microvolt = <1800000>; | |
171 | regulator-max-microvolt = <1800000>; | |
172 | gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>; | |
173 | enable-active-high; | |
174 | }; | |
4a45787d FB |
175 | }; |
176 | ||
177 | &am43xx_pinmux { | |
178 | matrix_keypad_pins: matrix_keypad_pins { | |
179 | pinctrl-single,pins = < | |
e98ceb23 JMC |
180 | AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ |
181 | AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ | |
182 | AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ | |
183 | AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ | |
4a45787d FB |
184 | >; |
185 | }; | |
186 | ||
187 | leds_pins: leds_pins { | |
188 | pinctrl-single,pins = < | |
e98ceb23 JMC |
189 | AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ |
190 | AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ | |
191 | AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ | |
192 | AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ | |
4a45787d FB |
193 | >; |
194 | }; | |
195 | ||
196 | i2c0_pins: i2c0_pins { | |
197 | pinctrl-single,pins = < | |
e98ceb23 JMC |
198 | AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
199 | AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
4a45787d FB |
200 | >; |
201 | }; | |
202 | ||
203 | i2c1_pins: i2c1_pins { | |
204 | pinctrl-single,pins = < | |
e98ceb23 JMC |
205 | AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ |
206 | AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ | |
4a45787d FB |
207 | >; |
208 | }; | |
209 | ||
210 | mmc1_pins: pinmux_mmc1_pins { | |
211 | pinctrl-single,pins = < | |
e98ceb23 JMC |
212 | AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ |
213 | AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ | |
214 | AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ | |
215 | AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ | |
216 | AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ | |
217 | AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ | |
218 | AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
4a45787d FB |
219 | >; |
220 | }; | |
221 | ||
222 | ecap0_pins: backlight_pins { | |
223 | pinctrl-single,pins = < | |
e98ceb23 | 224 | AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ |
4a45787d FB |
225 | >; |
226 | }; | |
227 | ||
228 | edt_ft5306_ts_pins: edt_ft5306_ts_pins { | |
229 | pinctrl-single,pins = < | |
e98ceb23 JMC |
230 | AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ |
231 | AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ | |
4a45787d FB |
232 | >; |
233 | }; | |
234 | ||
5ccaa6ec DE |
235 | vpfe0_pins_default: vpfe0_pins_default { |
236 | pinctrl-single,pins = < | |
e98ceb23 JMC |
237 | AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ |
238 | AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ | |
239 | AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ | |
240 | AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ | |
241 | AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ | |
242 | AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ | |
243 | AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ | |
244 | AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ | |
245 | AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ | |
246 | AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ | |
247 | AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ | |
248 | AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ | |
249 | AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ | |
250 | AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ | |
251 | AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ | |
5ccaa6ec DE |
252 | >; |
253 | }; | |
254 | ||
255 | vpfe0_pins_sleep: vpfe0_pins_sleep { | |
256 | pinctrl-single,pins = < | |
e98ceb23 JMC |
257 | AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
258 | AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
259 | AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
260 | AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
261 | AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
262 | AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
263 | AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
264 | AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
265 | AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
266 | AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
267 | AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
268 | AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
269 | AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
270 | AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
271 | AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) | |
5ccaa6ec DE |
272 | >; |
273 | }; | |
274 | ||
4a45787d FB |
275 | cpsw_default: cpsw_default { |
276 | pinctrl-single,pins = < | |
277 | /* Slave 1 */ | |
e98ceb23 JMC |
278 | AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ |
279 | AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
280 | AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
281 | AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
282 | AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ | |
283 | AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ | |
284 | AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ | |
285 | AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
286 | AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
287 | AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
288 | AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ | |
289 | AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ | |
4a45787d FB |
290 | |
291 | /* Slave 2 */ | |
e98ceb23 JMC |
292 | AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
293 | AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
294 | AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
295 | AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
296 | AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
297 | AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
298 | AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
299 | AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ | |
300 | AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
301 | AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
302 | AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
303 | AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
4a45787d FB |
304 | >; |
305 | }; | |
306 | ||
307 | cpsw_sleep: cpsw_sleep { | |
308 | pinctrl-single,pins = < | |
309 | /* Slave 1 reset value */ | |
e98ceb23 JMC |
310 | AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
311 | AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
312 | AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
313 | AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
314 | AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
315 | AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
316 | AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
317 | AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
318 | AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
319 | AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
320 | AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
321 | AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
4a45787d FB |
322 | |
323 | /* Slave 2 reset value */ | |
e98ceb23 JMC |
324 | AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) |
325 | AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
326 | AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
327 | AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
328 | AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
329 | AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
330 | AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
331 | AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
332 | AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
333 | AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
334 | AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
335 | AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
4a45787d FB |
336 | >; |
337 | }; | |
338 | ||
339 | davinci_mdio_default: davinci_mdio_default { | |
340 | pinctrl-single,pins = < | |
341 | /* MDIO */ | |
e98ceb23 JMC |
342 | AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
343 | AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
4a45787d FB |
344 | >; |
345 | }; | |
346 | ||
347 | davinci_mdio_sleep: davinci_mdio_sleep { | |
348 | pinctrl-single,pins = < | |
349 | /* MDIO reset value */ | |
e98ceb23 JMC |
350 | AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) |
351 | AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
4a45787d FB |
352 | >; |
353 | }; | |
354 | ||
355 | dss_pins: dss_pins { | |
356 | pinctrl-single,pins = < | |
e98ceb23 JMC |
357 | AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ |
358 | AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) | |
359 | AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) | |
360 | AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) | |
361 | AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) | |
362 | AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) | |
363 | AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) | |
364 | AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ | |
365 | AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ | |
366 | AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) | |
367 | AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) | |
368 | AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) | |
369 | AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) | |
370 | AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) | |
371 | AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) | |
372 | AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) | |
373 | AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) | |
374 | AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) | |
375 | AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) | |
376 | AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) | |
377 | AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) | |
378 | AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) | |
379 | AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) | |
380 | AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ | |
381 | AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ | |
382 | AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ | |
383 | AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ | |
384 | AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ | |
4a45787d FB |
385 | |
386 | >; | |
387 | }; | |
388 | ||
389 | qspi_pins: qspi_pins { | |
390 | pinctrl-single,pins = < | |
e98ceb23 JMC |
391 | AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ |
392 | AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ | |
393 | AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ | |
394 | AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ | |
395 | AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ | |
396 | AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ | |
4a45787d FB |
397 | >; |
398 | }; | |
399 | ||
400 | mcasp1_pins: mcasp1_pins { | |
401 | pinctrl-single,pins = < | |
e98ceb23 JMC |
402 | AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
403 | AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ | |
404 | AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ | |
405 | AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ | |
4a45787d FB |
406 | >; |
407 | }; | |
408 | ||
7155ace4 PU |
409 | mcasp1_pins_sleep: mcasp1_pins_sleep { |
410 | pinctrl-single,pins = < | |
e98ceb23 JMC |
411 | AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
412 | AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
413 | AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
414 | AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) | |
7155ace4 PU |
415 | >; |
416 | }; | |
417 | ||
4a45787d FB |
418 | lcd_pins: lcd_pins { |
419 | pinctrl-single,pins = < | |
e98ceb23 | 420 | AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ |
4a45787d FB |
421 | >; |
422 | }; | |
221fed3c FB |
423 | |
424 | usb1_pins: usb1_pins { | |
425 | pinctrl-single,pins = < | |
e98ceb23 | 426 | AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ |
221fed3c FB |
427 | >; |
428 | }; | |
429 | ||
430 | usb2_pins: usb2_pins { | |
431 | pinctrl-single,pins = < | |
e98ceb23 | 432 | AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ |
221fed3c FB |
433 | >; |
434 | }; | |
443ef126 ER |
435 | |
436 | mmc3_pins_default: pinmux_mmc3_pins_default { | |
437 | pinctrl-single,pins = < | |
438 | AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */ | |
439 | AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */ | |
440 | AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */ | |
441 | AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */ | |
442 | AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */ | |
443 | AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */ | |
444 | >; | |
445 | }; | |
446 | ||
447 | mmc3_pins_sleep: pinmux_mmc3_pins_sleep { | |
448 | pinctrl-single,pins = < | |
449 | AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */ | |
450 | AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */ | |
451 | AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */ | |
452 | AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */ | |
453 | AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */ | |
454 | AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */ | |
455 | >; | |
456 | }; | |
457 | ||
458 | wlan_pins_default: pinmux_wlan_pins_default { | |
459 | pinctrl-single,pins = < | |
460 | AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ | |
461 | AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ | |
462 | >; | |
463 | }; | |
464 | ||
465 | wlan_pins_sleep: pinmux_wlan_pins_sleep { | |
466 | pinctrl-single,pins = < | |
467 | AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */ | |
468 | AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */ | |
469 | >; | |
470 | }; | |
471 | ||
472 | uart1_bt_pins_default: pinmux_uart1_bt_pins_default { | |
473 | pinctrl-single,pins = < | |
474 | AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */ | |
475 | AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ | |
476 | AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ | |
477 | AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ | |
478 | AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ | |
479 | >; | |
480 | }; | |
481 | ||
482 | uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep { | |
483 | pinctrl-single,pins = < | |
484 | AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */ | |
485 | AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */ | |
486 | AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */ | |
487 | AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */ | |
488 | AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */ | |
489 | >; | |
490 | }; | |
4a45787d FB |
491 | }; |
492 | ||
493 | &i2c0 { | |
494 | status = "okay"; | |
495 | pinctrl-names = "default"; | |
496 | pinctrl-0 = <&i2c0_pins>; | |
d279f7a7 | 497 | clock-frequency = <100000>; |
4a45787d FB |
498 | |
499 | tps@24 { | |
500 | compatible = "ti,tps65218"; | |
501 | reg = <0x24>; | |
21135b6e | 502 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
4a45787d FB |
503 | interrupt-controller; |
504 | #interrupt-cells = <2>; | |
505 | ||
506 | dcdc1: regulator-dcdc1 { | |
4a45787d FB |
507 | /* VDD_CORE limits min of OPP50 and max of OPP100 */ |
508 | regulator-name = "vdd_core"; | |
509 | regulator-min-microvolt = <912000>; | |
510 | regulator-max-microvolt = <1144000>; | |
511 | regulator-boot-on; | |
512 | regulator-always-on; | |
513 | }; | |
514 | ||
515 | dcdc2: regulator-dcdc2 { | |
4a45787d FB |
516 | /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ |
517 | regulator-name = "vdd_mpu"; | |
518 | regulator-min-microvolt = <912000>; | |
519 | regulator-max-microvolt = <1378000>; | |
520 | regulator-boot-on; | |
521 | regulator-always-on; | |
522 | }; | |
523 | ||
524 | dcdc3: regulator-dcdc3 { | |
4a45787d | 525 | regulator-name = "vdds_ddr"; |
4a45787d FB |
526 | regulator-boot-on; |
527 | regulator-always-on; | |
1bc5e139 K |
528 | regulator-state-mem { |
529 | regulator-on-in-suspend; | |
530 | }; | |
5a9009f3 TK |
531 | regulator-state-disk { |
532 | regulator-off-in-suspend; | |
533 | }; | |
4a45787d FB |
534 | }; |
535 | ||
536 | dcdc4: regulator-dcdc4 { | |
4a45787d FB |
537 | regulator-name = "v3_3d"; |
538 | regulator-min-microvolt = <3300000>; | |
539 | regulator-max-microvolt = <3300000>; | |
540 | regulator-boot-on; | |
541 | regulator-always-on; | |
542 | }; | |
543 | ||
1bc5e139 K |
544 | dcdc5: regulator-dcdc5 { |
545 | compatible = "ti,tps65218-dcdc5"; | |
546 | regulator-name = "v1_0bat"; | |
547 | regulator-min-microvolt = <1000000>; | |
548 | regulator-max-microvolt = <1000000>; | |
549 | regulator-boot-on; | |
550 | regulator-always-on; | |
551 | regulator-state-mem { | |
552 | regulator-on-in-suspend; | |
553 | }; | |
554 | }; | |
555 | ||
556 | dcdc6: regulator-dcdc6 { | |
557 | compatible = "ti,tps65218-dcdc6"; | |
558 | regulator-name = "v1_8bat"; | |
559 | regulator-min-microvolt = <1800000>; | |
560 | regulator-max-microvolt = <1800000>; | |
561 | regulator-boot-on; | |
562 | regulator-always-on; | |
563 | regulator-state-mem { | |
564 | regulator-on-in-suspend; | |
565 | }; | |
566 | }; | |
567 | ||
4a45787d | 568 | ldo1: regulator-ldo1 { |
4a45787d FB |
569 | regulator-name = "v1_8d"; |
570 | regulator-min-microvolt = <1800000>; | |
571 | regulator-max-microvolt = <1800000>; | |
572 | regulator-boot-on; | |
573 | regulator-always-on; | |
574 | }; | |
575 | ||
bb1c5fe1 FB |
576 | power-button { |
577 | compatible = "ti,tps65218-pwrbutton"; | |
578 | status = "okay"; | |
579 | interrupts = <3 IRQ_TYPE_EDGE_BOTH>; | |
580 | }; | |
4a45787d FB |
581 | }; |
582 | ||
583 | at24@50 { | |
05e7d622 | 584 | compatible = "atmel,24c256"; |
4a45787d FB |
585 | pagesize = <64>; |
586 | reg = <0x50>; | |
587 | }; | |
588 | }; | |
589 | ||
590 | &i2c1 { | |
591 | status = "okay"; | |
592 | pinctrl-names = "default"; | |
593 | pinctrl-0 = <&i2c1_pins>; | |
594 | clock-frequency = <400000>; | |
595 | ||
596 | edt-ft5306@38 { | |
597 | status = "okay"; | |
598 | compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; | |
599 | pinctrl-names = "default"; | |
600 | pinctrl-0 = <&edt_ft5306_ts_pins>; | |
601 | ||
602 | reg = <0x38>; | |
603 | interrupt-parent = <&gpio0>; | |
09bb4319 | 604 | interrupts = <31 IRQ_TYPE_EDGE_FALLING>; |
4a45787d | 605 | |
faa4ec1e | 606 | reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; |
4a45787d FB |
607 | |
608 | touchscreen-size-x = <480>; | |
609 | touchscreen-size-y = <272>; | |
49a6ec5b DM |
610 | |
611 | wakeup-source; | |
4a45787d FB |
612 | }; |
613 | ||
614 | tlv320aic3106: tlv320aic3106@1b { | |
20746c50 | 615 | #sound-dai-cells = <0>; |
4a45787d FB |
616 | compatible = "ti,tlv320aic3106"; |
617 | reg = <0x1b>; | |
618 | status = "okay"; | |
619 | ||
620 | /* Regulators */ | |
621 | AVDD-supply = <&dcdc4>; | |
622 | IOVDD-supply = <&dcdc4>; | |
623 | DRVDD-supply = <&dcdc4>; | |
624 | DVDD-supply = <&ldo1>; | |
625 | }; | |
626 | ||
627 | lis331dlh@18 { | |
628 | compatible = "st,lis331dlh"; | |
629 | reg = <0x18>; | |
630 | status = "okay"; | |
631 | ||
632 | Vdd-supply = <&dcdc4>; | |
633 | Vdd_IO-supply = <&dcdc4>; | |
634 | interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; | |
635 | }; | |
636 | }; | |
637 | ||
638 | &epwmss0 { | |
639 | status = "okay"; | |
640 | }; | |
641 | ||
642 | &ecap0 { | |
643 | status = "okay"; | |
644 | pinctrl-names = "default"; | |
645 | pinctrl-0 = <&ecap0_pins>; | |
646 | }; | |
647 | ||
648 | &gpio0 { | |
649 | status = "okay"; | |
650 | }; | |
651 | ||
652 | &gpio1 { | |
653 | status = "okay"; | |
654 | }; | |
655 | ||
443ef126 ER |
656 | &gpio4 { |
657 | status = "okay"; | |
658 | }; | |
659 | ||
4a45787d FB |
660 | &gpio5 { |
661 | status = "okay"; | |
662 | }; | |
663 | ||
664 | &mmc1 { | |
665 | status = "okay"; | |
666 | pinctrl-names = "default"; | |
667 | pinctrl-0 = <&mmc1_pins>; | |
668 | ||
669 | vmmc-supply = <&dcdc4>; | |
670 | bus-width = <4>; | |
0731cbdd | 671 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
4a45787d FB |
672 | }; |
673 | ||
443ef126 ER |
674 | &uart1 { |
675 | status = "okay"; | |
676 | pinctrl-names = "default", "sleep"; | |
677 | pinctrl-0 = <&uart1_bt_pins_default>; | |
678 | pinctrl-1 = <&uart1_bt_pins_sleep>; | |
679 | }; | |
680 | ||
681 | &mmc3 { | |
682 | status = "okay"; | |
683 | /* | |
684 | * these are on the crossbar and are outlined in the | |
685 | * xbar-event-map element | |
686 | */ | |
687 | dmas = <&edma_xbar 30 0 1>, | |
688 | <&edma_xbar 31 0 2>; | |
689 | dma-names = "tx", "rx"; | |
690 | vmmc-supply = <&vmmcwl_fixed>; | |
691 | bus-width = <4>; | |
692 | pinctrl-names = "default", "sleep"; | |
693 | pinctrl-0 = <&mmc3_pins_default>; | |
694 | pinctrl-1 = <&mmc3_pins_sleep>; | |
695 | cap-power-off-card; | |
696 | keep-power-in-suspend; | |
697 | ti,non-removable; | |
698 | ||
699 | #address-cells = <1>; | |
700 | #size-cells = <0>; | |
701 | wlcore: wlcore@2 { | |
702 | compatible = "ti,wl1835"; | |
703 | pinctrl-names = "default", "sleep"; | |
704 | pinctrl-0 = <&wlan_pins_default>; | |
705 | pinctrl-1 = <&wlan_pins_sleep>; | |
706 | reg = <2>; | |
707 | interrupt-parent = <&gpio4>; | |
708 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; | |
709 | }; | |
710 | }; | |
711 | ||
4a45787d FB |
712 | &usb2_phy1 { |
713 | status = "okay"; | |
714 | }; | |
715 | ||
716 | &usb1 { | |
54cab61a | 717 | dr_mode = "otg"; |
4a45787d | 718 | status = "okay"; |
221fed3c FB |
719 | pinctrl-names = "default"; |
720 | pinctrl-0 = <&usb1_pins>; | |
4a45787d FB |
721 | }; |
722 | ||
723 | &usb2_phy2 { | |
724 | status = "okay"; | |
725 | }; | |
726 | ||
727 | &usb2 { | |
728 | dr_mode = "host"; | |
729 | status = "okay"; | |
221fed3c FB |
730 | pinctrl-names = "default"; |
731 | pinctrl-0 = <&usb2_pins>; | |
4a45787d FB |
732 | }; |
733 | ||
734 | &qspi { | |
735 | status = "okay"; | |
736 | pinctrl-names = "default"; | |
737 | pinctrl-0 = <&qspi_pins>; | |
738 | ||
739 | spi-max-frequency = <48000000>; | |
740 | m25p80@0 { | |
741 | compatible = "mx66l51235l"; | |
742 | spi-max-frequency = <48000000>; | |
743 | reg = <0>; | |
744 | spi-cpol; | |
745 | spi-cpha; | |
746 | spi-tx-bus-width = <1>; | |
747 | spi-rx-bus-width = <4>; | |
748 | #address-cells = <1>; | |
749 | #size-cells = <1>; | |
750 | ||
751 | /* MTD partition table. | |
752 | * The ROM checks the first 512KiB | |
753 | * for a valid file to boot(XIP). | |
754 | */ | |
755 | partition@0 { | |
756 | label = "QSPI.U_BOOT"; | |
757 | reg = <0x00000000 0x000080000>; | |
758 | }; | |
759 | partition@1 { | |
760 | label = "QSPI.U_BOOT.backup"; | |
761 | reg = <0x00080000 0x00080000>; | |
762 | }; | |
763 | partition@2 { | |
764 | label = "QSPI.U-BOOT-SPL_OS"; | |
765 | reg = <0x00100000 0x00010000>; | |
766 | }; | |
767 | partition@3 { | |
768 | label = "QSPI.U_BOOT_ENV"; | |
769 | reg = <0x00110000 0x00010000>; | |
770 | }; | |
771 | partition@4 { | |
772 | label = "QSPI.U-BOOT-ENV.backup"; | |
773 | reg = <0x00120000 0x00010000>; | |
774 | }; | |
775 | partition@5 { | |
776 | label = "QSPI.KERNEL"; | |
777 | reg = <0x00130000 0x0800000>; | |
778 | }; | |
779 | partition@6 { | |
780 | label = "QSPI.FILESYSTEM"; | |
781 | reg = <0x00930000 0x36D0000>; | |
782 | }; | |
783 | }; | |
784 | }; | |
785 | ||
786 | &mac { | |
787 | pinctrl-names = "default", "sleep"; | |
788 | pinctrl-0 = <&cpsw_default>; | |
789 | pinctrl-1 = <&cpsw_sleep>; | |
790 | dual_emac = <1>; | |
791 | status = "okay"; | |
792 | }; | |
793 | ||
794 | &davinci_mdio { | |
795 | pinctrl-names = "default", "sleep"; | |
796 | pinctrl-0 = <&davinci_mdio_default>; | |
797 | pinctrl-1 = <&davinci_mdio_sleep>; | |
798 | status = "okay"; | |
7c0373b1 GS |
799 | |
800 | ethphy0: ethernet-phy@4 { | |
801 | reg = <4>; | |
802 | }; | |
803 | ||
804 | ethphy1: ethernet-phy@5 { | |
805 | reg = <5>; | |
806 | }; | |
4a45787d FB |
807 | }; |
808 | ||
809 | &cpsw_emac0 { | |
7c0373b1 | 810 | phy-handle = <ðphy0>; |
4a45787d FB |
811 | phy-mode = "rgmii"; |
812 | dual_emac_res_vlan = <1>; | |
813 | }; | |
814 | ||
815 | &cpsw_emac1 { | |
7c0373b1 | 816 | phy-handle = <ðphy1>; |
4a45787d FB |
817 | phy-mode = "rgmii"; |
818 | dual_emac_res_vlan = <2>; | |
819 | }; | |
820 | ||
821 | &elm { | |
822 | status = "okay"; | |
823 | }; | |
824 | ||
825 | &mcasp1 { | |
20746c50 | 826 | #sound-dai-cells = <0>; |
7155ace4 | 827 | pinctrl-names = "default", "sleep"; |
4a45787d | 828 | pinctrl-0 = <&mcasp1_pins>; |
7155ace4 | 829 | pinctrl-1 = <&mcasp1_pins_sleep>; |
4a45787d FB |
830 | |
831 | status = "okay"; | |
832 | ||
833 | op-mode = <0>; | |
834 | tdm-slots = <2>; | |
835 | serial-dir = < | |
836 | 0 0 1 2 | |
837 | >; | |
838 | ||
839 | tx-num-evt = <1>; | |
840 | rx-num-evt = <1>; | |
841 | }; | |
842 | ||
843 | &dss { | |
844 | status = "okay"; | |
845 | ||
846 | pinctrl-names = "default"; | |
847 | pinctrl-0 = <&dss_pins>; | |
848 | ||
849 | port { | |
850 | dpi_out: endpoint@0 { | |
851 | remote-endpoint = <&lcd_in>; | |
852 | data-lines = <24>; | |
853 | }; | |
854 | }; | |
855 | }; | |
856 | ||
857 | &rtc { | |
fff51e77 K |
858 | clocks = <&clk_32k_rtc>, <&clk_32768_ck>; |
859 | clock-names = "ext-clk", "int-clk"; | |
4a45787d FB |
860 | status = "okay"; |
861 | }; | |
862 | ||
863 | &wdt { | |
864 | status = "okay"; | |
865 | }; | |
3e1fe451 DG |
866 | |
867 | &cpu { | |
868 | cpu0-supply = <&dcdc2>; | |
869 | }; | |
5ccaa6ec DE |
870 | |
871 | &vpfe0 { | |
872 | status = "okay"; | |
873 | pinctrl-names = "default", "sleep"; | |
874 | pinctrl-0 = <&vpfe0_pins_default>; | |
875 | pinctrl-1 = <&vpfe0_pins_sleep>; | |
876 | ||
877 | /* Camera port */ | |
878 | port { | |
879 | vpfe0_ep: endpoint { | |
880 | /* remote-endpoint = <&sensor>; add once we have it */ | |
881 | ti,am437x-vpfe-interface = <0>; | |
882 | bus-width = <8>; | |
883 | hsync-active = <0>; | |
884 | vsync-active = <0>; | |
885 | }; | |
886 | }; | |
887 | }; |