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5a0f93c6 NM |
1 | /* |
2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | /dts-v1/; | |
9 | ||
10 | #include "dra74x.dtsi" | |
5a0f93c6 NM |
11 | #include <dt-bindings/gpio/gpio.h> |
12 | #include <dt-bindings/interrupt-controller/irq.h> | |
13 | ||
14 | / { | |
15 | model = "TI AM5728 BeagleBoard-X15"; | |
16 | compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; | |
17 | ||
18 | aliases { | |
19 | rtc0 = &mcp_rtc; | |
20 | rtc1 = &tps659038_rtc; | |
00edd317 | 21 | rtc2 = &rtc; |
0c534938 | 22 | display0 = &hdmi0; |
5a0f93c6 NM |
23 | }; |
24 | ||
25 | memory { | |
26 | device_type = "memory"; | |
dae320ec | 27 | reg = <0x0 0x80000000 0x0 0x80000000>; |
5a0f93c6 NM |
28 | }; |
29 | ||
30 | vdd_3v3: fixedregulator-vdd_3v3 { | |
31 | compatible = "regulator-fixed"; | |
32 | regulator-name = "vdd_3v3"; | |
33 | vin-supply = <®en1>; | |
34 | regulator-min-microvolt = <3300000>; | |
35 | regulator-max-microvolt = <3300000>; | |
36 | }; | |
37 | ||
d929e8bb PU |
38 | aic_dvdd: fixedregulator-aic_dvdd { |
39 | compatible = "regulator-fixed"; | |
40 | regulator-name = "aic_dvdd_fixed"; | |
41 | vin-supply = <&vdd_3v3>; | |
42 | regulator-min-microvolt = <1800000>; | |
43 | regulator-max-microvolt = <1800000>; | |
44 | }; | |
45 | ||
5a0f93c6 NM |
46 | vtt_fixed: fixedregulator-vtt { |
47 | /* TPS51200 */ | |
48 | compatible = "regulator-fixed"; | |
49 | regulator-name = "vtt_fixed"; | |
50 | vin-supply = <&smps3_reg>; | |
51 | regulator-min-microvolt = <3300000>; | |
52 | regulator-max-microvolt = <3300000>; | |
53 | regulator-always-on; | |
54 | regulator-boot-on; | |
55 | enable-active-high; | |
56 | gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; | |
57 | }; | |
58 | ||
59 | leds { | |
60 | compatible = "gpio-leds"; | |
61 | pinctrl-names = "default"; | |
62 | pinctrl-0 = <&leds_pins_default>; | |
63 | ||
64 | led@0 { | |
65 | label = "beagle-x15:usr0"; | |
66 | gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>; | |
67 | linux,default-trigger = "heartbeat"; | |
68 | default-state = "off"; | |
69 | }; | |
70 | ||
71 | led@1 { | |
72 | label = "beagle-x15:usr1"; | |
73 | gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; | |
74 | linux,default-trigger = "cpu0"; | |
75 | default-state = "off"; | |
76 | }; | |
77 | ||
78 | led@2 { | |
79 | label = "beagle-x15:usr2"; | |
80 | gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>; | |
81 | linux,default-trigger = "mmc0"; | |
82 | default-state = "off"; | |
83 | }; | |
84 | ||
85 | led@3 { | |
86 | label = "beagle-x15:usr3"; | |
87 | gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>; | |
88 | linux,default-trigger = "ide-disk"; | |
89 | default-state = "off"; | |
90 | }; | |
91 | }; | |
7a03f2c0 NM |
92 | |
93 | gpio_fan: gpio_fan { | |
94 | /* Based on 5v 500mA AFB02505HHB */ | |
95 | compatible = "gpio-fan"; | |
ed12f102 | 96 | gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>; |
7a03f2c0 NM |
97 | gpio-fan,speed-map = <0 0>, |
98 | <13000 1>; | |
d723cfea | 99 | #cooling-cells = <2>; |
7a03f2c0 | 100 | }; |
f60db98e RQ |
101 | |
102 | extcon_usb1: extcon_usb1 { | |
103 | compatible = "linux,extcon-usb-gpio"; | |
104 | id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>; | |
105 | pinctrl-names = "default"; | |
106 | pinctrl-0 = <&extcon_usb1_pins>; | |
107 | }; | |
108 | ||
0c534938 TV |
109 | hdmi0: connector { |
110 | compatible = "hdmi-connector"; | |
111 | label = "hdmi"; | |
112 | ||
113 | type = "a"; | |
114 | ||
115 | port { | |
116 | hdmi_connector_in: endpoint { | |
117 | remote-endpoint = <&tpd12s015_out>; | |
118 | }; | |
119 | }; | |
120 | }; | |
121 | ||
122 | tpd12s015: encoder { | |
123 | compatible = "ti,tpd12s015"; | |
124 | ||
125 | pinctrl-names = "default"; | |
126 | pinctrl-0 = <&tpd12s015_pins>; | |
127 | ||
128 | gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ | |
129 | <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */ | |
130 | <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ | |
131 | ||
132 | ports { | |
133 | #address-cells = <1>; | |
134 | #size-cells = <0>; | |
135 | ||
136 | port@0 { | |
137 | reg = <0>; | |
138 | ||
139 | tpd12s015_in: endpoint { | |
140 | remote-endpoint = <&hdmi_out>; | |
141 | }; | |
142 | }; | |
143 | ||
144 | port@1 { | |
145 | reg = <1>; | |
146 | ||
147 | tpd12s015_out: endpoint { | |
148 | remote-endpoint = <&hdmi_connector_in>; | |
149 | }; | |
150 | }; | |
151 | }; | |
152 | }; | |
a00e368c | 153 | |
4e8603ef | 154 | sound0: sound0 { |
a00e368c PU |
155 | compatible = "simple-audio-card"; |
156 | simple-audio-card,name = "BeagleBoard-X15"; | |
157 | simple-audio-card,widgets = | |
158 | "Line", "Line Out", | |
159 | "Line", "Line In"; | |
160 | simple-audio-card,routing = | |
161 | "Line Out", "LLOUT", | |
162 | "Line Out", "RLOUT", | |
163 | "MIC2L", "Line In", | |
164 | "MIC2R", "Line In"; | |
165 | simple-audio-card,format = "dsp_b"; | |
166 | simple-audio-card,bitclock-master = <&sound0_master>; | |
167 | simple-audio-card,frame-master = <&sound0_master>; | |
168 | simple-audio-card,bitclock-inversion; | |
169 | ||
170 | simple-audio-card,cpu { | |
171 | sound-dai = <&mcasp3>; | |
172 | }; | |
173 | ||
174 | sound0_master: simple-audio-card,codec { | |
175 | sound-dai = <&tlv320aic3104>; | |
176 | clocks = <&clkout2_clk>; | |
177 | }; | |
178 | }; | |
5a0f93c6 NM |
179 | }; |
180 | ||
181 | &dra7_pmx_core { | |
182 | leds_pins_default: leds_pins_default { | |
183 | pinctrl-single,pins = < | |
f70dfa66 JMC |
184 | DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */ |
185 | DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */ | |
186 | DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */ | |
187 | DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */ | |
5a0f93c6 NM |
188 | >; |
189 | }; | |
190 | ||
191 | i2c1_pins_default: i2c1_pins_default { | |
192 | pinctrl-single,pins = < | |
f70dfa66 JMC |
193 | DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ |
194 | DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ | |
5a0f93c6 NM |
195 | >; |
196 | }; | |
197 | ||
0c534938 TV |
198 | hdmi_pins: pinmux_hdmi_pins { |
199 | pinctrl-single,pins = < | |
f70dfa66 JMC |
200 | DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ |
201 | DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ | |
0c534938 TV |
202 | >; |
203 | }; | |
204 | ||
5a0f93c6 NM |
205 | i2c3_pins_default: i2c3_pins_default { |
206 | pinctrl-single,pins = < | |
f70dfa66 JMC |
207 | DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ |
208 | DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ | |
5a0f93c6 NM |
209 | >; |
210 | }; | |
211 | ||
212 | uart3_pins_default: uart3_pins_default { | |
213 | pinctrl-single,pins = < | |
f70dfa66 JMC |
214 | DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ |
215 | DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ | |
5a0f93c6 NM |
216 | >; |
217 | }; | |
218 | ||
219 | mmc1_pins_default: mmc1_pins_default { | |
220 | pinctrl-single,pins = < | |
f70dfa66 JMC |
221 | DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ |
222 | DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ | |
223 | DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ | |
224 | DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ | |
225 | DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ | |
226 | DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ | |
227 | DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ | |
5a0f93c6 NM |
228 | >; |
229 | }; | |
230 | ||
231 | mmc2_pins_default: mmc2_pins_default { | |
232 | pinctrl-single,pins = < | |
f70dfa66 JMC |
233 | DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ |
234 | DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ | |
235 | DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ | |
236 | DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ | |
237 | DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ | |
238 | DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ | |
239 | DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ | |
240 | DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ | |
241 | DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ | |
242 | DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ | |
5a0f93c6 NM |
243 | >; |
244 | }; | |
245 | ||
a75dacf8 FB |
246 | cpsw_pins_default: cpsw_pins_default { |
247 | pinctrl-single,pins = < | |
248 | /* Slave 1 */ | |
f70dfa66 JMC |
249 | DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */ |
250 | DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */ | |
251 | DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */ | |
252 | DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */ | |
253 | DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */ | |
254 | DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */ | |
255 | DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */ | |
256 | DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */ | |
257 | DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */ | |
258 | DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */ | |
259 | DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */ | |
260 | DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */ | |
a75dacf8 FB |
261 | |
262 | /* Slave 2 */ | |
f70dfa66 JMC |
263 | DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */ |
264 | DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */ | |
265 | DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */ | |
266 | DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */ | |
267 | DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */ | |
268 | DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */ | |
269 | DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */ | |
270 | DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */ | |
271 | DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */ | |
272 | DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */ | |
273 | DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */ | |
274 | DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */ | |
a75dacf8 FB |
275 | >; |
276 | ||
277 | }; | |
278 | ||
279 | cpsw_pins_sleep: cpsw_pins_sleep { | |
280 | pinctrl-single,pins = < | |
281 | /* Slave 1 */ | |
f70dfa66 JMC |
282 | DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) |
283 | DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) | |
284 | DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) | |
285 | DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) | |
286 | DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) | |
287 | DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) | |
288 | DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) | |
289 | DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) | |
290 | DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) | |
291 | DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) | |
292 | DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) | |
293 | DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) | |
a75dacf8 FB |
294 | |
295 | /* Slave 2 */ | |
f70dfa66 JMC |
296 | DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) |
297 | DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) | |
298 | DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) | |
299 | DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) | |
300 | DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) | |
301 | DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) | |
302 | DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) | |
303 | DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) | |
304 | DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) | |
305 | DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) | |
306 | DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) | |
307 | DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) | |
a75dacf8 FB |
308 | >; |
309 | }; | |
310 | ||
311 | davinci_mdio_pins_default: davinci_mdio_pins_default { | |
312 | pinctrl-single,pins = < | |
313 | /* MDIO */ | |
f70dfa66 JMC |
314 | DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */ |
315 | DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */ | |
a75dacf8 FB |
316 | >; |
317 | }; | |
318 | ||
319 | davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { | |
320 | pinctrl-single,pins = < | |
f70dfa66 JMC |
321 | DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15) |
322 | DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15) | |
a75dacf8 FB |
323 | >; |
324 | }; | |
325 | ||
5a0f93c6 NM |
326 | tps659038_pins_default: tps659038_pins_default { |
327 | pinctrl-single,pins = < | |
f70dfa66 | 328 | DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ |
5a0f93c6 NM |
329 | >; |
330 | }; | |
331 | ||
332 | tmp102_pins_default: tmp102_pins_default { | |
333 | pinctrl-single,pins = < | |
f70dfa66 | 334 | DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */ |
5a0f93c6 NM |
335 | >; |
336 | }; | |
337 | ||
338 | mcp79410_pins_default: mcp79410_pins_default { | |
339 | pinctrl-single,pins = < | |
f70dfa66 | 340 | DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ |
5a0f93c6 NM |
341 | >; |
342 | }; | |
343 | ||
344 | usb1_pins: pinmux_usb1_pins { | |
345 | pinctrl-single,pins = < | |
f70dfa66 | 346 | DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ |
5a0f93c6 NM |
347 | >; |
348 | }; | |
349 | ||
f60db98e RQ |
350 | extcon_usb1_pins: extcon_usb1_pins { |
351 | pinctrl-single,pins = < | |
f70dfa66 | 352 | DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */ |
f60db98e RQ |
353 | >; |
354 | }; | |
355 | ||
0c534938 TV |
356 | tpd12s015_pins: pinmux_tpd12s015_pins { |
357 | pinctrl-single,pins = < | |
f70dfa66 JMC |
358 | DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */ |
359 | DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ | |
360 | DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */ | |
0c534938 TV |
361 | >; |
362 | }; | |
a00e368c PU |
363 | |
364 | clkout2_pins_default: clkout2_pins_default { | |
365 | pinctrl-single,pins = < | |
f70dfa66 | 366 | DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */ |
a00e368c PU |
367 | >; |
368 | }; | |
369 | ||
370 | clkout2_pins_sleep: clkout2_pins_sleep { | |
371 | pinctrl-single,pins = < | |
f70dfa66 | 372 | DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */ |
a00e368c PU |
373 | >; |
374 | }; | |
375 | ||
376 | mcasp3_pins_default: mcasp3_pins_default { | |
377 | pinctrl-single,pins = < | |
f70dfa66 JMC |
378 | DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ |
379 | DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ | |
380 | DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ | |
381 | DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ | |
a00e368c PU |
382 | >; |
383 | }; | |
384 | ||
385 | mcasp3_pins_sleep: mcasp3_pins_sleep { | |
386 | pinctrl-single,pins = < | |
f70dfa66 JMC |
387 | DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) |
388 | DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) | |
389 | DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) | |
390 | DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) | |
a00e368c PU |
391 | >; |
392 | }; | |
5a0f93c6 NM |
393 | }; |
394 | ||
395 | &i2c1 { | |
396 | status = "okay"; | |
397 | pinctrl-names = "default"; | |
398 | pinctrl-0 = <&i2c1_pins_default>; | |
399 | clock-frequency = <400000>; | |
400 | ||
401 | tps659038: tps659038@58 { | |
402 | compatible = "ti,tps659038"; | |
403 | reg = <0x58>; | |
404 | interrupt-parent = <&gpio1>; | |
405 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; | |
406 | ||
407 | pinctrl-names = "default"; | |
408 | pinctrl-0 = <&tps659038_pins_default>; | |
409 | ||
410 | #interrupt-cells = <2>; | |
411 | interrupt-controller; | |
412 | ||
413 | ti,system-power-controller; | |
414 | ||
415 | tps659038_pmic { | |
416 | compatible = "ti,tps659038-pmic"; | |
417 | ||
418 | regulators { | |
419 | smps12_reg: smps12 { | |
420 | /* VDD_MPU */ | |
421 | regulator-name = "smps12"; | |
422 | regulator-min-microvolt = < 850000>; | |
423 | regulator-max-microvolt = <1250000>; | |
424 | regulator-always-on; | |
425 | regulator-boot-on; | |
426 | }; | |
427 | ||
428 | smps3_reg: smps3 { | |
429 | /* VDD_DDR */ | |
430 | regulator-name = "smps3"; | |
431 | regulator-min-microvolt = <1350000>; | |
432 | regulator-max-microvolt = <1350000>; | |
433 | regulator-always-on; | |
434 | regulator-boot-on; | |
435 | }; | |
436 | ||
437 | smps45_reg: smps45 { | |
438 | /* VDD_DSPEVE, VDD_IVA, VDD_GPU */ | |
439 | regulator-name = "smps45"; | |
440 | regulator-min-microvolt = < 850000>; | |
54d03c5d | 441 | regulator-max-microvolt = <1250000>; |
5a0f93c6 NM |
442 | regulator-always-on; |
443 | regulator-boot-on; | |
444 | }; | |
445 | ||
446 | smps6_reg: smps6 { | |
447 | /* VDD_CORE */ | |
448 | regulator-name = "smps6"; | |
449 | regulator-min-microvolt = <850000>; | |
54d03c5d | 450 | regulator-max-microvolt = <1150000>; |
5a0f93c6 NM |
451 | regulator-always-on; |
452 | regulator-boot-on; | |
453 | }; | |
454 | ||
455 | /* SMPS7 unused */ | |
456 | ||
457 | smps8_reg: smps8 { | |
458 | /* VDD_1V8 */ | |
459 | regulator-name = "smps8"; | |
460 | regulator-min-microvolt = <1800000>; | |
461 | regulator-max-microvolt = <1800000>; | |
462 | regulator-always-on; | |
463 | regulator-boot-on; | |
464 | }; | |
465 | ||
466 | /* SMPS9 unused */ | |
467 | ||
468 | ldo1_reg: ldo1 { | |
7e381ec6 | 469 | /* VDD_SD / VDDSHV8 */ |
5a0f93c6 NM |
470 | regulator-name = "ldo1"; |
471 | regulator-min-microvolt = <1800000>; | |
472 | regulator-max-microvolt = <3300000>; | |
473 | regulator-boot-on; | |
7e381ec6 | 474 | regulator-always-on; |
5a0f93c6 NM |
475 | }; |
476 | ||
477 | ldo2_reg: ldo2 { | |
478 | /* VDD_SHV5 */ | |
479 | regulator-name = "ldo2"; | |
480 | regulator-min-microvolt = <3300000>; | |
481 | regulator-max-microvolt = <3300000>; | |
482 | regulator-always-on; | |
483 | regulator-boot-on; | |
484 | }; | |
485 | ||
486 | ldo3_reg: ldo3 { | |
5005296e | 487 | /* VDDA_1V8_PHYA */ |
5a0f93c6 NM |
488 | regulator-name = "ldo3"; |
489 | regulator-min-microvolt = <1800000>; | |
490 | regulator-max-microvolt = <1800000>; | |
491 | regulator-always-on; | |
492 | regulator-boot-on; | |
493 | }; | |
494 | ||
5005296e NM |
495 | ldo4_reg: ldo4 { |
496 | /* VDDA_1V8_PHYB */ | |
497 | regulator-name = "ldo4"; | |
498 | regulator-min-microvolt = <1800000>; | |
499 | regulator-max-microvolt = <1800000>; | |
500 | regulator-always-on; | |
501 | regulator-boot-on; | |
502 | }; | |
503 | ||
5a0f93c6 NM |
504 | ldo9_reg: ldo9 { |
505 | /* VDD_RTC */ | |
506 | regulator-name = "ldo9"; | |
507 | regulator-min-microvolt = <1050000>; | |
508 | regulator-max-microvolt = <1050000>; | |
509 | regulator-always-on; | |
510 | regulator-boot-on; | |
511 | }; | |
512 | ||
513 | ldoln_reg: ldoln { | |
514 | /* VDDA_1V8_PLL */ | |
515 | regulator-name = "ldoln"; | |
516 | regulator-min-microvolt = <1800000>; | |
517 | regulator-max-microvolt = <1800000>; | |
518 | regulator-always-on; | |
519 | regulator-boot-on; | |
520 | }; | |
521 | ||
522 | ldousb_reg: ldousb { | |
523 | /* VDDA_3V_USB: VDDA_USBHS33 */ | |
524 | regulator-name = "ldousb"; | |
525 | regulator-min-microvolt = <3300000>; | |
526 | regulator-max-microvolt = <3300000>; | |
527 | regulator-boot-on; | |
528 | }; | |
529 | ||
530 | regen1: regen1 { | |
531 | /* VDD_3V3_ON */ | |
532 | regulator-name = "regen1"; | |
533 | regulator-boot-on; | |
534 | regulator-always-on; | |
535 | }; | |
536 | }; | |
537 | }; | |
538 | ||
539 | tps659038_rtc: tps659038_rtc { | |
540 | compatible = "ti,palmas-rtc"; | |
541 | interrupt-parent = <&tps659038>; | |
542 | interrupts = <8 IRQ_TYPE_EDGE_FALLING>; | |
543 | wakeup-source; | |
544 | }; | |
545 | ||
546 | tps659038_pwr_button: tps659038_pwr_button { | |
547 | compatible = "ti,palmas-pwrbutton"; | |
548 | interrupt-parent = <&tps659038>; | |
549 | interrupts = <1 IRQ_TYPE_EDGE_FALLING>; | |
550 | wakeup-source; | |
551 | ti,palmas-long-press-seconds = <12>; | |
552 | }; | |
7a03f2c0 NM |
553 | |
554 | tps659038_gpio: tps659038_gpio { | |
555 | compatible = "ti,palmas-gpio"; | |
556 | gpio-controller; | |
557 | #gpio-cells = <2>; | |
558 | }; | |
84ad1bab RQ |
559 | |
560 | extcon_usb2: tps659038_usb { | |
561 | compatible = "ti,palmas-usb-vid"; | |
562 | ti,enable-vbus-detection; | |
0331966d | 563 | vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; |
84ad1bab RQ |
564 | }; |
565 | ||
5a0f93c6 NM |
566 | }; |
567 | ||
568 | tmp102: tmp102@48 { | |
569 | compatible = "ti,tmp102"; | |
570 | reg = <0x48>; | |
571 | pinctrl-names = "default"; | |
572 | pinctrl-0 = <&tmp102_pins_default>; | |
573 | interrupt-parent = <&gpio7>; | |
574 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; | |
d723cfea | 575 | #thermal-sensor-cells = <1>; |
5a0f93c6 | 576 | }; |
a00e368c PU |
577 | |
578 | tlv320aic3104: tlv320aic3104@18 { | |
579 | #sound-dai-cells = <0>; | |
580 | compatible = "ti,tlv320aic3104"; | |
581 | reg = <0x18>; | |
582 | pinctrl-names = "default", "sleep"; | |
583 | pinctrl-0 = <&clkout2_pins_default>; | |
584 | pinctrl-1 = <&clkout2_pins_sleep>; | |
e80ab5c9 PU |
585 | assigned-clocks = <&clkoutmux2_clk_mux>; |
586 | assigned-clock-parents = <&sys_clk2_dclk_div>; | |
587 | ||
a00e368c PU |
588 | status = "okay"; |
589 | adc-settle-ms = <40>; | |
590 | ||
591 | AVDD-supply = <&vdd_3v3>; | |
592 | IOVDD-supply = <&vdd_3v3>; | |
593 | DRVDD-supply = <&vdd_3v3>; | |
594 | DVDD-supply = <&aic_dvdd>; | |
595 | }; | |
b9d3ec1d NM |
596 | |
597 | eeprom: eeprom@50 { | |
598 | compatible = "at,24c32"; | |
599 | reg = <0x50>; | |
600 | }; | |
5a0f93c6 NM |
601 | }; |
602 | ||
603 | &i2c3 { | |
604 | status = "okay"; | |
605 | pinctrl-names = "default"; | |
606 | pinctrl-0 = <&i2c3_pins_default>; | |
607 | clock-frequency = <400000>; | |
608 | ||
609 | mcp_rtc: rtc@6f { | |
610 | compatible = "microchip,mcp7941x"; | |
611 | reg = <0x6f>; | |
c22c7f3e NM |
612 | interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>, |
613 | <&dra7_pmx_core 0x424>; | |
51c4cfef | 614 | interrupt-names = "irq", "wakeup"; |
5a0f93c6 NM |
615 | |
616 | pinctrl-names = "default"; | |
617 | pinctrl-0 = <&mcp79410_pins_default>; | |
618 | ||
619 | vcc-supply = <&vdd_3v3>; | |
620 | wakeup-source; | |
621 | }; | |
622 | }; | |
623 | ||
624 | &gpio7 { | |
625 | ti,no-reset-on-init; | |
626 | ti,no-idle-on-init; | |
627 | }; | |
628 | ||
629 | &cpu0 { | |
630 | cpu0-supply = <&smps12_reg>; | |
631 | voltage-tolerance = <1>; | |
632 | }; | |
633 | ||
634 | &uart3 { | |
635 | status = "okay"; | |
783d3186 | 636 | interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, |
5eb67198 | 637 | <&dra7_pmx_core 0x3f8>; |
5a0f93c6 NM |
638 | |
639 | pinctrl-names = "default"; | |
640 | pinctrl-0 = <&uart3_pins_default>; | |
641 | }; | |
642 | ||
a75dacf8 FB |
643 | &mac { |
644 | status = "okay"; | |
645 | pinctrl-names = "default", "sleep"; | |
646 | pinctrl-0 = <&cpsw_pins_default>; | |
647 | pinctrl-1 = <&cpsw_pins_sleep>; | |
648 | dual_emac; | |
649 | }; | |
650 | ||
651 | &cpsw_emac0 { | |
652 | phy_id = <&davinci_mdio>, <1>; | |
653 | phy-mode = "rgmii"; | |
654 | dual_emac_res_vlan = <1>; | |
655 | }; | |
656 | ||
657 | &cpsw_emac1 { | |
658 | phy_id = <&davinci_mdio>, <2>; | |
659 | phy-mode = "rgmii"; | |
660 | dual_emac_res_vlan = <2>; | |
661 | }; | |
662 | ||
663 | &davinci_mdio { | |
664 | pinctrl-names = "default", "sleep"; | |
665 | pinctrl-0 = <&davinci_mdio_pins_default>; | |
666 | pinctrl-1 = <&davinci_mdio_pins_sleep>; | |
667 | }; | |
668 | ||
5a0f93c6 NM |
669 | &mmc1 { |
670 | status = "okay"; | |
671 | ||
672 | pinctrl-names = "default"; | |
673 | pinctrl-0 = <&mmc1_pins_default>; | |
674 | ||
675 | vmmc-supply = <&ldo1_reg>; | |
5a0f93c6 | 676 | bus-width = <4>; |
267068d8 | 677 | cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ |
5a0f93c6 NM |
678 | }; |
679 | ||
680 | &mmc2 { | |
681 | status = "okay"; | |
682 | ||
683 | pinctrl-names = "default"; | |
684 | pinctrl-0 = <&mmc2_pins_default>; | |
685 | ||
686 | vmmc-supply = <&vdd_3v3>; | |
687 | bus-width = <8>; | |
688 | ti,non-removable; | |
689 | cap-mmc-dual-data-rate; | |
690 | }; | |
691 | ||
692 | &sata { | |
693 | status = "okay"; | |
694 | }; | |
695 | ||
696 | &usb2_phy1 { | |
697 | phy-supply = <&ldousb_reg>; | |
698 | }; | |
699 | ||
9ab402ae RQ |
700 | &usb2_phy2 { |
701 | phy-supply = <&ldousb_reg>; | |
702 | }; | |
703 | ||
5a0f93c6 NM |
704 | &usb1 { |
705 | dr_mode = "host"; | |
706 | pinctrl-names = "default"; | |
707 | pinctrl-0 = <&usb1_pins>; | |
708 | }; | |
f60db98e | 709 | |
a7b0aa19 RQ |
710 | &omap_dwc3_1 { |
711 | extcon = <&extcon_usb1>; | |
712 | }; | |
713 | ||
714 | &omap_dwc3_2 { | |
715 | extcon = <&extcon_usb2>; | |
716 | }; | |
717 | ||
726806ad | 718 | &usb2 { |
84ad1bab RQ |
719 | /* |
720 | * Stand alone usage is peripheral only. | |
721 | * However, with some resistor modifications | |
722 | * this port can be used via expansion connectors | |
723 | * as "host" or "dual-role". If so, provide | |
724 | * the necessary dr_mode override in the expansion | |
725 | * board's DT. | |
726 | */ | |
726806ad RQ |
727 | dr_mode = "peripheral"; |
728 | }; | |
d723cfea NM |
729 | |
730 | &cpu_trips { | |
731 | cpu_alert1: cpu_alert1 { | |
732 | temperature = <50000>; /* millicelsius */ | |
733 | hysteresis = <2000>; /* millicelsius */ | |
734 | type = "active"; | |
735 | }; | |
736 | }; | |
737 | ||
738 | &cpu_cooling_maps { | |
739 | map1 { | |
740 | trip = <&cpu_alert1>; | |
741 | cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | |
742 | }; | |
743 | }; | |
744 | ||
745 | &thermal_zones { | |
746 | board_thermal: board_thermal { | |
747 | polling-delay-passive = <1250>; /* milliseconds */ | |
748 | polling-delay = <1500>; /* milliseconds */ | |
749 | ||
750 | /* sensor ID */ | |
751 | thermal-sensors = <&tmp102 0>; | |
752 | ||
753 | board_trips: trips { | |
754 | board_alert0: board_alert { | |
755 | temperature = <40000>; /* millicelsius */ | |
756 | hysteresis = <2000>; /* millicelsius */ | |
757 | type = "active"; | |
758 | }; | |
759 | ||
760 | board_crit: board_crit { | |
761 | temperature = <105000>; /* millicelsius */ | |
762 | hysteresis = <0>; /* millicelsius */ | |
763 | type = "critical"; | |
764 | }; | |
765 | }; | |
766 | ||
767 | board_cooling_maps: cooling-maps { | |
768 | map0 { | |
769 | trip = <&board_alert0>; | |
770 | cooling-device = | |
771 | <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | |
772 | }; | |
773 | }; | |
774 | }; | |
775 | }; | |
0c534938 TV |
776 | |
777 | &dss { | |
778 | status = "ok"; | |
779 | ||
780 | vdda_video-supply = <&ldoln_reg>; | |
781 | }; | |
782 | ||
783 | &hdmi { | |
784 | status = "ok"; | |
5005296e | 785 | vdda-supply = <&ldo4_reg>; |
0c534938 TV |
786 | |
787 | pinctrl-names = "default"; | |
788 | pinctrl-0 = <&hdmi_pins>; | |
789 | ||
790 | port { | |
791 | hdmi_out: endpoint { | |
792 | remote-endpoint = <&tpd12s015_in>; | |
793 | }; | |
794 | }; | |
795 | }; | |
73c8f0cb KVA |
796 | |
797 | &pcie1 { | |
798 | gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; | |
799 | }; | |
a00e368c PU |
800 | |
801 | &mcasp3 { | |
802 | #sound-dai-cells = <0>; | |
803 | pinctrl-names = "default", "sleep"; | |
804 | pinctrl-0 = <&mcasp3_pins_default>; | |
805 | pinctrl-1 = <&mcasp3_pins_sleep>; | |
bf26927b PU |
806 | assigned-clocks = <&mcasp3_ahclkx_mux>; |
807 | assigned-clock-parents = <&sys_clkin2>; | |
a00e368c PU |
808 | status = "okay"; |
809 | ||
810 | op-mode = <0>; /* MCASP_IIS_MODE */ | |
811 | tdm-slots = <2>; | |
812 | /* 4 serializers */ | |
813 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
814 | 1 2 0 0 | |
815 | >; | |
42b2274d PU |
816 | tx-num-evt = <32>; |
817 | rx-num-evt = <32>; | |
a00e368c | 818 | }; |
ebbf93f0 SA |
819 | |
820 | &mailbox5 { | |
821 | status = "okay"; | |
822 | mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { | |
823 | status = "okay"; | |
824 | }; | |
825 | mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { | |
826 | status = "okay"; | |
827 | }; | |
828 | }; | |
829 | ||
830 | &mailbox6 { | |
831 | status = "okay"; | |
832 | mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { | |
833 | status = "okay"; | |
834 | }; | |
835 | mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { | |
836 | status = "okay"; | |
837 | }; | |
838 | }; |