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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / am57xx-idk-common.dtsi
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
a7cac713
SP		 2/*
3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
a7cac713
SP		 4 */
5
5b604223
K		 6#include "am57xx-industrial-grade.dtsi"
7
a7cac713
SP		 8/ {
9 aliases {
10 rtc0 = &tps659038_rtc;
11 rtc1 = &rtc;
12 };
13
bc1baa6b
LV		 14 chosen {
15 stdout-path = &uart3;
16 };
17
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SP		 18 vmain: fixedregulator-vmain {
19 compatible = "regulator-fixed";
20 regulator-name = "VMAIN";
21 regulator-min-microvolt = <5000000>;
22 regulator-max-microvolt = <5000000>;
23 regulator-always-on;
24 regulator-boot-on;
25 };
26
27 v3_3d: fixedregulator-v3_3d {
28 compatible = "regulator-fixed";
29 regulator-name = "V3_3D";
30 vin-supply = <&smps9_reg>;
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
33 regulator-always-on;
34 regulator-boot-on;
35 };
36
37 vtt_fixed: fixedregulator-vtt {
38 /* TPS51200 */
39 compatible = "regulator-fixed";
40 regulator-name = "vtt_fixed";
41 vin-supply = <&v3_3d>;
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 regulator-boot-on;
46 };
50e95b6b
AD		 47
48 leds-iio {
49 status = "disabled";
50 compatible = "gpio-leds";
51 led-out0 {
52 label = "out0";
53 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
54 default-state = "off";
55 };
56
57 led-out1 {
58 label = "out1";
59 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
60 default-state = "off";
61 };
62
63 led-out2 {
64 label = "out2";
65 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
66 default-state = "off";
67 };
68
69 led-out3 {
70 label = "out3";
71 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
72 default-state = "off";
73 };
74
75 led-out4 {
76 label = "out4";
77 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
78 default-state = "off";
79 };
80
81 led-out5 {
82 label = "out5";
83 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
84 default-state = "off";
85 };
86
87 led-out6 {
88 label = "out6";
89 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
90 default-state = "off";
91 };
92
93 led-out7 {
94 label = "out7";
95 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
96 default-state = "off";
97 };
98 };
a7cac713
SP		 99};
100
0e1b2116
SP		 101&dra7_pmx_core {
102 dcan1_pins_default: dcan1_pins_default {
103 pinctrl-single,pins = <
104 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
105 DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
106 >;
107 };
108
109 dcan1_pins_sleep: dcan1_pins_sleep {
110 pinctrl-single,pins = <
111 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
112 DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
113 >;
114 };
115};
116
a7cac713
SP		 117&i2c1 {
118 status = "okay";
119 clock-frequency = <400000>;
120
121 tps659038: tps659038@58 {
122 compatible = "ti,tps659038";
123 reg = <0x58>;
124 interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
125 &dra7_pmx_core 0x418>;
126 #interrupt-cells = <2>;
127 interrupt-controller;
128 ti,system-power-controller;
8804755b 129 ti,palmas-override-powerhold;
a7cac713
SP		 130
131 tps659038_pmic {
132 compatible = "ti,tps659038-pmic";
3d9f77be
NM		 133
134 smps12-in-supply = <&vmain>;
135 smps3-in-supply = <&vmain>;
136 smps45-in-supply = <&vmain>;
137 smps6-in-supply = <&vmain>;
138 smps7-in-supply = <&vmain>;
139 smps8-in-supply = <&vmain>;
140 smps9-in-supply = <&vmain>;
141 ldo1-in-supply = <&vmain>;
142 ldo2-in-supply = <&vmain>;
143 ldo3-in-supply = <&vmain>;
144 ldo4-in-supply = <&vmain>;
145 ldo9-in-supply = <&vmain>;
146 ldoln-in-supply = <&vmain>;
147 ldousb-in-supply = <&vmain>;
148 ldortc-in-supply = <&vmain>;
149
a7cac713
SP		 150 regulators {
151 smps12_reg: smps12 {
152 /* VDD_MPU */
a7cac713
SP		 153 regulator-name = "smps12";
154 regulator-min-microvolt = <850000>;
155 regulator-max-microvolt = <1250000>;
156 regulator-always-on;
157 regulator-boot-on;
158 };
159
160 smps3_reg: smps3 {
161 /* VDD_DDR EMIF1 EMIF2 */
a7cac713
SP		 162 regulator-name = "smps3";
163 regulator-min-microvolt = <1350000>;
164 regulator-max-microvolt = <1350000>;
165 regulator-always-on;
166 regulator-boot-on;
167 };
168
169 smps45_reg: smps45 {
170 /* VDD_DSPEVE on AM572 */
171 /* VDD_IVA + VDD_DSP on AM571 */
a7cac713
SP		 172 regulator-name = "smps45";
173 regulator-min-microvolt = <850000>;
174 regulator-max-microvolt = <1250000>;
175 regulator-always-on;
176 regulator-boot-on;
177 };
178
179 smps6_reg: smps6 {
180 /* VDD_GPU */
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SP		 181 regulator-name = "smps6";
182 regulator-min-microvolt = <850000>;
183 regulator-max-microvolt = <1250000>;
184 regulator-always-on;
185 regulator-boot-on;
186 };
187
188 smps7_reg: smps7 {
189 /* VDD_CORE */
a7cac713
SP		 190 regulator-name = "smps7";
191 regulator-min-microvolt = <850000>;
192 regulator-max-microvolt = <1150000>;
193 regulator-always-on;
194 regulator-boot-on;
195 };
196
197 smps8_reg: smps8 {
198 /* 5728 - VDD_IVAHD */
199 /* 5718 - N.C. test point */
a7cac713
SP		 200 regulator-name = "smps8";
201 };
202
203 smps9_reg: smps9 {
204 /* VDD_3_3D */
a7cac713
SP		 205 regulator-name = "smps9";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-always-on;
209 regulator-boot-on;
210 };
211
212 ldo1_reg: ldo1 {
213 /* VDDSHV8 - VSDMMC */
214 /* NOTE: on rev 1.3a, data supply */
a7cac713
SP		 215 regulator-name = "ldo1";
216 regulator-min-microvolt = <1800000>;
217 regulator-max-microvolt = <3300000>;
218 regulator-boot-on;
219 regulator-always-on;
220 };
221
222 ldo2_reg: ldo2 {
223 /* VDDSH18V */
a7cac713
SP		 224 regulator-name = "ldo2";
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <1800000>;
227 regulator-always-on;
228 regulator-boot-on;
229 };
230
231 ldo3_reg: ldo3 {
232 /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
a7cac713
SP		 233 regulator-name = "ldo3";
234 regulator-min-microvolt = <1800000>;
235 regulator-max-microvolt = <1800000>;
236 regulator-always-on;
237 regulator-boot-on;
238 };
239
240 ldo4_reg: ldo4 {
241 /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
a7cac713
SP		 242 regulator-name = "ldo4";
243 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <1800000>;
245 regulator-always-on;
246 regulator-boot-on;
247 };
248
249 /* LDO5-8 unused */
250
251 ldo9_reg: ldo9 {
252 /* VDD_RTC */
a7cac713
SP		 253 regulator-name = "ldo9";
254 regulator-min-microvolt = <840000>;
255 regulator-max-microvolt = <1160000>;
256 regulator-always-on;
257 regulator-boot-on;
258 };
259
260 ldoln_reg: ldoln {
261 /* VDDA_1V8_PLL */
a7cac713
SP		 262 regulator-name = "ldoln";
263 regulator-min-microvolt = <1800000>;
264 regulator-max-microvolt = <1800000>;
265 regulator-always-on;
266 regulator-boot-on;
267 };
268
269 ldousb_reg: ldousb {
270 /* VDDA_3V_USB: VDDA_USBHS33 */
a7cac713
SP		 271 regulator-name = "ldousb";
272 regulator-min-microvolt = <3300000>;
273 regulator-max-microvolt = <3300000>;
274 regulator-always-on;
275 regulator-boot-on;
276 };
277
278 ldortc_reg: ldortc {
279 /* VDDA_RTC */
a7cac713
SP		 280 regulator-name = "ldortc";
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
283 regulator-always-on;
284 regulator-boot-on;
285 };
286
287 regen1: regen1 {
288 /* VDD_3V3_ON */
289 regulator-name = "regen1";
290 regulator-boot-on;
291 regulator-always-on;
292 };
293
294 regen2: regen2 {
295 /* Needed for PMIC internal resource */
296 regulator-name = "regen2";
297 regulator-boot-on;
298 regulator-always-on;
299 };
300 };
301 };
302
303 tps659038_rtc: tps659038_rtc {
304 compatible = "ti,palmas-rtc";
305 interrupt-parent = <&tps659038>;
306 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
307 wakeup-source;
308 };
309
310 tps659038_pwr_button: tps659038_pwr_button {
311 compatible = "ti,palmas-pwrbutton";
312 interrupt-parent = <&tps659038>;
313 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
314 wakeup-source;
315 ti,palmas-long-press-seconds = <12>;
316 };
317
318 tps659038_gpio: tps659038_gpio {
319 compatible = "ti,palmas-gpio";
320 gpio-controller;
321 #gpio-cells = <2>;
322 };
10d27dfa
RQ		 323
324 extcon_usb2: tps659038_usb {
325 compatible = "ti,palmas-usb-vid";
326 ti,enable-vbus-detection;
327 ti,enable-id-detection;
328 /* ID & VBUS GPIOs provided in board dts */
329 };
a7cac713 330 };
f5432f01
SN		 331
332 tpic2810: tpic2810@60 {
333 compatible = "ti,tpic2810";
334 reg = <0x60>;
335 gpio-controller;
336 #gpio-cells = <2>;
337 };
a7cac713
SP		 338};
339
8b43764f
AD		 340&mcspi3 {
341 status = "okay";
342 ti,pindir-d0-out-d1-in;
343
344 sn65hvs882: sn65hvs882@0 {
345 compatible = "pisosr-gpio";
346 gpio-controller;
347 #gpio-cells = <2>;
348
349 reg = <0>;
350 spi-max-frequency = <1000000>;
351 spi-cpol;
352 };
353};
354
a7cac713
SP		 355&uart3 {
356 status = "okay";
357 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
358 &dra7_pmx_core 0x248>;
359};
360
361&rtc {
362 status = "okay";
363 ext-clk-src;
364};
365
366&mac {
367 status = "okay";
368 dual_emac;
369};
370
371&cpsw_emac0 {
adfcf71b 372 phy-handle = <&ethphy0>;
a7cac713
SP		 373 phy-mode = "rgmii";
374 dual_emac_res_vlan = <1>;
375};
376
377&cpsw_emac1 {
adfcf71b 378 phy-handle = <&ethphy1>;
a7cac713
SP		 379 phy-mode = "rgmii";
380 dual_emac_res_vlan = <2>;
381};
382
adfcf71b
GS		 383&davinci_mdio {
384 ethphy0: ethernet-phy@0 {
385 reg = <0>;
386 };
387
388 ethphy1: ethernet-phy@1 {
389 reg = <1>;
390 };
391};
392
a7cac713
SP		 393&usb2_phy1 {
394 phy-supply = <&ldousb_reg>;
395};
396
397&usb2_phy2 {
398 phy-supply = <&ldousb_reg>;
399};
400
401&usb1 {
402 dr_mode = "host";
403};
404
5f3cc164
RQ		 405&omap_dwc3_2 {
406 extcon = <&extcon_usb2>;
407};
408
a7cac713 409&usb2 {
5f3cc164
RQ		 410 extcon = <&extcon_usb2>;
411 dr_mode = "otg";
a7cac713
SP		 412};
413
799ab3f4
SN		 414&mmc1 {
415 status = "okay";
416 vmmc-supply = <&v3_3d>;
417 vqmmc-supply = <&ldo1_reg>;
418 bus-width = <4>;
419 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
420};
421
a7cac713
SP		 422&mmc2 {
423 status = "okay";
424 vmmc-supply = <&v3_3d>;
4dd7f7a7 425 vqmmc-supply = <&v3_3d>;
a7cac713 426 bus-width = <8>;
940293af 427 non-removable;
a7cac713 428 max-frequency = <96000000>;
940293af 429 no-1-8-v;
0e1b2116
SP		 430};
431
432&dcan1 {
433 status = "okay";
434 pinctrl-names = "default", "sleep", "active";
435 pinctrl-0 = <&dcan1_pins_sleep>;
436 pinctrl-1 = <&dcan1_pins_sleep>;
437 pinctrl-2 = <&dcan1_pins_default>;
a7cac713 438};
504482e5
V		 439
440&qspi {
441 status = "okay";
442
443 spi-max-frequency = <76800000>;
444 m25p80@0 {
445 compatible = "s25fl256s1", "jedec,spi-nor";
446 spi-max-frequency = <76800000>;
447 reg = <0>;
448 spi-tx-bus-width = <1>;
449 spi-rx-bus-width = <4>;
450 #address-cells = <1>;
451 #size-cells = <1>;
452
453 /* MTD partition table.
454 * The ROM checks the first four physical blocks
455 * for a valid file to boot and the flash here is
456 * 64KiB block size.
457 */
458 partition@0 {
459 label = "QSPI.SPL";
460 reg = <0x00000000 0x000040000>;
461 };
462 partition@1 {
463 label = "QSPI.u-boot";
464 reg = <0x00040000 0x00100000>;
465 };
466 partition@2 {
467 label = "QSPI.u-boot-spl-os";
468 reg = <0x00140000 0x00080000>;
469 };
470 partition@3 {
471 label = "QSPI.u-boot-env";
472 reg = <0x001c0000 0x00010000>;
473 };
474 partition@4 {
475 label = "QSPI.u-boot-env.backup1";
476 reg = <0x001d0000 0x0010000>;
477 };
478 partition@5 {
479 label = "QSPI.kernel";
480 reg = <0x001e0000 0x0800000>;
481 };
482 partition@6 {
483 label = "QSPI.file-system";
484 reg = <0x009e0000 0x01620000>;
485 };
486 };
487};
5c8a6b9d
K		 488
489&cpu0 {
490 vdd-supply = <&smps12_reg>;
491};
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