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ca36855e 1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
49122145
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2/*
3 * Device Tree file for Marvell Armada 370 Reference Design board
4 * (RD-88F6710-A1)
5 *
6 * Copied from arch/arm/boot/dts/armada-370-db.dts
7 *
8 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
9 *
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TP
10 * Note: this Device Tree assumes that the bootloader has remapped the
11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
14 * boards were delivered with an older version of the bootloader that
15 * left internal registers mapped at 0xd0000000. If you are in this
16 * situation, you should either update your bootloader (preferred
17 * solution) or the below Device Tree should be adjusted.
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18 */
19
20/dts-v1/;
5c0169d1 21#include <dt-bindings/input/input.h>
f8c193ca 22#include <dt-bindings/interrupt-controller/irq.h>
29e74f8b 23#include <dt-bindings/gpio/gpio.h>
38149887 24#include "armada-370.dtsi"
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25
26/ {
27 model = "Marvell Armada 370 Reference Design";
28 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
29
30 chosen {
9552203c 31 stdout-path = "serial0:115200n8";
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32 };
33
6f477f43 34 memory@0 {
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35 device_type = "memory";
36 reg = <0x00000000 0x20000000>; /* 512 MB */
37 };
38
39 soc {
32c741d0 40 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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41 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
5e12a613 43
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44 internal-regs {
45 serial@12000 {
467f54b2 46 status = "okay";
49122145 47 };
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48 sata@a0000 {
49 nr-ports = <2>;
50 status = "okay";
51 };
52
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53 ethernet@70000 {
54 status = "okay";
55 phy = <&phy0>;
56 phy-mode = "sgmii";
57 };
58 ethernet@74000 {
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EG
59 pinctrl-0 = <&ge1_rgmii_pins>;
60 pinctrl-names = "default";
467f54b2 61 status = "okay";
467f54b2 62 phy-mode = "rgmii-id";
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63 fixed-link {
64 speed = <1000>;
65 full-duplex;
66 };
467f54b2 67 };
56499120 68
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69 mvsdio@d4000 {
70 pinctrl-0 = <&sdio_pins1>;
71 pinctrl-names = "default";
72 status = "okay";
73 /* No CD or WP GPIOs */
d87b5fbb 74 broken-cd;
467f54b2 75 };
e822f75d 76
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77 usb@50000 {
78 status = "okay";
79 };
e822f75d 80
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81 usb@51000 {
82 status = "okay";
83 };
8c75e7b3 84
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85 gpio-keys {
86 compatible = "gpio-keys";
87 #address-cells = <1>;
88 #size-cells = <0>;
9e622af0 89 button {
467f54b2 90 label = "Software Button";
5c0169d1 91 linux,code = <KEY_POWER>;
29e74f8b 92 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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93 };
94 };
69e18e26 95
e8db78dd
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96 gpio-fan {
97 compatible = "gpio-fan";
98 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
99 gpio-fan,speed-map = <0 0 3000 1>;
100 pinctrl-0 = <&fan_pins>;
101 pinctrl-names = "default";
102 };
103
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104 gpio_leds {
105 compatible = "gpio-leds";
106 pinctrl-names = "default";
107 pinctrl-0 = <&led_pins>;
108
109 sw_led {
110 label = "370rd:green:sw";
111 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
112 default-state = "keep";
113 };
114 };
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115 };
116 };
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117};
118
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119&pciec {
120 status = "okay";
121
122 /* Internal mini-PCIe connector */
123 pcie@1,0 {
124 /* Port 0, Lane 0 */
125 status = "okay";
126 };
127
128 /* Internal mini-PCIe connector */
129 pcie@2,0 {
130 /* Port 1, Lane 0 */
131 status = "okay";
132 };
133};
134
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135&mdio {
136 pinctrl-0 = <&mdio_pins>;
137 pinctrl-names = "default";
138 phy0: ethernet-phy@0 {
139 reg = <0>;
140 };
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141
142 switch: switch@10 {
143 compatible = "marvell,mv88e6085";
144 #address-cells = <1>;
145 #size-cells = <0>;
146 reg = <0x10>;
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147 interrupt-controller;
148 #interrupt-cells = <2>;
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149
150 ports {
151 #address-cells = <1>;
152 #size-cells = <0>;
153
154 port@0 {
155 reg = <0>;
156 label = "lan0";
157 };
158
159 port@1 {
160 reg = <1>;
161 label = "lan1";
162 };
163
164 port@2 {
165 reg = <2>;
166 label = "lan2";
167 };
168
169 port@3 {
170 reg = <3>;
171 label = "lan3";
172 };
173
174 port@5 {
175 reg = <5>;
176 label = "cpu";
177 ethernet = <&eth1>;
178 fixed-link {
179 speed = <1000>;
180 full-duplex;
181 };
182 };
183 };
f8c193ca
AL
184
185 mdio {
186 #address-cells = <1>;
187 #size-cells = <0>;
188
189 switchphy0: switchphy@0 {
190 reg = <0>;
191 interrupt-parent = <&switch>;
192 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
193 };
194
195 switchphy1: switchphy@1 {
196 reg = <1>;
197 interrupt-parent = <&switch>;
198 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
199 };
200
201 switchphy2: switchphy@2 {
202 reg = <2>;
203 interrupt-parent = <&switch>;
204 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
205 };
206
207 switchphy3: switchphy@3 {
208 reg = <3>;
209 interrupt-parent = <&switch>;
210 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
211 };
212 };
4cb2ec8c 213 };
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214};
215
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216
217&pinctrl {
218 fan_pins: fan-pins {
219 marvell,pins = "mpp8";
220 marvell,function = "gpio";
221 };
222
223 led_pins: led-pins {
224 marvell,pins = "mpp32";
225 marvell,function = "gpio";
226 };
227};
3b799199
MR
228
229&nand_controller {
230 status = "okay";
231
232 nand@0 {
233 reg = <0>;
234 label = "pxa3xx_nand-0";
235 nand-rb = <0>;
236 marvell,nand-keep-config;
237 nand-on-flash-bbt;
238
239 partitions {
240 compatible = "fixed-partitions";
241 #address-cells = <1>;
242 #size-cells = <1>;
243
244 partition@0 {
245 label = "U-Boot";
246 reg = <0 0x800000>;
247 };
248 partition@800000 {
249 label = "Linux";
250 reg = <0x800000 0x800000>;
251 };
252 partition@1000000 {
253 label = "Filesystem";
254 reg = <0x1000000 0x3f000000>;
255 };
256 };
257 };
258};