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928413bd GC |
1 | /* |
2 | * Device Tree file for Marvell Armada 385 development board | |
3 | * (RD-88F6820-GP) | |
4 | * | |
5 | * Copyright (C) 2014 Marvell | |
6 | * | |
7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> | |
8 | * | |
9 | * This file is dual-licensed: you can use it either under the terms | |
10 | * of the GPL or the X11 license, at your option. Note that this dual | |
11 | * licensing only applies to this file, and not this project as a | |
12 | * whole. | |
13 | * | |
14 | * a) This file is licensed under the terms of the GNU General Public | |
15 | * License version 2. This program is licensed "as is" without | |
16 | * any warranty of any kind, whether express or implied. | |
17 | * | |
18 | * Or, alternatively, | |
19 | * | |
20 | * b) Permission is hereby granted, free of charge, to any person | |
21 | * obtaining a copy of this software and associated documentation | |
22 | * files (the "Software"), to deal in the Software without | |
23 | * restriction, including without limitation the rights to use, | |
24 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
25 | * sell copies of the Software, and to permit persons to whom the | |
26 | * Software is furnished to do so, subject to the following | |
27 | * conditions: | |
28 | * | |
29 | * The above copyright notice and this permission notice shall be | |
30 | * included in all copies or substantial portions of the Software. | |
31 | * | |
32 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
33 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
34 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
35 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
36 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
37 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
38 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
39 | * OTHER DEALINGS IN THE SOFTWARE. | |
40 | */ | |
41 | ||
42 | /dts-v1/; | |
43 | #include "armada-388.dtsi" | |
44 | #include <dt-bindings/gpio/gpio.h> | |
45 | ||
46 | / { | |
47 | model = "Marvell Armada 385 GP"; | |
48 | compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; | |
49 | ||
50 | chosen { | |
9552203c | 51 | stdout-path = "serial0:115200n8"; |
928413bd GC |
52 | }; |
53 | ||
54 | memory { | |
55 | device_type = "memory"; | |
56 | reg = <0x00000000 0x80000000>; /* 2 GB */ | |
57 | }; | |
58 | ||
59 | soc { | |
60 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 | |
d716f2e8 BB |
61 | MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 |
62 | MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 | |
63 | MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; | |
928413bd GC |
64 | |
65 | internal-regs { | |
66 | spi@10600 { | |
67 | pinctrl-names = "default"; | |
68 | pinctrl-0 = <&spi0_pins>; | |
69 | status = "okay"; | |
70 | ||
71 | spi-flash@0 { | |
72 | #address-cells = <1>; | |
73 | #size-cells = <1>; | |
e9f3ed4a | 74 | compatible = "st,m25p128", "jedec,spi-nor"; |
928413bd GC |
75 | reg = <0>; /* Chip select 0 */ |
76 | spi-max-frequency = <50000000>; | |
77 | m25p,fast-read; | |
78 | }; | |
79 | }; | |
80 | ||
81 | i2c@11000 { | |
82 | pinctrl-names = "default"; | |
83 | pinctrl-0 = <&i2c0_pins>; | |
84 | status = "okay"; | |
85 | clock-frequency = <100000>; | |
928413bd GC |
86 | |
87 | expander0: pca9555@20 { | |
88 | compatible = "nxp,pca9555"; | |
89 | pinctrl-names = "default"; | |
90 | pinctrl-0 = <&pca0_pins>; | |
91 | interrupt-parent = <&gpio0>; | |
92 | interrupts = <18 IRQ_TYPE_EDGE_FALLING>; | |
93 | gpio-controller; | |
94 | #gpio-cells = <2>; | |
95 | interrupt-controller; | |
96 | #interrupt-cells = <2>; | |
97 | reg = <0x20>; | |
98 | }; | |
99 | ||
100 | expander1: pca9555@21 { | |
101 | compatible = "nxp,pca9555"; | |
102 | pinctrl-names = "default"; | |
103 | interrupt-parent = <&gpio0>; | |
104 | interrupts = <18 IRQ_TYPE_EDGE_FALLING>; | |
105 | gpio-controller; | |
106 | #gpio-cells = <2>; | |
107 | interrupt-controller; | |
108 | #interrupt-cells = <2>; | |
109 | reg = <0x21>; | |
110 | }; | |
111 | ||
7e5308be TP |
112 | eeprom@57 { |
113 | compatible = "atmel,24c64"; | |
114 | reg = <0x57>; | |
115 | }; | |
928413bd GC |
116 | }; |
117 | ||
118 | serial@12000 { | |
119 | /* | |
120 | * Exported on the micro USB connector CON16 | |
121 | * through an FTDI | |
122 | */ | |
123 | ||
124 | pinctrl-names = "default"; | |
125 | pinctrl-0 = <&uart0_pins>; | |
126 | status = "okay"; | |
127 | }; | |
128 | ||
129 | /* GE1 CON15 */ | |
130 | ethernet@30000 { | |
131 | pinctrl-names = "default"; | |
132 | pinctrl-0 = <&ge1_rgmii_pins>; | |
133 | status = "okay"; | |
134 | phy = <&phy1>; | |
135 | phy-mode = "rgmii-id"; | |
136 | }; | |
137 | ||
138 | /* CON4 */ | |
a165c3b6 | 139 | usb@58000 { |
928413bd GC |
140 | vcc-supply = <®_usb2_0_vbus>; |
141 | status = "okay"; | |
142 | }; | |
143 | ||
144 | /* GE0 CON1 */ | |
145 | ethernet@70000 { | |
146 | pinctrl-names = "default"; | |
147 | /* | |
148 | * The Reference Clock 0 is used to provide a | |
149 | * clock to the PHY | |
150 | */ | |
151 | pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; | |
152 | status = "okay"; | |
153 | phy = <&phy0>; | |
154 | phy-mode = "rgmii-id"; | |
155 | }; | |
156 | ||
157 | ||
158 | mdio@72004 { | |
159 | pinctrl-names = "default"; | |
160 | pinctrl-0 = <&mdio_pins>; | |
161 | ||
162 | phy0: ethernet-phy@1 { | |
163 | reg = <1>; | |
164 | }; | |
165 | ||
166 | phy1: ethernet-phy@0 { | |
167 | reg = <0>; | |
168 | }; | |
169 | }; | |
170 | ||
171 | sata@a8000 { | |
172 | pinctrl-names = "default"; | |
173 | pinctrl-0 = <&sata0_pins>, <&sata1_pins>; | |
174 | status = "okay"; | |
175 | #address-cells = <1>; | |
176 | #size-cells = <0>; | |
0df5a6cc GC |
177 | |
178 | sata0: sata-port@0 { | |
179 | reg = <0>; | |
180 | target-supply = <®_5v_sata0>; | |
181 | }; | |
182 | ||
183 | sata1: sata-port@1 { | |
184 | reg = <1>; | |
185 | target-supply = <®_5v_sata1>; | |
186 | }; | |
928413bd GC |
187 | }; |
188 | ||
189 | sata@e0000 { | |
190 | pinctrl-names = "default"; | |
191 | pinctrl-0 = <&sata2_pins>, <&sata3_pins>; | |
192 | status = "okay"; | |
193 | #address-cells = <1>; | |
194 | #size-cells = <0>; | |
0df5a6cc GC |
195 | |
196 | sata2: sata-port@0 { | |
197 | reg = <0>; | |
198 | target-supply = <®_5v_sata2>; | |
199 | }; | |
200 | ||
201 | sata3: sata-port@1 { | |
202 | reg = <1>; | |
203 | target-supply = <®_5v_sata3>; | |
204 | }; | |
928413bd GC |
205 | }; |
206 | ||
207 | sdhci@d8000 { | |
208 | pinctrl-names = "default"; | |
209 | pinctrl-0 = <&sdhci_pins>; | |
928413bd | 210 | no-1-8-v; |
6b61f249 MW |
211 | /* |
212 | * A388-GP board v1.5 and higher replace | |
213 | * hitherto card detection method based on GPIO | |
214 | * with the one using DAT3 pin. As they are | |
215 | * incompatible, software-based polling is | |
216 | * enabled with 'broken-cd' property. For boards | |
217 | * older than v1.5 it can be replaced with: | |
218 | * 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;', | |
219 | * whereas for the newer ones following can be | |
220 | * used instead: | |
221 | * 'dat3-cd;' | |
222 | * 'cd-inverted;' | |
223 | */ | |
224 | broken-cd; | |
928413bd GC |
225 | wp-inverted; |
226 | bus-width = <8>; | |
227 | status = "okay"; | |
228 | }; | |
229 | ||
230 | /* CON5 */ | |
231 | usb3@f0000 { | |
232 | vcc-supply = <®_usb2_1_vbus>; | |
233 | status = "okay"; | |
234 | }; | |
235 | ||
236 | /* CON7 */ | |
237 | usb3@f8000 { | |
238 | vcc-supply = <®_usb3_vbus>; | |
239 | status = "okay"; | |
240 | }; | |
241 | }; | |
242 | ||
243 | pcie-controller { | |
244 | status = "okay"; | |
245 | /* | |
246 | * One PCIe units is accessible through | |
247 | * standard PCIe slot on the board. | |
248 | */ | |
249 | pcie@1,0 { | |
250 | /* Port 0, Lane 0 */ | |
251 | status = "okay"; | |
252 | }; | |
253 | ||
254 | /* | |
255 | * The two other PCIe units are accessible | |
256 | * through mini PCIe slot on the board. | |
257 | */ | |
258 | pcie@2,0 { | |
259 | /* Port 1, Lane 0 */ | |
260 | status = "okay"; | |
261 | }; | |
262 | pcie@3,0 { | |
263 | /* Port 2, Lane 0 */ | |
264 | status = "okay"; | |
265 | }; | |
266 | }; | |
267 | ||
268 | gpio-fan { | |
269 | compatible = "gpio-fan"; | |
270 | gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; | |
271 | gpio-fan,speed-map = < 0 0 | |
272 | 3000 1>; | |
273 | }; | |
274 | }; | |
275 | ||
276 | reg_usb3_vbus: usb3-vbus { | |
277 | compatible = "regulator-fixed"; | |
278 | regulator-name = "usb3-vbus"; | |
279 | regulator-min-microvolt = <5000000>; | |
280 | regulator-max-microvolt = <5000000>; | |
281 | enable-active-high; | |
282 | regulator-always-on; | |
283 | gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; | |
284 | }; | |
285 | ||
286 | reg_usb2_0_vbus: v5-vbus0 { | |
287 | compatible = "regulator-fixed"; | |
288 | regulator-name = "v5.0-vbus0"; | |
289 | regulator-min-microvolt = <5000000>; | |
290 | regulator-max-microvolt = <5000000>; | |
291 | enable-active-high; | |
292 | regulator-always-on; | |
293 | gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; | |
294 | }; | |
295 | ||
296 | reg_usb2_1_vbus: v5-vbus1 { | |
297 | compatible = "regulator-fixed"; | |
928413bd GC |
298 | regulator-name = "v5.0-vbus1"; |
299 | regulator-min-microvolt = <5000000>; | |
300 | regulator-max-microvolt = <5000000>; | |
301 | enable-active-high; | |
302 | regulator-always-on; | |
303 | gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; | |
304 | }; | |
0df5a6cc GC |
305 | |
306 | reg_sata0: pwr-sata0 { | |
307 | compatible = "regulator-fixed"; | |
308 | regulator-name = "pwr_en_sata0"; | |
b5999dcb TP |
309 | regulator-min-microvolt = <12000000>; |
310 | regulator-max-microvolt = <12000000>; | |
0df5a6cc GC |
311 | enable-active-high; |
312 | regulator-always-on; | |
b5999dcb | 313 | gpio = <&expander0 2 GPIO_ACTIVE_HIGH>; |
0df5a6cc GC |
314 | }; |
315 | ||
316 | reg_5v_sata0: v5-sata0 { | |
317 | compatible = "regulator-fixed"; | |
318 | regulator-name = "v5.0-sata0"; | |
319 | regulator-min-microvolt = <5000000>; | |
320 | regulator-max-microvolt = <5000000>; | |
321 | regulator-always-on; | |
322 | vin-supply = <®_sata0>; | |
323 | }; | |
324 | ||
325 | reg_12v_sata0: v12-sata0 { | |
326 | compatible = "regulator-fixed"; | |
327 | regulator-name = "v12.0-sata0"; | |
328 | regulator-min-microvolt = <12000000>; | |
329 | regulator-max-microvolt = <12000000>; | |
330 | regulator-always-on; | |
331 | vin-supply = <®_sata0>; | |
332 | }; | |
333 | ||
334 | reg_sata1: pwr-sata1 { | |
335 | regulator-name = "pwr_en_sata1"; | |
336 | compatible = "regulator-fixed"; | |
337 | regulator-min-microvolt = <12000000>; | |
338 | regulator-max-microvolt = <12000000>; | |
339 | enable-active-high; | |
340 | regulator-always-on; | |
341 | gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; | |
342 | }; | |
343 | ||
344 | reg_5v_sata1: v5-sata1 { | |
345 | compatible = "regulator-fixed"; | |
346 | regulator-name = "v5.0-sata1"; | |
347 | regulator-min-microvolt = <5000000>; | |
348 | regulator-max-microvolt = <5000000>; | |
349 | regulator-always-on; | |
350 | vin-supply = <®_sata1>; | |
351 | }; | |
352 | ||
353 | reg_12v_sata1: v12-sata1 { | |
354 | compatible = "regulator-fixed"; | |
355 | regulator-name = "v12.0-sata1"; | |
356 | regulator-min-microvolt = <12000000>; | |
357 | regulator-max-microvolt = <12000000>; | |
358 | regulator-always-on; | |
359 | vin-supply = <®_sata1>; | |
360 | }; | |
361 | ||
362 | reg_sata2: pwr-sata2 { | |
363 | compatible = "regulator-fixed"; | |
364 | regulator-name = "pwr_en_sata2"; | |
365 | enable-active-high; | |
366 | regulator-always-on; | |
367 | gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; | |
368 | }; | |
369 | ||
370 | reg_5v_sata2: v5-sata2 { | |
371 | compatible = "regulator-fixed"; | |
372 | regulator-name = "v5.0-sata2"; | |
373 | regulator-min-microvolt = <5000000>; | |
374 | regulator-max-microvolt = <5000000>; | |
375 | regulator-always-on; | |
376 | vin-supply = <®_sata2>; | |
377 | }; | |
378 | ||
379 | reg_12v_sata2: v12-sata2 { | |
380 | compatible = "regulator-fixed"; | |
381 | regulator-name = "v12.0-sata2"; | |
382 | regulator-min-microvolt = <12000000>; | |
383 | regulator-max-microvolt = <12000000>; | |
384 | regulator-always-on; | |
385 | vin-supply = <®_sata2>; | |
386 | }; | |
387 | ||
388 | reg_sata3: pwr-sata3 { | |
389 | compatible = "regulator-fixed"; | |
390 | regulator-name = "pwr_en_sata3"; | |
391 | enable-active-high; | |
392 | regulator-always-on; | |
393 | gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; | |
394 | }; | |
395 | ||
396 | reg_5v_sata3: v5-sata3 { | |
397 | compatible = "regulator-fixed"; | |
398 | regulator-name = "v5.0-sata3"; | |
399 | regulator-min-microvolt = <5000000>; | |
400 | regulator-max-microvolt = <5000000>; | |
401 | regulator-always-on; | |
402 | vin-supply = <®_sata3>; | |
403 | }; | |
404 | ||
405 | reg_12v_sata3: v12-sata3 { | |
406 | compatible = "regulator-fixed"; | |
407 | regulator-name = "v12.0-sata3"; | |
408 | regulator-min-microvolt = <12000000>; | |
409 | regulator-max-microvolt = <12000000>; | |
410 | regulator-always-on; | |
411 | vin-supply = <®_sata3>; | |
412 | }; | |
928413bd GC |
413 | }; |
414 | ||
415 | &pinctrl { | |
416 | pca0_pins: pca0_pins { | |
417 | marvell,pins = "mpp18"; | |
418 | marvell,function = "gpio"; | |
419 | }; | |
420 | }; |