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ca36855e | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
7837feff TP |
2 | /* |
3 | * Device Tree file for Marvell Armada XP Matrix board | |
4 | * | |
5 | * Copyright (C) 2013 Marvell | |
6 | * | |
7 | * Lior Amsalem <alior@marvell.com> | |
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8 | */ |
9 | ||
10 | /dts-v1/; | |
11 | #include "armada-xp-mv78460.dtsi" | |
12 | ||
13 | / { | |
14 | model = "Marvell Armada XP Matrix Board"; | |
15 | compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; | |
16 | ||
17 | chosen { | |
9552203c | 18 | stdout-path = "serial0:115200n8"; |
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19 | }; |
20 | ||
6f477f43 | 21 | memory@0 { |
7837feff | 22 | device_type = "memory"; |
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23 | /* |
24 | * This board has 4 GB of RAM, but the last 256 MB of | |
25 | * RAM are not usable due to the overlap with the MBus | |
26 | * Window address range | |
27 | */ | |
28 | reg = <0 0x00000000 0 0xf0000000>; | |
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29 | }; |
30 | ||
31 | soc { | |
32 | ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 | |
c466d997 | 33 | MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 |
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34 | MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 |
35 | MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; | |
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36 | |
37 | internal-regs { | |
38 | serial@12000 { | |
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39 | status = "okay"; |
40 | }; | |
41 | serial@12100 { | |
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42 | status = "okay"; |
43 | }; | |
44 | serial@12200 { | |
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45 | status = "okay"; |
46 | }; | |
47 | serial@12300 { | |
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48 | status = "okay"; |
49 | }; | |
50 | ||
51 | sata@a0000 { | |
52 | nr-ports = <2>; | |
53 | status = "okay"; | |
54 | }; | |
55 | ||
56 | ethernet@30000 { | |
57 | status = "okay"; | |
58 | phy-mode = "sgmii"; | |
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59 | fixed-link { |
60 | speed = <1000>; | |
61 | full-duplex; | |
62 | }; | |
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63 | }; |
64 | ||
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65 | usb@50000 { |
66 | status = "okay"; | |
67 | }; | |
68 | }; | |
69 | }; | |
70 | }; | |
007d05d8 GC |
71 | |
72 | &pciec { | |
73 | status = "okay"; | |
74 | ||
75 | pcie@1,0 { | |
76 | /* Port 0, Lane 0 */ | |
77 | status = "okay"; | |
78 | }; | |
79 | }; |