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ARM: dts: aspeed: Add I2C buses
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / aspeed-g5.dtsi
CommitLineData
02440622
JS		 1#include "skeleton.dtsi"
2
3/ {
4 model = "Aspeed BMC";
5 compatible = "aspeed,ast2500";
6 #address-cells = <1>;
7 #size-cells = <1>;
8 interrupt-parent = <&vic>;
9
ef856378
JS		 10 aliases {
11 i2c0 = &i2c0;
12 i2c1 = &i2c1;
13 i2c2 = &i2c2;
14 i2c3 = &i2c3;
15 i2c4 = &i2c4;
16 i2c5 = &i2c5;
17 i2c6 = &i2c6;
18 i2c7 = &i2c7;
19 i2c8 = &i2c8;
20 i2c9 = &i2c9;
21 i2c10 = &i2c10;
22 i2c11 = &i2c11;
23 i2c12 = &i2c12;
24 i2c13 = &i2c13;
25 };
26
02440622
JS		 27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 compatible = "arm,arm1176jzf-s";
33 device_type = "cpu";
34 reg = <0>;
35 };
36 };
37
38 ahb {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 ranges;
43
74dc3cd3
CLG		 44 fmc: flash-controller@1e620000 {
45 reg = < 0x1e620000 0xc4
46 0x20000000 0x10000000 >;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 compatible = "aspeed,ast2500-fmc";
50 status = "disabled";
51 interrupts = <19>;
52 flash@0 {
53 reg = < 0 >;
54 compatible = "jedec,spi-nor";
55 status = "disabled";
56 };
57 flash@1 {
58 reg = < 1 >;
59 compatible = "jedec,spi-nor";
60 status = "disabled";
61 };
62 flash@2 {
63 reg = < 2 >;
64 compatible = "jedec,spi-nor";
65 status = "disabled";
66 };
67 };
68
69 spi1: flash-controller@1e630000 {
70 reg = < 0x1e630000 0xc4
71 0x30000000 0x08000000 >;
72 #address-cells = <1>;
73 #size-cells = <0>;
74 compatible = "aspeed,ast2500-spi";
75 status = "disabled";
76 flash@0 {
77 reg = < 0 >;
78 compatible = "jedec,spi-nor";
79 status = "disabled";
80 };
81 flash@1 {
82 reg = < 1 >;
83 compatible = "jedec,spi-nor";
84 status = "disabled";
85 };
86 };
87
88 spi2: flash-controller@1e631000 {
89 reg = < 0x1e631000 0xc4
90 0x38000000 0x08000000 >;
91 #address-cells = <1>;
92 #size-cells = <0>;
93 compatible = "aspeed,ast2500-spi";
94 status = "disabled";
95 flash@0 {
96 reg = < 0 >;
97 compatible = "jedec,spi-nor";
98 status = "disabled";
99 };
100 flash@1 {
101 reg = < 1 >;
102 compatible = "jedec,spi-nor";
103 status = "disabled";
104 };
105 };
106
02440622
JS		 107 vic: interrupt-controller@1e6c0080 {
108 compatible = "aspeed,ast2400-vic";
109 interrupt-controller;
110 #interrupt-cells = <1>;
111 valid-sources = <0xfefff7ff 0x0807ffff>;
112 reg = <0x1e6c0080 0x80>;
113 };
114
34ea5c9d 115 mac0: ethernet@1e660000 {
78d28543 116 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
34ea5c9d
JS		 117 reg = <0x1e660000 0x180>;
118 interrupts = <2>;
34ea5c9d
JS		 119 status = "disabled";
120 };
121
122 mac1: ethernet@1e680000 {
78d28543 123 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
34ea5c9d
JS		 124 reg = <0x1e680000 0x180>;
125 interrupts = <3>;
34ea5c9d
JS		 126 status = "disabled";
127 };
128
02440622
JS		 129 apb {
130 compatible = "simple-bus";
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges;
134
b590c8d2
AJ		 135 syscon: syscon@1e6e2000 {
136 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
137 reg = <0x1e6e2000 0x1a8>;
8b9102da
JS		 138 #address-cells = <1>;
139 #size-cells = <0>;
140
141 clk_clkin: clk_clkin@70 {
142 #clock-cells = <0>;
143 compatible = "aspeed,g5-clkin-clock", "fixed-clock";
144 reg = <0x70>;
145 clock-frequency = <24000000>;
146 };
147
148 clk_hpll: clk_hpll@24 {
149 #clock-cells = <0>;
150 compatible = "aspeed,g5-hpll-clock", "fixed-clock";
151 reg = <0x24>;
152 clocks = <&clk_clkin>;
153 clock-frequency = <792000000>;
154 };
155
156 clk_ahb: clk_ahb@70 {
157 #clock-cells = <0>;
158 compatible = "aspeed,g5-ahb-clock", "fixed-clock";
159 reg = <0x70>;
160 clocks = <&clk_hpll>;
161 clock-frequency = <198000000>;
162 };
163
164 clk_apb: clk_apb@08 {
165 #clock-cells = <0>;
166 compatible = "aspeed,g5-apb-clock", "fixed-clock";
167 reg = <0x08>;
168 clocks = <&clk_hpll>;
169 clock-frequency = <24750000>;
170 };
171
172 clk_uart: clk_uart@2c {
173 #clock-cells = <0>;
174 compatible = "aspeed,uart-clock", "fixed-clock";
175 reg = <0x2c>;
176 clock-frequency = <24000000>;
177 };
b590c8d2
AJ		 178
179 pinctrl: pinctrl {
180 compatible = "aspeed,g5-pinctrl";
181 aspeed,external-nodes = <&gfx &lhc>;
182
cd7df3f7 183 };
b590c8d2 184
cd7df3f7 185 };
b590c8d2 186
cd7df3f7
AJ		 187 gfx: display@1e6e6000 {
188 compatible = "aspeed,ast2500-gfx", "syscon";
189 reg = <0x1e6e6000 0x1000>;
190 reg-io-width = <4>;
191 };
b590c8d2 192
29b24640
JS		 193 adc: adc@1e6e9000 {
194 compatible = "aspeed,ast2500-adc";
195 reg = <0x1e6e9000 0xb0>;
196 clocks = <&clk_apb>;
197 #io-channel-cells = <1>;
198 status = "disabled";
199 };
200
cd7df3f7
AJ		 201 sram@1e720000 {
202 compatible = "mmio-sram";
203 reg = <0x1e720000 0x9000>; // 36K
204 };
b590c8d2 205
cd7df3f7
AJ		 206 gpio: gpio@1e780000 {
207 #gpio-cells = <2>;
208 gpio-controller;
209 compatible = "aspeed,ast2500-gpio";
210 reg = <0x1e780000 0x1000>;
211 interrupts = <20>;
212 gpio-ranges = <&pinctrl 0 0 220>;
213 interrupt-controller;
214 };
b590c8d2 215
cd7df3f7
AJ		 216 timer: timer@1e782000 {
217 /* This timer is a Faraday FTTMR010 derivative */
218 compatible = "aspeed,ast2400-timer";
219 reg = <0x1e782000 0x90>;
220 interrupts = <16 17 18 35 36 37 38 39>;
221 clocks = <&clk_apb>;
222 clock-names = "PCLK";
223 };
b590c8d2 224
b590c8d2 225
cd7df3f7
AJ		 226 wdt1: wdt@1e785000 {
227 compatible = "aspeed,ast2500-wdt";
228 reg = <0x1e785000 0x20>;
229 interrupts = <27>;
230 };
b590c8d2 231
cd7df3f7
AJ		 232 wdt2: wdt@1e785020 {
233 compatible = "aspeed,ast2500-wdt";
234 reg = <0x1e785020 0x20>;
235 interrupts = <27>;
236 status = "disabled";
237 };
b590c8d2 238
cd7df3f7
AJ		 239 wdt3: wdt@1e785040 {
240 compatible = "aspeed,ast2500-wdt";
241 reg = <0x1e785040 0x20>;
242 status = "disabled";
243 };
b590c8d2 244
cd7df3f7
AJ		 245 uart1: serial@1e783000 {
246 compatible = "ns16550a";
247 reg = <0x1e783000 0x1000>;
248 reg-shift = <2>;
249 interrupts = <9>;
250 clocks = <&clk_uart>;
251 no-loopback-test;
252 status = "disabled";
253 };
b590c8d2 254
cd7df3f7
AJ		 255 lpc: lpc@1e789000 {
256 compatible = "aspeed,ast2500-lpc", "simple-mfd";
257 reg = <0x1e789000 0x1000>;
b590c8d2 258
cd7df3f7
AJ		 259 #address-cells = <1>;
260 #size-cells = <1>;
261 ranges = <0 0x1e789000 0x1000>;
b590c8d2 262
cd7df3f7
AJ		 263 lpc_bmc: lpc-bmc@0 {
264 compatible = "aspeed,ast2500-lpc-bmc";
265 reg = <0x0 0x80>;
266 };
b590c8d2 267
cd7df3f7
AJ		 268 lpc_host: lpc-host@80 {
269 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
270 reg = <0x80 0x1e0>;
b590c8d2 271
cd7df3f7
AJ		 272 #address-cells = <1>;
273 #size-cells = <1>;
274 ranges = <0 0x80 0x1e0>;
b590c8d2 275
cd7df3f7 276 reg-io-width = <4>;
b590c8d2 277
cd7df3f7
AJ		 278 lhc: lhc@20 {
279 compatible = "aspeed,ast2500-lhc";
280 reg = <0x20 0x24 0x48 0x8>;
b590c8d2 281 };
cd7df3f7
AJ		 282 };
283 };
b590c8d2 284
cd7df3f7
AJ		 285 uart2: serial@1e78d000 {
286 compatible = "ns16550a";
287 reg = <0x1e78d000 0x1000>;
288 reg-shift = <2>;
289 interrupts = <32>;
290 clocks = <&clk_uart>;
291 no-loopback-test;
292 status = "disabled";
293 };
b590c8d2 294
cd7df3f7
AJ		 295 uart3: serial@1e78e000 {
296 compatible = "ns16550a";
297 reg = <0x1e78e000 0x1000>;
298 reg-shift = <2>;
299 interrupts = <33>;
300 clocks = <&clk_uart>;
301 no-loopback-test;
302 status = "disabled";
303 };
b590c8d2 304
cd7df3f7
AJ		 305 uart4: serial@1e78f000 {
306 compatible = "ns16550a";
307 reg = <0x1e78f000 0x1000>;
308 reg-shift = <2>;
309 interrupts = <34>;
310 clocks = <&clk_uart>;
311 no-loopback-test;
312 status = "disabled";
313 };
b590c8d2 314
cd7df3f7
AJ		 315 uart5: serial@1e784000 {
316 compatible = "ns16550a";
317 reg = <0x1e784000 0x1000>;
318 reg-shift = <2>;
319 interrupts = <10>;
320 clocks = <&clk_uart>;
321 current-speed = <38400>;
322 no-loopback-test;
323 status = "disabled";
324 };
b590c8d2 325
cd7df3f7
AJ		 326 uart6: serial@1e787000 {
327 compatible = "ns16550a";
328 reg = <0x1e787000 0x1000>;
329 reg-shift = <2>;
330 interrupts = <10>;
331 clocks = <&clk_uart>;
332 no-loopback-test;
333 status = "disabled";
334 };
ef856378
JS		 335
336 i2c: i2c@1e78a000 {
337 compatible = "simple-bus";
338 #address-cells = <1>;
339 #size-cells = <1>;
340 ranges = <0 0x1e78a000 0x1000>;
341 };
cd7df3f7
AJ		 342 };
343 };
344};
b590c8d2 345
ef856378
JS		 346&i2c {
347 i2c_ic: interrupt-controller@0 {
348 #interrupt-cells = <1>;
349 compatible = "aspeed,ast2500-i2c-ic";
350 reg = <0x0 0x40>;
351 interrupts = <12>;
352 interrupt-controller;
353 };
354
355 i2c0: i2c-bus@40 {
356 #address-cells = <1>;
357 #size-cells = <0>;
358 #interrupt-cells = <1>;
359
360 reg = <0x40 0x40>;
361 compatible = "aspeed,ast2500-i2c-bus";
362 clocks = <&clk_apb>;
363 bus-frequency = <100000>;
364 interrupts = <0>;
365 interrupt-parent = <&i2c_ic>;
366 status = "disabled";
367 /* Does not need pinctrl properties */
368 };
369
370 i2c1: i2c-bus@80 {
371 #address-cells = <1>;
372 #size-cells = <0>;
373 #interrupt-cells = <1>;
374
375 reg = <0x80 0x40>;
376 compatible = "aspeed,ast2500-i2c-bus";
377 clocks = <&clk_apb>;
378 bus-frequency = <100000>;
379 interrupts = <1>;
380 interrupt-parent = <&i2c_ic>;
381 status = "disabled";
382 /* Does not need pinctrl properties */
383 };
384
385 i2c2: i2c-bus@c0 {
386 #address-cells = <1>;
387 #size-cells = <0>;
388 #interrupt-cells = <1>;
389
390 reg = <0xc0 0x40>;
391 compatible = "aspeed,ast2500-i2c-bus";
392 clocks = <&clk_apb>;
393 bus-frequency = <100000>;
394 interrupts = <2>;
395 interrupt-parent = <&i2c_ic>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_i2c3_default>;
398 status = "disabled";
399 };
400
401 i2c3: i2c-bus@100 {
402 #address-cells = <1>;
403 #size-cells = <0>;
404 #interrupt-cells = <1>;
405
406 reg = <0x100 0x40>;
407 compatible = "aspeed,ast2500-i2c-bus";
408 clocks = <&clk_apb>;
409 bus-frequency = <100000>;
410 interrupts = <3>;
411 interrupt-parent = <&i2c_ic>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_i2c4_default>;
414 status = "disabled";
415 };
416
417 i2c4: i2c-bus@140 {
418 #address-cells = <1>;
419 #size-cells = <0>;
420 #interrupt-cells = <1>;
421
422 reg = <0x140 0x40>;
423 compatible = "aspeed,ast2500-i2c-bus";
424 clocks = <&clk_apb>;
425 bus-frequency = <100000>;
426 interrupts = <4>;
427 interrupt-parent = <&i2c_ic>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_i2c5_default>;
430 status = "disabled";
431 };
432
433 i2c5: i2c-bus@180 {
434 #address-cells = <1>;
435 #size-cells = <0>;
436 #interrupt-cells = <1>;
437
438 reg = <0x180 0x40>;
439 compatible = "aspeed,ast2500-i2c-bus";
440 clocks = <&clk_apb>;
441 bus-frequency = <100000>;
442 interrupts = <5>;
443 interrupt-parent = <&i2c_ic>;
444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_i2c6_default>;
446 status = "disabled";
447 };
448
449 i2c6: i2c-bus@1c0 {
450 #address-cells = <1>;
451 #size-cells = <0>;
452 #interrupt-cells = <1>;
453
454 reg = <0x1c0 0x40>;
455 compatible = "aspeed,ast2500-i2c-bus";
456 clocks = <&clk_apb>;
457 bus-frequency = <100000>;
458 interrupts = <6>;
459 interrupt-parent = <&i2c_ic>;
460 pinctrl-names = "default";
461 pinctrl-0 = <&pinctrl_i2c7_default>;
462 status = "disabled";
463 };
464
465 i2c7: i2c-bus@300 {
466 #address-cells = <1>;
467 #size-cells = <0>;
468 #interrupt-cells = <1>;
469
470 reg = <0x300 0x40>;
471 compatible = "aspeed,ast2500-i2c-bus";
472 clocks = <&clk_apb>;
473 bus-frequency = <100000>;
474 interrupts = <7>;
475 interrupt-parent = <&i2c_ic>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_i2c8_default>;
478 status = "disabled";
479 };
480
481 i2c8: i2c-bus@340 {
482 #address-cells = <1>;
483 #size-cells = <0>;
484 #interrupt-cells = <1>;
485
486 reg = <0x340 0x40>;
487 compatible = "aspeed,ast2500-i2c-bus";
488 clocks = <&clk_apb>;
489 bus-frequency = <100000>;
490 interrupts = <8>;
491 interrupt-parent = <&i2c_ic>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_i2c9_default>;
494 status = "disabled";
495 };
496
497 i2c9: i2c-bus@380 {
498 #address-cells = <1>;
499 #size-cells = <0>;
500 #interrupt-cells = <1>;
501
502 reg = <0x380 0x40>;
503 compatible = "aspeed,ast2500-i2c-bus";
504 clocks = <&clk_apb>;
505 bus-frequency = <100000>;
506 interrupts = <9>;
507 interrupt-parent = <&i2c_ic>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_i2c10_default>;
510 status = "disabled";
511 };
512
513 i2c10: i2c-bus@3c0 {
514 #address-cells = <1>;
515 #size-cells = <0>;
516 #interrupt-cells = <1>;
517
518 reg = <0x3c0 0x40>;
519 compatible = "aspeed,ast2500-i2c-bus";
520 clocks = <&clk_apb>;
521 bus-frequency = <100000>;
522 interrupts = <10>;
523 interrupt-parent = <&i2c_ic>;
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_i2c11_default>;
526 status = "disabled";
527 };
528
529 i2c11: i2c-bus@400 {
530 #address-cells = <1>;
531 #size-cells = <0>;
532 #interrupt-cells = <1>;
533
534 reg = <0x400 0x40>;
535 compatible = "aspeed,ast2500-i2c-bus";
536 clocks = <&clk_apb>;
537 bus-frequency = <100000>;
538 interrupts = <11>;
539 interrupt-parent = <&i2c_ic>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_i2c12_default>;
542 status = "disabled";
543 };
544
545 i2c12: i2c-bus@440 {
546 #address-cells = <1>;
547 #size-cells = <0>;
548 #interrupt-cells = <1>;
549
550 reg = <0x440 0x40>;
551 compatible = "aspeed,ast2500-i2c-bus";
552 clocks = <&clk_apb>;
553 bus-frequency = <100000>;
554 interrupts = <12>;
555 interrupt-parent = <&i2c_ic>;
556 pinctrl-names = "default";
557 pinctrl-0 = <&pinctrl_i2c13_default>;
558 status = "disabled";
559 };
560
561 i2c13: i2c-bus@480 {
562 #address-cells = <1>;
563 #size-cells = <0>;
564 #interrupt-cells = <1>;
565
566 reg = <0x480 0x40>;
567 compatible = "aspeed,ast2500-i2c-bus";
568 clocks = <&clk_apb>;
569 bus-frequency = <100000>;
570 interrupts = <13>;
571 interrupt-parent = <&i2c_ic>;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_i2c14_default>;
574 status = "disabled";
575 };
576};
577
cd7df3f7
AJ		 578&pinctrl {
579 pinctrl_acpi_default: acpi_default {
580 function = "ACPI";
581 groups = "ACPI";
582 };
b590c8d2 583
cd7df3f7
AJ		 584 pinctrl_adc0_default: adc0_default {
585 function = "ADC0";
586 groups = "ADC0";
587 };
b590c8d2 588
cd7df3f7
AJ		 589 pinctrl_adc1_default: adc1_default {
590 function = "ADC1";
591 groups = "ADC1";
592 };
b590c8d2 593
cd7df3f7
AJ		 594 pinctrl_adc10_default: adc10_default {
595 function = "ADC10";
596 groups = "ADC10";
597 };
b590c8d2 598
cd7df3f7
AJ		 599 pinctrl_adc11_default: adc11_default {
600 function = "ADC11";
601 groups = "ADC11";
602 };
b590c8d2 603
cd7df3f7
AJ		 604 pinctrl_adc12_default: adc12_default {
605 function = "ADC12";
606 groups = "ADC12";
607 };
b590c8d2 608
cd7df3f7
AJ		 609 pinctrl_adc13_default: adc13_default {
610 function = "ADC13";
611 groups = "ADC13";
612 };
b590c8d2 613
cd7df3f7
AJ		 614 pinctrl_adc14_default: adc14_default {
615 function = "ADC14";
616 groups = "ADC14";
617 };
b590c8d2 618
cd7df3f7
AJ		 619 pinctrl_adc15_default: adc15_default {
620 function = "ADC15";
621 groups = "ADC15";
622 };
b590c8d2 623
cd7df3f7
AJ		 624 pinctrl_adc2_default: adc2_default {
625 function = "ADC2";
626 groups = "ADC2";
627 };
b590c8d2 628
cd7df3f7
AJ		 629 pinctrl_adc3_default: adc3_default {
630 function = "ADC3";
631 groups = "ADC3";
632 };
b590c8d2 633
cd7df3f7
AJ		 634 pinctrl_adc4_default: adc4_default {
635 function = "ADC4";
636 groups = "ADC4";
637 };
b590c8d2 638
cd7df3f7
AJ		 639 pinctrl_adc5_default: adc5_default {
640 function = "ADC5";
641 groups = "ADC5";
642 };
b590c8d2 643
cd7df3f7
AJ		 644 pinctrl_adc6_default: adc6_default {
645 function = "ADC6";
646 groups = "ADC6";
647 };
b590c8d2 648
cd7df3f7
AJ		 649 pinctrl_adc7_default: adc7_default {
650 function = "ADC7";
651 groups = "ADC7";
652 };
b590c8d2 653
cd7df3f7
AJ		 654 pinctrl_adc8_default: adc8_default {
655 function = "ADC8";
656 groups = "ADC8";
657 };
b590c8d2 658
cd7df3f7
AJ		 659 pinctrl_adc9_default: adc9_default {
660 function = "ADC9";
661 groups = "ADC9";
662 };
b590c8d2 663
cd7df3f7
AJ		 664 pinctrl_bmcint_default: bmcint_default {
665 function = "BMCINT";
666 groups = "BMCINT";
667 };
b590c8d2 668
cd7df3f7
AJ		 669 pinctrl_ddcclk_default: ddcclk_default {
670 function = "DDCCLK";
671 groups = "DDCCLK";
672 };
b590c8d2 673
cd7df3f7
AJ		 674 pinctrl_ddcdat_default: ddcdat_default {
675 function = "DDCDAT";
676 groups = "DDCDAT";
677 };
b590c8d2 678
cd7df3f7
AJ		 679 pinctrl_espi_default: espi_default {
680 function = "ESPI";
681 groups = "ESPI";
682 };
b590c8d2 683
cd7df3f7
AJ		 684 pinctrl_fwspics1_default: fwspics1_default {
685 function = "FWSPICS1";
686 groups = "FWSPICS1";
687 };
b590c8d2 688
cd7df3f7
AJ		 689 pinctrl_fwspics2_default: fwspics2_default {
690 function = "FWSPICS2";
691 groups = "FWSPICS2";
692 };
b590c8d2 693
cd7df3f7
AJ		 694 pinctrl_gpid0_default: gpid0_default {
695 function = "GPID0";
696 groups = "GPID0";
697 };
b590c8d2 698
cd7df3f7
AJ		 699 pinctrl_gpid2_default: gpid2_default {
700 function = "GPID2";
701 groups = "GPID2";
702 };
b590c8d2 703
cd7df3f7
AJ		 704 pinctrl_gpid4_default: gpid4_default {
705 function = "GPID4";
706 groups = "GPID4";
707 };
b590c8d2 708
cd7df3f7
AJ		 709 pinctrl_gpid6_default: gpid6_default {
710 function = "GPID6";
711 groups = "GPID6";
712 };
b590c8d2 713
cd7df3f7
AJ		 714 pinctrl_gpie0_default: gpie0_default {
715 function = "GPIE0";
716 groups = "GPIE0";
717 };
b590c8d2 718
cd7df3f7
AJ		 719 pinctrl_gpie2_default: gpie2_default {
720 function = "GPIE2";
721 groups = "GPIE2";
722 };
b590c8d2 723
cd7df3f7
AJ		 724 pinctrl_gpie4_default: gpie4_default {
725 function = "GPIE4";
726 groups = "GPIE4";
727 };
b590c8d2 728
cd7df3f7
AJ		 729 pinctrl_gpie6_default: gpie6_default {
730 function = "GPIE6";
731 groups = "GPIE6";
732 };
b590c8d2 733
cd7df3f7
AJ		 734 pinctrl_i2c10_default: i2c10_default {
735 function = "I2C10";
736 groups = "I2C10";
737 };
b590c8d2 738
cd7df3f7
AJ		 739 pinctrl_i2c11_default: i2c11_default {
740 function = "I2C11";
741 groups = "I2C11";
742 };
b590c8d2 743
cd7df3f7
AJ		 744 pinctrl_i2c12_default: i2c12_default {
745 function = "I2C12";
746 groups = "I2C12";
747 };
b590c8d2 748
cd7df3f7
AJ		 749 pinctrl_i2c13_default: i2c13_default {
750 function = "I2C13";
751 groups = "I2C13";
752 };
b590c8d2 753
cd7df3f7
AJ		 754 pinctrl_i2c14_default: i2c14_default {
755 function = "I2C14";
756 groups = "I2C14";
757 };
b590c8d2 758
cd7df3f7
AJ		 759 pinctrl_i2c3_default: i2c3_default {
760 function = "I2C3";
761 groups = "I2C3";
762 };
b590c8d2 763
cd7df3f7
AJ		 764 pinctrl_i2c4_default: i2c4_default {
765 function = "I2C4";
766 groups = "I2C4";
767 };
b590c8d2 768
cd7df3f7
AJ		 769 pinctrl_i2c5_default: i2c5_default {
770 function = "I2C5";
771 groups = "I2C5";
772 };
b590c8d2 773
cd7df3f7
AJ		 774 pinctrl_i2c6_default: i2c6_default {
775 function = "I2C6";
776 groups = "I2C6";
777 };
b590c8d2 778
cd7df3f7
AJ		 779 pinctrl_i2c7_default: i2c7_default {
780 function = "I2C7";
781 groups = "I2C7";
782 };
b590c8d2 783
cd7df3f7
AJ		 784 pinctrl_i2c8_default: i2c8_default {
785 function = "I2C8";
786 groups = "I2C8";
787 };
b590c8d2 788
cd7df3f7
AJ		 789 pinctrl_i2c9_default: i2c9_default {
790 function = "I2C9";
791 groups = "I2C9";
792 };
b590c8d2 793
cd7df3f7
AJ		 794 pinctrl_lad0_default: lad0_default {
795 function = "LAD0";
796 groups = "LAD0";
797 };
b590c8d2 798
cd7df3f7
AJ		 799 pinctrl_lad1_default: lad1_default {
800 function = "LAD1";
801 groups = "LAD1";
802 };
b590c8d2 803
cd7df3f7
AJ		 804 pinctrl_lad2_default: lad2_default {
805 function = "LAD2";
806 groups = "LAD2";
807 };
b590c8d2 808
cd7df3f7
AJ		 809 pinctrl_lad3_default: lad3_default {
810 function = "LAD3";
811 groups = "LAD3";
812 };
b590c8d2 813
cd7df3f7
AJ		 814 pinctrl_lclk_default: lclk_default {
815 function = "LCLK";
816 groups = "LCLK";
817 };
b590c8d2 818
cd7df3f7
AJ		 819 pinctrl_lframe_default: lframe_default {
820 function = "LFRAME";
821 groups = "LFRAME";
822 };
b590c8d2 823
cd7df3f7
AJ		 824 pinctrl_lpchc_default: lpchc_default {
825 function = "LPCHC";
826 groups = "LPCHC";
827 };
b590c8d2 828
cd7df3f7
AJ		 829 pinctrl_lpcpd_default: lpcpd_default {
830 function = "LPCPD";
831 groups = "LPCPD";
832 };
b590c8d2 833
cd7df3f7
AJ		 834 pinctrl_lpcplus_default: lpcplus_default {
835 function = "LPCPLUS";
836 groups = "LPCPLUS";
837 };
b590c8d2 838
cd7df3f7
AJ		 839 pinctrl_lpcpme_default: lpcpme_default {
840 function = "LPCPME";
841 groups = "LPCPME";
842 };
b590c8d2 843
cd7df3f7
AJ		 844 pinctrl_lpcrst_default: lpcrst_default {
845 function = "LPCRST";
846 groups = "LPCRST";
847 };
b590c8d2 848
cd7df3f7
AJ		 849 pinctrl_lpcsmi_default: lpcsmi_default {
850 function = "LPCSMI";
851 groups = "LPCSMI";
852 };
b590c8d2 853
cd7df3f7
AJ		 854 pinctrl_lsirq_default: lsirq_default {
855 function = "LSIRQ";
856 groups = "LSIRQ";
857 };
b590c8d2 858
cd7df3f7
AJ		 859 pinctrl_mac1link_default: mac1link_default {
860 function = "MAC1LINK";
861 groups = "MAC1LINK";
862 };
b590c8d2 863
cd7df3f7
AJ		 864 pinctrl_mac2link_default: mac2link_default {
865 function = "MAC2LINK";
866 groups = "MAC2LINK";
867 };
b590c8d2 868
cd7df3f7
AJ		 869 pinctrl_mdio1_default: mdio1_default {
870 function = "MDIO1";
871 groups = "MDIO1";
872 };
b590c8d2 873
cd7df3f7
AJ		 874 pinctrl_mdio2_default: mdio2_default {
875 function = "MDIO2";
876 groups = "MDIO2";
877 };
b590c8d2 878
cd7df3f7
AJ		 879 pinctrl_ncts1_default: ncts1_default {
880 function = "NCTS1";
881 groups = "NCTS1";
882 };
b590c8d2 883
cd7df3f7
AJ		 884 pinctrl_ncts2_default: ncts2_default {
885 function = "NCTS2";
886 groups = "NCTS2";
887 };
b590c8d2 888
cd7df3f7
AJ		 889 pinctrl_ncts3_default: ncts3_default {
890 function = "NCTS3";
891 groups = "NCTS3";
892 };
b590c8d2 893
cd7df3f7
AJ		 894 pinctrl_ncts4_default: ncts4_default {
895 function = "NCTS4";
896 groups = "NCTS4";
897 };
b590c8d2 898
cd7df3f7
AJ		 899 pinctrl_ndcd1_default: ndcd1_default {
900 function = "NDCD1";
901 groups = "NDCD1";
902 };
b590c8d2 903
cd7df3f7
AJ		 904 pinctrl_ndcd2_default: ndcd2_default {
905 function = "NDCD2";
906 groups = "NDCD2";
907 };
b590c8d2 908
cd7df3f7
AJ		 909 pinctrl_ndcd3_default: ndcd3_default {
910 function = "NDCD3";
911 groups = "NDCD3";
912 };
b590c8d2 913
cd7df3f7
AJ		 914 pinctrl_ndcd4_default: ndcd4_default {
915 function = "NDCD4";
916 groups = "NDCD4";
917 };
b590c8d2 918
cd7df3f7
AJ		 919 pinctrl_ndsr1_default: ndsr1_default {
920 function = "NDSR1";
921 groups = "NDSR1";
922 };
b590c8d2 923
cd7df3f7
AJ		 924 pinctrl_ndsr2_default: ndsr2_default {
925 function = "NDSR2";
926 groups = "NDSR2";
927 };
b590c8d2 928
cd7df3f7
AJ		 929 pinctrl_ndsr3_default: ndsr3_default {
930 function = "NDSR3";
931 groups = "NDSR3";
932 };
b590c8d2 933
cd7df3f7
AJ		 934 pinctrl_ndsr4_default: ndsr4_default {
935 function = "NDSR4";
936 groups = "NDSR4";
937 };
b590c8d2 938
cd7df3f7
AJ		 939 pinctrl_ndtr1_default: ndtr1_default {
940 function = "NDTR1";
941 groups = "NDTR1";
942 };
b590c8d2 943
cd7df3f7
AJ		 944 pinctrl_ndtr2_default: ndtr2_default {
945 function = "NDTR2";
946 groups = "NDTR2";
947 };
b590c8d2 948
cd7df3f7
AJ		 949 pinctrl_ndtr3_default: ndtr3_default {
950 function = "NDTR3";
951 groups = "NDTR3";
952 };
b590c8d2 953
cd7df3f7
AJ		 954 pinctrl_ndtr4_default: ndtr4_default {
955 function = "NDTR4";
956 groups = "NDTR4";
957 };
b590c8d2 958
cd7df3f7
AJ		 959 pinctrl_nri1_default: nri1_default {
960 function = "NRI1";
961 groups = "NRI1";
962 };
b590c8d2 963
cd7df3f7
AJ		 964 pinctrl_nri2_default: nri2_default {
965 function = "NRI2";
966 groups = "NRI2";
967 };
b590c8d2 968
cd7df3f7
AJ		 969 pinctrl_nri3_default: nri3_default {
970 function = "NRI3";
971 groups = "NRI3";
972 };
b590c8d2 973
cd7df3f7
AJ		 974 pinctrl_nri4_default: nri4_default {
975 function = "NRI4";
976 groups = "NRI4";
977 };
b590c8d2 978
cd7df3f7
AJ		 979 pinctrl_nrts1_default: nrts1_default {
980 function = "NRTS1";
981 groups = "NRTS1";
982 };
b590c8d2 983
cd7df3f7
AJ		 984 pinctrl_nrts2_default: nrts2_default {
985 function = "NRTS2";
986 groups = "NRTS2";
987 };
b590c8d2 988
cd7df3f7
AJ		 989 pinctrl_nrts3_default: nrts3_default {
990 function = "NRTS3";
991 groups = "NRTS3";
992 };
b590c8d2 993
cd7df3f7
AJ		 994 pinctrl_nrts4_default: nrts4_default {
995 function = "NRTS4";
996 groups = "NRTS4";
997 };
b590c8d2 998
cd7df3f7
AJ		 999 pinctrl_oscclk_default: oscclk_default {
1000 function = "OSCCLK";
1001 groups = "OSCCLK";
1002 };
1003
1004 pinctrl_pewake_default: pewake_default {
1005 function = "PEWAKE";
1006 groups = "PEWAKE";
1007 };
b590c8d2 1008
cd7df3f7
AJ		 1009 pinctrl_pnor_default: pnor_default {
1010 function = "PNOR";
1011 groups = "PNOR";
1012 };
b590c8d2 1013
cd7df3f7
AJ		 1014 pinctrl_pwm0_default: pwm0_default {
1015 function = "PWM0";
1016 groups = "PWM0";
1017 };
b590c8d2 1018
cd7df3f7
AJ		 1019 pinctrl_pwm1_default: pwm1_default {
1020 function = "PWM1";
1021 groups = "PWM1";
1022 };
b590c8d2 1023
cd7df3f7
AJ		 1024 pinctrl_pwm2_default: pwm2_default {
1025 function = "PWM2";
1026 groups = "PWM2";
1027 };
b590c8d2 1028
cd7df3f7
AJ		 1029 pinctrl_pwm3_default: pwm3_default {
1030 function = "PWM3";
1031 groups = "PWM3";
1032 };
b590c8d2 1033
cd7df3f7
AJ		 1034 pinctrl_pwm4_default: pwm4_default {
1035 function = "PWM4";
1036 groups = "PWM4";
1037 };
b590c8d2 1038
cd7df3f7
AJ		 1039 pinctrl_pwm5_default: pwm5_default {
1040 function = "PWM5";
1041 groups = "PWM5";
1042 };
b590c8d2 1043
cd7df3f7
AJ		 1044 pinctrl_pwm6_default: pwm6_default {
1045 function = "PWM6";
1046 groups = "PWM6";
1047 };
b590c8d2 1048
cd7df3f7
AJ		 1049 pinctrl_pwm7_default: pwm7_default {
1050 function = "PWM7";
1051 groups = "PWM7";
1052 };
b590c8d2 1053
cd7df3f7
AJ		 1054 pinctrl_rgmii1_default: rgmii1_default {
1055 function = "RGMII1";
1056 groups = "RGMII1";
1057 };
b590c8d2 1058
cd7df3f7
AJ		 1059 pinctrl_rgmii2_default: rgmii2_default {
1060 function = "RGMII2";
1061 groups = "RGMII2";
1062 };
b590c8d2 1063
cd7df3f7
AJ		 1064 pinctrl_rmii1_default: rmii1_default {
1065 function = "RMII1";
1066 groups = "RMII1";
1067 };
b590c8d2 1068
cd7df3f7
AJ		 1069 pinctrl_rmii2_default: rmii2_default {
1070 function = "RMII2";
1071 groups = "RMII2";
1072 };
b590c8d2 1073
cd7df3f7
AJ		 1074 pinctrl_rxd1_default: rxd1_default {
1075 function = "RXD1";
1076 groups = "RXD1";
1077 };
b590c8d2 1078
cd7df3f7
AJ		 1079 pinctrl_rxd2_default: rxd2_default {
1080 function = "RXD2";
1081 groups = "RXD2";
1082 };
b590c8d2 1083
cd7df3f7
AJ		 1084 pinctrl_rxd3_default: rxd3_default {
1085 function = "RXD3";
1086 groups = "RXD3";
1087 };
b590c8d2 1088
cd7df3f7
AJ		 1089 pinctrl_rxd4_default: rxd4_default {
1090 function = "RXD4";
1091 groups = "RXD4";
1092 };
b590c8d2 1093
cd7df3f7
AJ		 1094 pinctrl_salt1_default: salt1_default {
1095 function = "SALT1";
1096 groups = "SALT1";
1097 };
b590c8d2 1098
cd7df3f7
AJ		 1099 pinctrl_salt10_default: salt10_default {
1100 function = "SALT10";
1101 groups = "SALT10";
1102 };
b590c8d2 1103
cd7df3f7
AJ		 1104 pinctrl_salt11_default: salt11_default {
1105 function = "SALT11";
1106 groups = "SALT11";
1107 };
b590c8d2 1108
cd7df3f7
AJ		 1109 pinctrl_salt12_default: salt12_default {
1110 function = "SALT12";
1111 groups = "SALT12";
1112 };
b590c8d2 1113
cd7df3f7
AJ		 1114 pinctrl_salt13_default: salt13_default {
1115 function = "SALT13";
1116 groups = "SALT13";
1117 };
b590c8d2 1118
cd7df3f7
AJ		 1119 pinctrl_salt14_default: salt14_default {
1120 function = "SALT14";
1121 groups = "SALT14";
1122 };
b590c8d2 1123
cd7df3f7
AJ		 1124 pinctrl_salt2_default: salt2_default {
1125 function = "SALT2";
1126 groups = "SALT2";
1127 };
b590c8d2 1128
cd7df3f7
AJ		 1129 pinctrl_salt3_default: salt3_default {
1130 function = "SALT3";
1131 groups = "SALT3";
1132 };
b590c8d2 1133
cd7df3f7
AJ		 1134 pinctrl_salt4_default: salt4_default {
1135 function = "SALT4";
1136 groups = "SALT4";
1137 };
b590c8d2 1138
cd7df3f7
AJ		 1139 pinctrl_salt5_default: salt5_default {
1140 function = "SALT5";
1141 groups = "SALT5";
1142 };
b590c8d2 1143
cd7df3f7
AJ		 1144 pinctrl_salt6_default: salt6_default {
1145 function = "SALT6";
1146 groups = "SALT6";
1147 };
b590c8d2 1148
cd7df3f7
AJ		 1149 pinctrl_salt7_default: salt7_default {
1150 function = "SALT7";
1151 groups = "SALT7";
1152 };
b590c8d2 1153
cd7df3f7
AJ		 1154 pinctrl_salt8_default: salt8_default {
1155 function = "SALT8";
1156 groups = "SALT8";
1157 };
b590c8d2 1158
cd7df3f7
AJ		 1159 pinctrl_salt9_default: salt9_default {
1160 function = "SALT9";
1161 groups = "SALT9";
1162 };
b590c8d2 1163
cd7df3f7
AJ		 1164 pinctrl_scl1_default: scl1_default {
1165 function = "SCL1";
1166 groups = "SCL1";
1167 };
b590c8d2 1168
cd7df3f7
AJ		 1169 pinctrl_scl2_default: scl2_default {
1170 function = "SCL2";
1171 groups = "SCL2";
1172 };
b590c8d2 1173
cd7df3f7
AJ		 1174 pinctrl_sd1_default: sd1_default {
1175 function = "SD1";
1176 groups = "SD1";
1177 };
b590c8d2 1178
cd7df3f7
AJ		 1179 pinctrl_sd2_default: sd2_default {
1180 function = "SD2";
1181 groups = "SD2";
1182 };
b590c8d2 1183
cd7df3f7
AJ		 1184 pinctrl_sda1_default: sda1_default {
1185 function = "SDA1";
1186 groups = "SDA1";
1187 };
b590c8d2 1188
cd7df3f7
AJ		 1189 pinctrl_sda2_default: sda2_default {
1190 function = "SDA2";
1191 groups = "SDA2";
1192 };
b590c8d2 1193
cd7df3f7
AJ		 1194 pinctrl_sgps1_default: sgps1_default {
1195 function = "SGPS1";
1196 groups = "SGPS1";
1197 };
b590c8d2 1198
cd7df3f7
AJ		 1199 pinctrl_sgps2_default: sgps2_default {
1200 function = "SGPS2";
1201 groups = "SGPS2";
1202 };
b590c8d2 1203
cd7df3f7
AJ		 1204 pinctrl_sioonctrl_default: sioonctrl_default {
1205 function = "SIOONCTRL";
1206 groups = "SIOONCTRL";
1207 };
b590c8d2 1208
cd7df3f7
AJ		 1209 pinctrl_siopbi_default: siopbi_default {
1210 function = "SIOPBI";
1211 groups = "SIOPBI";
1212 };
b590c8d2 1213
cd7df3f7
AJ		 1214 pinctrl_siopbo_default: siopbo_default {
1215 function = "SIOPBO";
1216 groups = "SIOPBO";
1217 };
b590c8d2 1218
cd7df3f7
AJ		 1219 pinctrl_siopwreq_default: siopwreq_default {
1220 function = "SIOPWREQ";
1221 groups = "SIOPWREQ";
1222 };
b590c8d2 1223
cd7df3f7
AJ		 1224 pinctrl_siopwrgd_default: siopwrgd_default {
1225 function = "SIOPWRGD";
1226 groups = "SIOPWRGD";
1227 };
b590c8d2 1228
cd7df3f7
AJ		 1229 pinctrl_sios3_default: sios3_default {
1230 function = "SIOS3";
1231 groups = "SIOS3";
1232 };
b590c8d2 1233
cd7df3f7
AJ		 1234 pinctrl_sios5_default: sios5_default {
1235 function = "SIOS5";
1236 groups = "SIOS5";
1237 };
b590c8d2 1238
cd7df3f7
AJ		 1239 pinctrl_siosci_default: siosci_default {
1240 function = "SIOSCI";
1241 groups = "SIOSCI";
1242 };
b590c8d2 1243
cd7df3f7
AJ		 1244 pinctrl_spi1_default: spi1_default {
1245 function = "SPI1";
1246 groups = "SPI1";
1247 };
b590c8d2 1248
cd7df3f7
AJ		 1249 pinctrl_spi1cs1_default: spi1cs1_default {
1250 function = "SPI1CS1";
1251 groups = "SPI1CS1";
1252 };
b590c8d2 1253
cd7df3f7
AJ		 1254 pinctrl_spi1debug_default: spi1debug_default {
1255 function = "SPI1DEBUG";
1256 groups = "SPI1DEBUG";
1257 };
b590c8d2 1258
cd7df3f7
AJ		 1259 pinctrl_spi1passthru_default: spi1passthru_default {
1260 function = "SPI1PASSTHRU";
1261 groups = "SPI1PASSTHRU";
1262 };
b590c8d2 1263
cd7df3f7
AJ		 1264 pinctrl_spi2ck_default: spi2ck_default {
1265 function = "SPI2CK";
1266 groups = "SPI2CK";
1267 };
02440622 1268
cd7df3f7
AJ		 1269 pinctrl_spi2cs0_default: spi2cs0_default {
1270 function = "SPI2CS0";
1271 groups = "SPI2CS0";
1272 };
02440622 1273
cd7df3f7
AJ		 1274 pinctrl_spi2cs1_default: spi2cs1_default {
1275 function = "SPI2CS1";
1276 groups = "SPI2CS1";
1277 };
daf04258 1278
cd7df3f7
AJ		 1279 pinctrl_spi2miso_default: spi2miso_default {
1280 function = "SPI2MISO";
1281 groups = "SPI2MISO";
1282 };
02440622 1283
cd7df3f7
AJ		 1284 pinctrl_spi2mosi_default: spi2mosi_default {
1285 function = "SPI2MOSI";
1286 groups = "SPI2MOSI";
1287 };
2039f90d 1288
cd7df3f7
AJ		 1289 pinctrl_timer3_default: timer3_default {
1290 function = "TIMER3";
1291 groups = "TIMER3";
1292 };
02440622 1293
cd7df3f7
AJ		 1294 pinctrl_timer4_default: timer4_default {
1295 function = "TIMER4";
1296 groups = "TIMER4";
1297 };
cec822f8 1298
cd7df3f7
AJ		 1299 pinctrl_timer5_default: timer5_default {
1300 function = "TIMER5";
1301 groups = "TIMER5";
1302 };
02440622 1303
cd7df3f7
AJ		 1304 pinctrl_timer6_default: timer6_default {
1305 function = "TIMER6";
1306 groups = "TIMER6";
1307 };
02440622 1308
cd7df3f7
AJ		 1309 pinctrl_timer7_default: timer7_default {
1310 function = "TIMER7";
1311 groups = "TIMER7";
1312 };
02440622 1313
cd7df3f7
AJ		 1314 pinctrl_timer8_default: timer8_default {
1315 function = "TIMER8";
1316 groups = "TIMER8";
1317 };
02440622 1318
cd7df3f7
AJ		 1319 pinctrl_txd1_default: txd1_default {
1320 function = "TXD1";
1321 groups = "TXD1";
1322 };
cec822f8 1323
cd7df3f7
AJ		 1324 pinctrl_txd2_default: txd2_default {
1325 function = "TXD2";
1326 groups = "TXD2";
1327 };
cec822f8 1328
cd7df3f7
AJ		 1329 pinctrl_txd3_default: txd3_default {
1330 function = "TXD3";
1331 groups = "TXD3";
1332 };
cec822f8 1333
cd7df3f7
AJ		 1334 pinctrl_txd4_default: txd4_default {
1335 function = "TXD4";
1336 groups = "TXD4";
1337 };
cec822f8 1338
cd7df3f7
AJ		 1339 pinctrl_uart6_default: uart6_default {
1340 function = "UART6";
1341 groups = "UART6";
1342 };
cec822f8 1343
cd7df3f7
AJ		 1344 pinctrl_usbcki_default: usbcki_default {
1345 function = "USBCKI";
1346 groups = "USBCKI";
1347 };
cec822f8 1348
cd7df3f7
AJ		 1349 pinctrl_vgabiosrom_default: vgabiosrom_default {
1350 function = "VGABIOSROM";
1351 groups = "VGABIOSROM";
1352 };
cec822f8 1353
cd7df3f7
AJ		 1354 pinctrl_vgahs_default: vgahs_default {
1355 function = "VGAHS";
1356 groups = "VGAHS";
1357 };
02440622 1358
cd7df3f7
AJ		 1359 pinctrl_vgavs_default: vgavs_default {
1360 function = "VGAVS";
1361 groups = "VGAVS";
1362 };
02440622 1363
cd7df3f7
AJ		 1364 pinctrl_vpi24_default: vpi24_default {
1365 function = "VPI24";
1366 groups = "VPI24";
1367 };
02440622 1368
cd7df3f7
AJ		 1369 pinctrl_vpo_default: vpo_default {
1370 function = "VPO";
1371 groups = "VPO";
1372 };
02440622 1373
cd7df3f7
AJ		 1374 pinctrl_wdtrst1_default: wdtrst1_default {
1375 function = "WDTRST1";
1376 groups = "WDTRST1";
1377 };
78a2569f 1378
cd7df3f7
AJ		 1379 pinctrl_wdtrst2_default: wdtrst2_default {
1380 function = "WDTRST2";
1381 groups = "WDTRST2";
02440622
JS		 1382 };
1383};
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