]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - arch/arm/boot/dts/at91rm9200.dtsi
projects / mirror_ubuntu-eoan-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'mips_fixes_5.1_1' into mips-next
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / at91rm9200.dtsi
CommitLineData
fe975cf6
JE		 1/*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
12
c9d0f317 13#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 14#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 15#include <dt-bindings/gpio/gpio.h>
68580013 16#include <dt-bindings/clock/at91.h>
fe975cf6
JE		 17
18/ {
abe60a3a
RH		 19 #address-cells = <1>;
20 #size-cells = <1>;
fe975cf6
JE		 21 model = "Atmel AT91RM9200 family SoC";
22 compatible = "atmel,at91rm9200";
23 interrupt-parent = <&aic>;
24
25 aliases {
26 serial0 = &dbgu;
27 serial1 = &usart0;
28 serial2 = &usart1;
29 serial3 = &usart2;
30 serial4 = &usart3;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 gpio3 = &pioD;
35 tcb0 = &tcb0;
36 tcb1 = &tcb1;
2d25210d 37 i2c0 = &i2c0;
883a07f6
JE		 38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
40 ssc2 = &ssc2;
fe975cf6
JE		 41 };
42 cpus {
e757a6ee
LP		 43 #address-cells = <0>;
44 #size-cells = <0>;
45
46 cpu {
fe975cf6 47 compatible = "arm,arm920t";
e757a6ee 48 device_type = "cpu";
fe975cf6
JE		 49 };
50 };
51
52 memory {
abe60a3a 53 device_type = "memory";
fe975cf6
JE		 54 reg = <0x20000000 0x04000000>;
55 };
56
68580013
AB		 57 clocks {
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <0>;
68 };
69 };
70
8dccafaa 71 sram: sram@200000 {
f04660e4
AB		 72 compatible = "mmio-sram";
73 reg = <0x00200000 0x4000>;
74 };
75
fe975cf6
JE		 76 ahb {
77 compatible = "simple-bus";
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges;
81
82 apb {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
87
88 aic: interrupt-controller@fffff000 {
89 #interrupt-cells = <3>;
90 compatible = "atmel,at91rm9200-aic";
91 interrupt-controller;
92 reg = <0xfffff000 0x200>;
93 atmel,external-irqs = <25 26 27 28 29 30 31>;
94 };
95
96 ramc0: ramc@ffffff00 {
0506b298 97 compatible = "atmel,at91rm9200-sdramc", "syscon";
fe975cf6
JE		 98 reg = <0xffffff00 0x100>;
99 };
100
101 pmc: pmc@fffffc00 {
620f5033 102 compatible = "atmel,at91rm9200-pmc", "syscon";
fe975cf6 103 reg = <0xfffffc00 0x100>;
68580013
AB		 104 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
105 interrupt-controller;
106 #address-cells = <1>;
107 #size-cells = <0>;
108 #interrupt-cells = <1>;
109
110 main_osc: main_osc {
111 compatible = "atmel,at91rm9200-clk-main-osc";
112 #clock-cells = <0>;
113 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
114 clocks = <&main_xtal>;
115 };
116
117 main: mainck {
118 compatible = "atmel,at91rm9200-clk-main";
119 #clock-cells = <0>;
120 clocks = <&main_osc>;
121 };
122
123 plla: pllack {
124 compatible = "atmel,at91rm9200-clk-pll";
125 #clock-cells = <0>;
126 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
127 clocks = <&main>;
128 reg = <0>;
129 atmel,clk-input-range = <1000000 32000000>;
130 #atmel,pll-clk-output-range-cells = <3>;
131 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
132 <150000000 180000000 2>;
133 };
134
135 pllb: pllbck {
136 compatible = "atmel,at91rm9200-clk-pll";
137 #clock-cells = <0>;
138 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
139 clocks = <&main>;
140 reg = <1>;
141 atmel,clk-input-range = <1000000 32000000>;
142 #atmel,pll-clk-output-range-cells = <3>;
143 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
144 <150000000 180000000 2>;
145 };
146
147 mck: masterck {
148 compatible = "atmel,at91rm9200-clk-master";
149 #clock-cells = <0>;
150 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
151 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
152 atmel,clk-output-range = <0 80000000>;
153 atmel,clk-divisors = <1 2 3 4>;
154 };
155
156 usb: usbck {
157 compatible = "atmel,at91rm9200-clk-usb";
158 #clock-cells = <0>;
ea4fc621 159 atmel,clk-divisors = <1 2 0 0>;
68580013
AB		 160 clocks = <&pllb>;
161 };
162
163 prog: progck {
164 compatible = "atmel,at91rm9200-clk-programmable";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 interrupt-parent = <&pmc>;
168 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
169
170 prog0: prog0 {
171 #clock-cells = <0>;
172 reg = <0>;
173 interrupts = <AT91_PMC_PCKRDY(0)>;
174 };
175
176 prog1: prog1 {
177 #clock-cells = <0>;
178 reg = <1>;
179 interrupts = <AT91_PMC_PCKRDY(1)>;
180 };
181
182 prog2: prog2 {
183 #clock-cells = <0>;
184 reg = <2>;
185 interrupts = <AT91_PMC_PCKRDY(2)>;
186 };
187
188 prog3: prog3 {
189 #clock-cells = <0>;
190 reg = <3>;
191 interrupts = <AT91_PMC_PCKRDY(3)>;
192 };
193 };
194
195 systemck {
196 compatible = "atmel,at91rm9200-clk-system";
197 #address-cells = <1>;
198 #size-cells = <0>;
199
200 udpck: udpck {
201 #clock-cells = <0>;
202 reg = <2>;
203 clocks = <&usb>;
204 };
205
206 uhpck: uhpck {
207 #clock-cells = <0>;
208 reg = <4>;
209 clocks = <&usb>;
210 };
211
212 pck0: pck0 {
213 #clock-cells = <0>;
214 reg = <8>;
215 clocks = <&prog0>;
216 };
217
218 pck1: pck1 {
219 #clock-cells = <0>;
220 reg = <9>;
221 clocks = <&prog1>;
222 };
223
224 pck2: pck2 {
225 #clock-cells = <0>;
226 reg = <10>;
227 clocks = <&prog2>;
228 };
229
230 pck3: pck3 {
231 #clock-cells = <0>;
232 reg = <11>;
233 clocks = <&prog3>;
234 };
235 };
236
237 periphck {
238 compatible = "atmel,at91rm9200-clk-peripheral";
239 #address-cells = <1>;
240 #size-cells = <0>;
241 clocks = <&mck>;
242
243 pioA_clk: pioA_clk {
244 #clock-cells = <0>;
245 reg = <2>;
246 };
247
248 pioB_clk: pioB_clk {
249 #clock-cells = <0>;
250 reg = <3>;
251 };
252
253 pioC_clk: pioC_clk {
254 #clock-cells = <0>;
255 reg = <4>;
256 };
257
258 pioD_clk: pioD_clk {
259 #clock-cells = <0>;
260 reg = <5>;
261 };
262
263 usart0_clk: usart0_clk {
264 #clock-cells = <0>;
265 reg = <6>;
266 };
267
268 usart1_clk: usart1_clk {
269 #clock-cells = <0>;
270 reg = <7>;
271 };
272
273 usart2_clk: usart2_clk {
274 #clock-cells = <0>;
275 reg = <8>;
276 };
277
278 usart3_clk: usart3_clk {
279 #clock-cells = <0>;
280 reg = <9>;
281 };
282
283 mci0_clk: mci0_clk {
284 #clock-cells = <0>;
285 reg = <10>;
286 };
287
288 udc_clk: udc_clk {
289 #clock-cells = <0>;
290 reg = <11>;
291 };
292
293 twi0_clk: twi0_clk {
294 reg = <12>;
295 #clock-cells = <0>;
296 };
297
298 spi0_clk: spi0_clk {
299 #clock-cells = <0>;
300 reg = <13>;
301 };
302
303 ssc0_clk: ssc0_clk {
304 #clock-cells = <0>;
305 reg = <14>;
306 };
307
308 ssc1_clk: ssc1_clk {
309 #clock-cells = <0>;
310 reg = <15>;
311 };
312
313 ssc2_clk: ssc2_clk {
314 #clock-cells = <0>;
315 reg = <16>;
316 };
317
318 tc0_clk: tc0_clk {
319 #clock-cells = <0>;
320 reg = <17>;
321 };
322
323 tc1_clk: tc1_clk {
324 #clock-cells = <0>;
325 reg = <18>;
326 };
327
328 tc2_clk: tc2_clk {
329 #clock-cells = <0>;
330 reg = <19>;
331 };
332
333 tc3_clk: tc3_clk {
334 #clock-cells = <0>;
335 reg = <20>;
336 };
337
338 tc4_clk: tc4_clk {
339 #clock-cells = <0>;
340 reg = <21>;
341 };
342
343 tc5_clk: tc5_clk {
344 #clock-cells = <0>;
345 reg = <22>;
346 };
347
348 ohci_clk: ohci_clk {
349 #clock-cells = <0>;
350 reg = <23>;
351 };
352
353 macb0_clk: macb0_clk {
354 #clock-cells = <0>;
355 reg = <24>;
356 };
357 };
fe975cf6
JE		 358 };
359
360 st: timer@fffffd00 {
b595809b 361 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
fe975cf6 362 reg = <0xfffffd00 0x100>;
5e8b3bc3 363 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
07e15f21 364 clocks = <&slow_xtal>;
b595809b
AB		 365
366 watchdog {
367 compatible = "atmel,at91rm9200-wdt";
368 };
fe975cf6
JE		 369 };
370
e39f00e5
AB		 371 rtc: rtc@fffffe00 {
372 compatible = "atmel,at91rm9200-rtc";
373 reg = <0xfffffe00 0x40>;
374 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
07e15f21 375 clocks = <&slow_xtal>;
e39f00e5
AB		 376 status = "disabled";
377 };
378
fe975cf6 379 tcb0: timer@fffa0000 {
d26e8297
AB		 380 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
381 #address-cells = <1>;
382 #size-cells = <0>;
fe975cf6 383 reg = <0xfffa0000 0x100>;
5e8b3bc3
JCPV		 384 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
385 18 IRQ_TYPE_LEVEL_HIGH 0
386 19 IRQ_TYPE_LEVEL_HIGH 0>;
07e15f21
AB		 387 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
388 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
fe975cf6
JE		 389 };
390
391 tcb1: timer@fffa4000 {
d26e8297
AB		 392 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
393 #address-cells = <1>;
394 #size-cells = <0>;
fe975cf6 395 reg = <0xfffa4000 0x100>;
5e8b3bc3
JCPV		 396 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
397 21 IRQ_TYPE_LEVEL_HIGH 0
398 22 IRQ_TYPE_LEVEL_HIGH 0>;
07e15f21
AB		 399 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&slow_xtal>;
400 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
fe975cf6
JE		 401 };
402
2d25210d
JE		 403 i2c0: i2c@fffb8000 {
404 compatible = "atmel,at91rm9200-i2c";
405 reg = <0xfffb8000 0x4000>;
5e8b3bc3 406 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
2d25210d
JE		 407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_twi>;
68580013 409 clocks = <&twi0_clk>;
2d25210d
JE		 410 #address-cells = <1>;
411 #size-cells = <0>;
412 status = "disabled";
413 };
414
4e4c963e
JE		 415 mmc0: mmc@fffb4000 {
416 compatible = "atmel,hsmci";
417 reg = <0xfffb4000 0x4000>;
5e8b3bc3 418 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
68580013
AB		 419 clocks = <&mci0_clk>;
420 clock-names = "mci_clk";
4e4c963e
JE		 421 #address-cells = <1>;
422 #size-cells = <0>;
90a69f13 423 pinctrl-names = "default";
4e4c963e
JE		 424 status = "disabled";
425 };
426
883a07f6
JE		 427 ssc0: ssc@fffd0000 {
428 compatible = "atmel,at91rm9200-ssc";
429 reg = <0xfffd0000 0x4000>;
5e8b3bc3 430 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
68580013
AB		 433 clocks = <&ssc0_clk>;
434 clock-names = "pclk";
0db090d5 435 status = "disabled";
883a07f6
JE		 436 };
437
438 ssc1: ssc@fffd4000 {
439 compatible = "atmel,at91rm9200-ssc";
440 reg = <0xfffd4000 0x4000>;
5e8b3bc3 441 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
68580013
AB		 444 clocks = <&ssc1_clk>;
445 clock-names = "pclk";
0db090d5 446 status = "disabled";
883a07f6
JE		 447 };
448
449 ssc2: ssc@fffd8000 {
450 compatible = "atmel,at91rm9200-ssc";
451 reg = <0xfffd8000 0x4000>;
5e8b3bc3 452 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
68580013
AB		 455 clocks = <&ssc2_clk>;
456 clock-names = "pclk";
0db090d5 457 status = "disabled";
883a07f6
JE		 458 };
459
ce3b2630
JE		 460 macb0: ethernet@fffbc000 {
461 compatible = "cdns,at91rm9200-emac", "cdns,emac";
462 reg = <0xfffbc000 0x4000>;
5e8b3bc3 463 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
ce3b2630
JE		 464 phy-mode = "rmii";
465 pinctrl-names = "default";
466 pinctrl-0 = <&pinctrl_macb_rmii>;
68580013
AB		 467 clocks = <&macb0_clk>;
468 clock-names = "ether_clk";
ce3b2630
JE		 469 status = "disabled";
470 };
471
fe975cf6
JE		 472 pinctrl@fffff400 {
473 #address-cells = <1>;
474 #size-cells = <1>;
475 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
476 ranges = <0xfffff400 0xfffff400 0x800>;
477
478 atmel,mux-mask = <
479 /* A B */
480 0xffffffff 0xffffffff /* pioA */
481 0xffffffff 0x083fffff /* pioB */
482 0xffff3fff 0x00000000 /* pioC */
483 0x03ff87ff 0x0fffff80 /* pioD */
484 >;
485
486 /* shared pinctrl settings */
487 dbgu {
488 pinctrl_dbgu: dbgu-0 {
489 atmel,pins =
138c2b2f
SR		 490 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
491 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
fe975cf6
JE		 492 };
493 };
494
495 uart0 {
496 pinctrl_uart0: uart0-0 {
497 atmel,pins =
43d9af3f
PR		 498 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE
499 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
fe975cf6
JE		 500 };
501
5cffba20 502 pinctrl_uart0_cts: uart0_cts-0 {
fe975cf6 503 atmel,pins =
c9d0f317 504 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
fe975cf6
JE		 505 };
506
5cffba20 507 pinctrl_uart0_rts: uart0_rts-0 {
fe975cf6 508 atmel,pins =
c9d0f317 509 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
fe975cf6
JE		 510 };
511 };
512
513 uart1 {
514 pinctrl_uart1: uart1-0 {
515 atmel,pins =
5e04822f
PR		 516 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
517 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
fe975cf6
JE		 518 };
519
520 pinctrl_uart1_rts: uart1_rts-0 {
521 atmel,pins =
c9d0f317 522 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
fe975cf6
JE		 523 };
524
525 pinctrl_uart1_cts: uart1_cts-0 {
526 atmel,pins =
c9d0f317 527 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
fe975cf6
JE		 528 };
529
530 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
531 atmel,pins =
c9d0f317
JCPV		 532 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
533 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
fe975cf6
JE		 534 };
535
536 pinctrl_uart1_dcd: uart1_dcd-0 {
537 atmel,pins =
c9d0f317 538 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
fe975cf6
JE		 539 };
540
541 pinctrl_uart1_ri: uart1_ri-0 {
542 atmel,pins =
c9d0f317 543 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
fe975cf6
JE		 544 };
545 };
546
547 uart2 {
548 pinctrl_uart2: uart2-0 {
549 atmel,pins =
5e04822f
PR		 550 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
551 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
fe975cf6
JE		 552 };
553
554 pinctrl_uart2_rts: uart2_rts-0 {
555 atmel,pins =
c9d0f317 556 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
fe975cf6
JE		 557 };
558
559 pinctrl_uart2_cts: uart2_cts-0 {
560 atmel,pins =
c9d0f317 561 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
fe975cf6
JE		 562 };
563 };
564
565 uart3 {
566 pinctrl_uart3: uart3-0 {
567 atmel,pins =
5e04822f
PR		 568 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
569 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
fe975cf6
JE		 570 };
571
572 pinctrl_uart3_rts: uart3_rts-0 {
573 atmel,pins =
c9d0f317 574 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
fe975cf6
JE		 575 };
576
577 pinctrl_uart3_cts: uart3_cts-0 {
578 atmel,pins =
c9d0f317 579 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
fe975cf6
JE		 580 };
581 };
582
583 nand {
584 pinctrl_nand: nand-0 {
585 atmel,pins =
c9d0f317
JCPV		 586 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
587 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
fe975cf6
JE		 588 };
589 };
590
ce3b2630
JE		 591 macb {
592 pinctrl_macb_rmii: macb_rmii-0 {
593 atmel,pins =
c9d0f317
JCPV		 594 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
595 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
596 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
597 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
598 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
599 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
600 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
601 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
602 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
603 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
ce3b2630
JE		 604 };
605
606 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
607 atmel,pins =
c9d0f317
JCPV		 608 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
609 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
610 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
611 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
612 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
613 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
614 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
615 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
ce3b2630
JE		 616 };
617 };
618
4e4c963e
JE		 619 mmc0 {
620 pinctrl_mmc0_clk: mmc0_clk-0 {
621 atmel,pins =
c9d0f317 622 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
4e4c963e
JE		 623 };
624
625 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
626 atmel,pins =
c9d0f317
JCPV		 627 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
628 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
4e4c963e
JE		 629 };
630
631 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
632 atmel,pins =
c9d0f317
JCPV		 633 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
634 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
635 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
4e4c963e
JE		 636 };
637
638 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
639 atmel,pins =
c9d0f317
JCPV		 640 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
641 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
4e4c963e
JE		 642 };
643
644 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
645 atmel,pins =
c9d0f317
JCPV		 646 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
647 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
648 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
4e4c963e
JE		 649 };
650 };
651
883a07f6
JE		 652 ssc0 {
653 pinctrl_ssc0_tx: ssc0_tx-0 {
654 atmel,pins =
c9d0f317
JCPV		 655 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
656 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
657 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
883a07f6
JE		 658 };
659
660 pinctrl_ssc0_rx: ssc0_rx-0 {
661 atmel,pins =
c9d0f317
JCPV		 662 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
663 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
664 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
883a07f6
JE		 665 };
666 };
667
668 ssc1 {
669 pinctrl_ssc1_tx: ssc1_tx-0 {
670 atmel,pins =
c9d0f317
JCPV		 671 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
672 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
673 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
883a07f6
JE		 674 };
675
676 pinctrl_ssc1_rx: ssc1_rx-0 {
677 atmel,pins =
c9d0f317
JCPV		 678 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
679 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
680 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
883a07f6
JE		 681 };
682 };
683
684 ssc2 {
685 pinctrl_ssc2_tx: ssc2_tx-0 {
686 atmel,pins =
c9d0f317
JCPV		 687 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
688 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
689 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
883a07f6
JE		 690 };
691
692 pinctrl_ssc2_rx: ssc2_rx-0 {
693 atmel,pins =
c9d0f317
JCPV		 694 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
695 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
696 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
883a07f6
JE		 697 };
698 };
699
2d25210d
JE		 700 twi {
701 pinctrl_twi: twi-0 {
702 atmel,pins =
c9d0f317
JCPV		 703 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
704 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
2d25210d 705 };
83960c82
JE		 706
707 pinctrl_twi_gpio: twi_gpio-0 {
708 atmel,pins =
c9d0f317
JCPV		 709 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
710 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
83960c82 711 };
2d25210d
JE		 712 };
713
028633c2
BB		 714 tcb0 {
715 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
716 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
717 };
718
719 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
720 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
721 };
722
723 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
724 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
725 };
726
727 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
728 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
729 };
730
731 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
732 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
733 };
734
735 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
736 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
737 };
738
739 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
740 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
741 };
742
743 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
744 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
745 };
746
747 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
748 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
749 };
750 };
751
752 tcb1 {
753 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
754 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
755 };
756
757 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
758 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
759 };
760
761 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
762 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
763 };
764
765 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
766 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
767 };
768
769 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
770 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
771 };
772
773 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
774 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
775 };
776
777 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
778 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
779 };
780
781 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
782 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
783 };
784
785 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
786 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
787 };
788 };
789
32a86877
JCPV		 790 spi0 {
791 pinctrl_spi0: spi0-0 {
792 atmel,pins =
793 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
794 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
795 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
796 };
797 };
798
fe975cf6
JE		 799 pioA: gpio@fffff400 {
800 compatible = "atmel,at91rm9200-gpio";
801 reg = <0xfffff400 0x200>;
5e8b3bc3 802 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 803 #gpio-cells = <2>;
804 gpio-controller;
805 interrupt-controller;
806 #interrupt-cells = <2>;
68580013 807 clocks = <&pioA_clk>;
fe975cf6
JE		 808 };
809
810 pioB: gpio@fffff600 {
811 compatible = "atmel,at91rm9200-gpio";
812 reg = <0xfffff600 0x200>;
5e8b3bc3 813 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 814 #gpio-cells = <2>;
815 gpio-controller;
816 interrupt-controller;
817 #interrupt-cells = <2>;
68580013 818 clocks = <&pioB_clk>;
fe975cf6
JE		 819 };
820
821 pioC: gpio@fffff800 {
822 compatible = "atmel,at91rm9200-gpio";
823 reg = <0xfffff800 0x200>;
5e8b3bc3 824 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 825 #gpio-cells = <2>;
826 gpio-controller;
827 interrupt-controller;
828 #interrupt-cells = <2>;
68580013 829 clocks = <&pioC_clk>;
fe975cf6
JE		 830 };
831
832 pioD: gpio@fffffa00 {
833 compatible = "atmel,at91rm9200-gpio";
834 reg = <0xfffffa00 0x200>;
5e8b3bc3 835 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 836 #gpio-cells = <2>;
837 gpio-controller;
838 interrupt-controller;
839 #interrupt-cells = <2>;
68580013 840 clocks = <&pioD_clk>;
fe975cf6
JE		 841 };
842 };
843
844 dbgu: serial@fffff200 {
8c07f664 845 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
fe975cf6 846 reg = <0xfffff200 0x200>;
5e8b3bc3 847 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
fe975cf6
JE		 848 pinctrl-names = "default";
849 pinctrl-0 = <&pinctrl_dbgu>;
68580013
AB		 850 clocks = <&mck>;
851 clock-names = "usart";
fe975cf6
JE		 852 status = "disabled";
853 };
854
855 usart0: serial@fffc0000 {
856 compatible = "atmel,at91rm9200-usart";
857 reg = <0xfffc0000 0x200>;
5e8b3bc3 858 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 859 atmel,use-dma-rx;
860 atmel,use-dma-tx;
861 pinctrl-names = "default";
862 pinctrl-0 = <&pinctrl_uart0>;
68580013
AB		 863 clocks = <&usart0_clk>;
864 clock-names = "usart";
fe975cf6
JE		 865 status = "disabled";
866 };
867
868 usart1: serial@fffc4000 {
869 compatible = "atmel,at91rm9200-usart";
870 reg = <0xfffc4000 0x200>;
5e8b3bc3 871 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 872 atmel,use-dma-rx;
873 atmel,use-dma-tx;
874 pinctrl-names = "default";
875 pinctrl-0 = <&pinctrl_uart1>;
68580013
AB		 876 clocks = <&usart1_clk>;
877 clock-names = "usart";
fe975cf6
JE		 878 status = "disabled";
879 };
880
881 usart2: serial@fffc8000 {
882 compatible = "atmel,at91rm9200-usart";
883 reg = <0xfffc8000 0x200>;
5e8b3bc3 884 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 885 atmel,use-dma-rx;
886 atmel,use-dma-tx;
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_uart2>;
68580013
AB		 889 clocks = <&usart2_clk>;
890 clock-names = "usart";
fe975cf6
JE		 891 status = "disabled";
892 };
893
894 usart3: serial@fffcc000 {
895 compatible = "atmel,at91rm9200-usart";
896 reg = <0xfffcc000 0x200>;
5e8b3bc3 897 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 898 atmel,use-dma-rx;
899 atmel,use-dma-tx;
900 pinctrl-names = "default";
901 pinctrl-0 = <&pinctrl_uart3>;
68580013
AB		 902 clocks = <&usart3_clk>;
903 clock-names = "usart";
fe975cf6
JE		 904 status = "disabled";
905 };
906
907 usb1: gadget@fffb0000 {
908 compatible = "atmel,at91rm9200-udc";
909 reg = <0xfffb0000 0x4000>;
5e8b3bc3 910 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
68580013
AB		 911 clocks = <&udc_clk>, <&udpck>;
912 clock-names = "pclk", "hclk";
fe975cf6
JE		 913 status = "disabled";
914 };
32a86877
JCPV		 915
916 spi0: spi@fffe0000 {
917 #address-cells = <1>;
918 #size-cells = <0>;
919 compatible = "atmel,at91rm9200-spi";
920 reg = <0xfffe0000 0x200>;
921 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
922 pinctrl-names = "default";
923 pinctrl-0 = <&pinctrl_spi0>;
68580013
AB		 924 clocks = <&spi0_clk>;
925 clock-names = "spi_clk";
32a86877
JCPV		 926 status = "disabled";
927 };
fe975cf6
JE		 928 };
929
930 nand0: nand@40000000 {
931 compatible = "atmel,at91rm9200-nand";
932 #address-cells = <1>;
933 #size-cells = <1>;
934 reg = <0x40000000 0x10000000>;
935 atmel,nand-addr-offset = <21>;
936 atmel,nand-cmd-offset = <22>;
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_nand>;
939 nand-ecc-mode = "soft";
92f8629b 940 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
fe975cf6 941 0
92f8629b 942 &pioB 1 GPIO_ACTIVE_HIGH
fe975cf6
JE		 943 >;
944 status = "disabled";
945 };
946
8dccafaa 947 usb0: ohci@300000 {
fe975cf6
JE		 948 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
949 reg = <0x00300000 0x100000>;
5e8b3bc3 950 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
f8073708
BB		 951 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
952 clock-names = "ohci_clk", "hclk", "uhpck";
fe975cf6
JE		 953 status = "disabled";
954 };
955 };
956
e152e3f7 957 i2c-gpio-0 {
fe975cf6 958 compatible = "i2c-gpio";
92f8629b
JCPV		 959 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
960 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
fe975cf6
JE		 961 >;
962 i2c-gpio,sda-open-drain;
963 i2c-gpio,scl-open-drain;
964 i2c-gpio,delay-us = <2>; /* ~100 kHz */
83960c82
JE		 965 pinctrl-names = "default";
966 pinctrl-0 = <&pinctrl_twi_gpio>;
fe975cf6
JE		 967 #address-cells = <1>;
968 #size-cells = <0>;
969 status = "disabled";
970 };
971};
Ubuntu Eoan Linux kernel mirror