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5b6089cb JCPV |
1 | /* |
2 | * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC | |
3 | * | |
4 | * Copyright (C) 2011 Atmel, | |
5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, | |
6 | * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
7 | * | |
8 | * Licensed under GPLv2 or later. | |
9 | */ | |
10 | ||
6db64d29 | 11 | #include "skeleton.dtsi" |
c9d0f317 | 12 | #include <dt-bindings/pinctrl/at91.h> |
5e8b3bc3 | 13 | #include <dt-bindings/interrupt-controller/irq.h> |
92f8629b | 14 | #include <dt-bindings/gpio/gpio.h> |
684b8fb5 | 15 | #include <dt-bindings/clock/at91.h> |
5b6089cb JCPV |
16 | |
17 | / { | |
18 | model = "Atmel AT91SAM9260 family SoC"; | |
19 | compatible = "atmel,at91sam9260"; | |
20 | interrupt-parent = <&aic>; | |
21 | ||
22 | aliases { | |
23 | serial0 = &dbgu; | |
24 | serial1 = &usart0; | |
25 | serial2 = &usart1; | |
26 | serial3 = &usart2; | |
27 | serial4 = &usart3; | |
9e3129e9 JCPV |
28 | serial5 = &uart0; |
29 | serial6 = &uart1; | |
5b6089cb JCPV |
30 | gpio0 = &pioA; |
31 | gpio1 = &pioB; | |
32 | gpio2 = &pioC; | |
33 | tcb0 = &tcb0; | |
34 | tcb1 = &tcb1; | |
05dcd361 | 35 | i2c0 = &i2c0; |
099343c6 | 36 | ssc0 = &ssc0; |
5b6089cb JCPV |
37 | }; |
38 | cpus { | |
e757a6ee LP |
39 | #address-cells = <0>; |
40 | #size-cells = <0>; | |
41 | ||
42 | cpu { | |
43 | compatible = "arm,arm926ej-s"; | |
44 | device_type = "cpu"; | |
5b6089cb JCPV |
45 | }; |
46 | }; | |
47 | ||
48 | memory { | |
49 | reg = <0x20000000 0x04000000>; | |
50 | }; | |
51 | ||
684b8fb5 AB |
52 | clocks { |
53 | slow_xtal: slow_xtal { | |
54 | compatible = "fixed-clock"; | |
55 | #clock-cells = <0>; | |
56 | clock-frequency = <0>; | |
57 | }; | |
58 | ||
59 | main_xtal: main_xtal { | |
60 | compatible = "fixed-clock"; | |
61 | #clock-cells = <0>; | |
62 | clock-frequency = <0>; | |
63 | }; | |
64 | ||
65 | adc_op_clk: adc_op_clk{ | |
66 | compatible = "fixed-clock"; | |
67 | #clock-cells = <0>; | |
68 | clock-frequency = <5000000>; | |
69 | }; | |
70 | }; | |
71 | ||
f04660e4 AB |
72 | sram0: sram@002ff000 { |
73 | compatible = "mmio-sram"; | |
74 | reg = <0x002ff000 0x2000>; | |
75 | }; | |
76 | ||
5b6089cb JCPV |
77 | ahb { |
78 | compatible = "simple-bus"; | |
79 | #address-cells = <1>; | |
80 | #size-cells = <1>; | |
81 | ranges; | |
82 | ||
83 | apb { | |
84 | compatible = "simple-bus"; | |
85 | #address-cells = <1>; | |
86 | #size-cells = <1>; | |
87 | ranges; | |
88 | ||
89 | aic: interrupt-controller@fffff000 { | |
f8a073ee | 90 | #interrupt-cells = <3>; |
5b6089cb JCPV |
91 | compatible = "atmel,at91rm9200-aic"; |
92 | interrupt-controller; | |
93 | reg = <0xfffff000 0x200>; | |
c6573943 | 94 | atmel,external-irqs = <29 30 31>; |
5b6089cb JCPV |
95 | }; |
96 | ||
97 | ramc0: ramc@ffffea00 { | |
98 | compatible = "atmel,at91sam9260-sdramc"; | |
99 | reg = <0xffffea00 0x200>; | |
100 | }; | |
101 | ||
102 | pmc: pmc@fffffc00 { | |
684b8fb5 | 103 | compatible = "atmel,at91sam9260-pmc"; |
5b6089cb | 104 | reg = <0xfffffc00 0x100>; |
684b8fb5 AB |
105 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
106 | interrupt-controller; | |
107 | #address-cells = <1>; | |
108 | #size-cells = <0>; | |
109 | #interrupt-cells = <1>; | |
110 | ||
111 | main_osc: main_osc { | |
112 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
113 | #clock-cells = <0>; | |
114 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
115 | clocks = <&main_xtal>; | |
116 | }; | |
117 | ||
118 | main: mainck { | |
119 | compatible = "atmel,at91rm9200-clk-main"; | |
120 | #clock-cells = <0>; | |
121 | clocks = <&main_osc>; | |
122 | }; | |
123 | ||
124 | slow_rc_osc: slow_rc_osc { | |
125 | compatible = "fixed-clock"; | |
126 | #clock-cells = <0>; | |
127 | clock-frequency = <32768>; | |
128 | clock-accuracy = <50000000>; | |
129 | }; | |
130 | ||
131 | clk32k: slck { | |
132 | compatible = "atmel,at91sam9260-clk-slow"; | |
133 | #clock-cells = <0>; | |
134 | clocks = <&slow_rc_osc>, <&slow_xtal>; | |
135 | }; | |
136 | ||
137 | plla: pllack { | |
138 | compatible = "atmel,at91rm9200-clk-pll"; | |
139 | #clock-cells = <0>; | |
140 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
141 | clocks = <&main>; | |
142 | reg = <0>; | |
143 | atmel,clk-input-range = <1000000 32000000>; | |
144 | #atmel,pll-clk-output-range-cells = <4>; | |
145 | atmel,pll-clk-output-ranges = <80000000 160000000 0 1>, | |
146 | <150000000 240000000 2 1>; | |
147 | }; | |
148 | ||
149 | pllb: pllbck { | |
150 | compatible = "atmel,at91rm9200-clk-pll"; | |
151 | #clock-cells = <0>; | |
152 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; | |
153 | clocks = <&main>; | |
154 | reg = <1>; | |
155 | atmel,clk-input-range = <1000000 5000000>; | |
156 | #atmel,pll-clk-output-range-cells = <4>; | |
157 | atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; | |
158 | }; | |
159 | ||
160 | mck: masterck { | |
161 | compatible = "atmel,at91rm9200-clk-master"; | |
162 | #clock-cells = <0>; | |
163 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
164 | clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; | |
165 | atmel,clk-output-range = <0 105000000>; | |
166 | atmel,clk-divisors = <1 2 4 0>; | |
167 | }; | |
168 | ||
169 | usb: usbck { | |
170 | compatible = "atmel,at91rm9200-clk-usb"; | |
171 | #clock-cells = <0>; | |
172 | atmel,clk-divisors = <1 2 4 0>; | |
173 | clocks = <&pllb>; | |
174 | }; | |
175 | ||
176 | prog: progck { | |
177 | compatible = "atmel,at91rm9200-clk-programmable"; | |
178 | #address-cells = <1>; | |
179 | #size-cells = <0>; | |
180 | interrupt-parent = <&pmc>; | |
181 | clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; | |
182 | ||
183 | prog0: prog0 { | |
184 | #clock-cells = <0>; | |
185 | reg = <0>; | |
186 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
187 | }; | |
188 | ||
189 | prog1: prog1 { | |
190 | #clock-cells = <0>; | |
191 | reg = <1>; | |
192 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
193 | }; | |
194 | }; | |
195 | ||
196 | systemck { | |
197 | compatible = "atmel,at91rm9200-clk-system"; | |
198 | #address-cells = <1>; | |
199 | #size-cells = <0>; | |
200 | ||
201 | uhpck: uhpck { | |
202 | #clock-cells = <0>; | |
203 | reg = <6>; | |
204 | clocks = <&usb>; | |
205 | }; | |
206 | ||
207 | udpck: udpck { | |
208 | #clock-cells = <0>; | |
209 | reg = <7>; | |
210 | clocks = <&usb>; | |
211 | }; | |
212 | ||
213 | pck0: pck0 { | |
214 | #clock-cells = <0>; | |
215 | reg = <8>; | |
216 | clocks = <&prog0>; | |
217 | }; | |
218 | ||
219 | pck1: pck1 { | |
220 | #clock-cells = <0>; | |
221 | reg = <9>; | |
222 | clocks = <&prog1>; | |
223 | }; | |
224 | }; | |
225 | ||
226 | periphck { | |
227 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
228 | #address-cells = <1>; | |
229 | #size-cells = <0>; | |
230 | clocks = <&mck>; | |
231 | ||
232 | pioA_clk: pioA_clk { | |
233 | #clock-cells = <0>; | |
234 | reg = <2>; | |
235 | }; | |
236 | ||
237 | pioB_clk: pioB_clk { | |
238 | #clock-cells = <0>; | |
239 | reg = <3>; | |
240 | }; | |
241 | ||
242 | pioC_clk: pioC_clk { | |
243 | #clock-cells = <0>; | |
244 | reg = <4>; | |
245 | }; | |
246 | ||
247 | adc_clk: adc_clk { | |
248 | #clock-cells = <0>; | |
249 | reg = <5>; | |
250 | }; | |
251 | ||
252 | usart0_clk: usart0_clk { | |
253 | #clock-cells = <0>; | |
254 | reg = <6>; | |
255 | }; | |
256 | ||
257 | usart1_clk: usart1_clk { | |
258 | #clock-cells = <0>; | |
259 | reg = <7>; | |
260 | }; | |
261 | ||
262 | usart2_clk: usart2_clk { | |
263 | #clock-cells = <0>; | |
264 | reg = <8>; | |
265 | }; | |
266 | ||
267 | mci0_clk: mci0_clk { | |
268 | #clock-cells = <0>; | |
269 | reg = <9>; | |
270 | }; | |
271 | ||
272 | udc_clk: udc_clk { | |
273 | #clock-cells = <0>; | |
274 | reg = <10>; | |
275 | }; | |
276 | ||
277 | twi0_clk: twi0_clk { | |
278 | reg = <11>; | |
279 | #clock-cells = <0>; | |
280 | }; | |
281 | ||
282 | spi0_clk: spi0_clk { | |
283 | #clock-cells = <0>; | |
284 | reg = <12>; | |
285 | }; | |
286 | ||
287 | spi1_clk: spi1_clk { | |
288 | #clock-cells = <0>; | |
289 | reg = <13>; | |
290 | }; | |
291 | ||
292 | ssc0_clk: ssc0_clk { | |
293 | #clock-cells = <0>; | |
294 | reg = <14>; | |
295 | }; | |
296 | ||
297 | tc0_clk: tc0_clk { | |
298 | #clock-cells = <0>; | |
299 | reg = <17>; | |
300 | }; | |
301 | ||
302 | tc1_clk: tc1_clk { | |
303 | #clock-cells = <0>; | |
304 | reg = <18>; | |
305 | }; | |
306 | ||
307 | tc2_clk: tc2_clk { | |
308 | #clock-cells = <0>; | |
309 | reg = <19>; | |
310 | }; | |
311 | ||
312 | ohci_clk: ohci_clk { | |
313 | #clock-cells = <0>; | |
314 | reg = <20>; | |
315 | }; | |
316 | ||
317 | macb0_clk: macb0_clk { | |
318 | #clock-cells = <0>; | |
319 | reg = <21>; | |
320 | }; | |
321 | ||
322 | isi_clk: isi_clk { | |
323 | #clock-cells = <0>; | |
324 | reg = <22>; | |
325 | }; | |
326 | ||
327 | usart3_clk: usart3_clk { | |
328 | #clock-cells = <0>; | |
329 | reg = <23>; | |
330 | }; | |
331 | ||
332 | uart0_clk: uart0_clk { | |
333 | #clock-cells = <0>; | |
334 | reg = <24>; | |
335 | }; | |
336 | ||
337 | uart1_clk: uart1_clk { | |
338 | #clock-cells = <0>; | |
339 | reg = <25>; | |
340 | }; | |
341 | ||
342 | tc3_clk: tc3_clk { | |
343 | #clock-cells = <0>; | |
344 | reg = <26>; | |
345 | }; | |
346 | ||
347 | tc4_clk: tc4_clk { | |
348 | #clock-cells = <0>; | |
349 | reg = <27>; | |
350 | }; | |
351 | ||
352 | tc5_clk: tc5_clk { | |
353 | #clock-cells = <0>; | |
354 | reg = <28>; | |
355 | }; | |
356 | }; | |
5b6089cb JCPV |
357 | }; |
358 | ||
359 | rstc@fffffd00 { | |
360 | compatible = "atmel,at91sam9260-rstc"; | |
361 | reg = <0xfffffd00 0x10>; | |
362 | }; | |
363 | ||
364 | shdwc@fffffd10 { | |
365 | compatible = "atmel,at91sam9260-shdwc"; | |
366 | reg = <0xfffffd10 0x10>; | |
367 | }; | |
368 | ||
369 | pit: timer@fffffd30 { | |
370 | compatible = "atmel,at91sam9260-pit"; | |
371 | reg = <0xfffffd30 0xf>; | |
5e8b3bc3 | 372 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
684b8fb5 | 373 | clocks = <&mck>; |
5b6089cb JCPV |
374 | }; |
375 | ||
376 | tcb0: timer@fffa0000 { | |
377 | compatible = "atmel,at91rm9200-tcb"; | |
378 | reg = <0xfffa0000 0x100>; | |
5e8b3bc3 JCPV |
379 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 |
380 | 18 IRQ_TYPE_LEVEL_HIGH 0 | |
381 | 19 IRQ_TYPE_LEVEL_HIGH 0>; | |
684b8fb5 AB |
382 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; |
383 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
5b6089cb JCPV |
384 | }; |
385 | ||
386 | tcb1: timer@fffdc000 { | |
387 | compatible = "atmel,at91rm9200-tcb"; | |
388 | reg = <0xfffdc000 0x100>; | |
5e8b3bc3 JCPV |
389 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 |
390 | 27 IRQ_TYPE_LEVEL_HIGH 0 | |
391 | 28 IRQ_TYPE_LEVEL_HIGH 0>; | |
684b8fb5 AB |
392 | clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>; |
393 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
5b6089cb JCPV |
394 | }; |
395 | ||
e4541ff2 JCPV |
396 | pinctrl@fffff400 { |
397 | #address-cells = <1>; | |
398 | #size-cells = <1>; | |
399 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
400 | ranges = <0xfffff400 0xfffff400 0x600>; | |
401 | ||
5314ec8e JCPV |
402 | atmel,mux-mask = < |
403 | /* A B */ | |
404 | 0xffffffff 0xffc00c3b /* pioA */ | |
405 | 0xffffffff 0x7fff3ccf /* pioB */ | |
406 | 0xffffffff 0x007fffff /* pioC */ | |
407 | >; | |
408 | ||
409 | /* shared pinctrl settings */ | |
ec6754a7 JCPV |
410 | dbgu { |
411 | pinctrl_dbgu: dbgu-0 { | |
412 | atmel,pins = | |
c9d0f317 JCPV |
413 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ |
414 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ | |
ec6754a7 JCPV |
415 | }; |
416 | }; | |
417 | ||
9e3129e9 JCPV |
418 | usart0 { |
419 | pinctrl_usart0: usart0-0 { | |
ec6754a7 | 420 | atmel,pins = |
c9d0f317 JCPV |
421 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
422 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ | |
ec6754a7 JCPV |
423 | }; |
424 | ||
c58c0c5a | 425 | pinctrl_usart0_rts: usart0_rts-0 { |
ec6754a7 | 426 | atmel,pins = |
c9d0f317 | 427 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ |
c58c0c5a JCPV |
428 | }; |
429 | ||
430 | pinctrl_usart0_cts: usart0_cts-0 { | |
431 | atmel,pins = | |
c9d0f317 | 432 | <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ |
ec6754a7 JCPV |
433 | }; |
434 | ||
9e3129e9 | 435 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
ec6754a7 | 436 | atmel,pins = |
c9d0f317 JCPV |
437 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ |
438 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ | |
ec6754a7 JCPV |
439 | }; |
440 | ||
9e3129e9 | 441 | pinctrl_usart0_dcd: usart0_dcd-0 { |
ec6754a7 | 442 | atmel,pins = |
c9d0f317 | 443 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ |
ec6754a7 JCPV |
444 | }; |
445 | ||
9e3129e9 | 446 | pinctrl_usart0_ri: usart0_ri-0 { |
ec6754a7 | 447 | atmel,pins = |
c9d0f317 | 448 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ |
ec6754a7 JCPV |
449 | }; |
450 | }; | |
451 | ||
9e3129e9 JCPV |
452 | usart1 { |
453 | pinctrl_usart1: usart1-0 { | |
ec6754a7 | 454 | atmel,pins = |
c9d0f317 JCPV |
455 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
456 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ | |
ec6754a7 JCPV |
457 | }; |
458 | ||
c58c0c5a JCPV |
459 | pinctrl_usart1_rts: usart1_rts-0 { |
460 | atmel,pins = | |
c9d0f317 | 461 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ |
c58c0c5a JCPV |
462 | }; |
463 | ||
464 | pinctrl_usart1_cts: usart1_cts-0 { | |
ec6754a7 | 465 | atmel,pins = |
c9d0f317 | 466 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ |
ec6754a7 JCPV |
467 | }; |
468 | }; | |
469 | ||
9e3129e9 JCPV |
470 | usart2 { |
471 | pinctrl_usart2: usart2-0 { | |
ec6754a7 | 472 | atmel,pins = |
c9d0f317 JCPV |
473 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ |
474 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ | |
ec6754a7 JCPV |
475 | }; |
476 | ||
c58c0c5a | 477 | pinctrl_usart2_rts: usart2_rts-0 { |
ec6754a7 | 478 | atmel,pins = |
c9d0f317 | 479 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
c58c0c5a JCPV |
480 | }; |
481 | ||
482 | pinctrl_usart2_cts: usart2_cts-0 { | |
483 | atmel,pins = | |
c9d0f317 | 484 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ |
ec6754a7 JCPV |
485 | }; |
486 | }; | |
487 | ||
9e3129e9 JCPV |
488 | usart3 { |
489 | pinctrl_usart3: usart3-0 { | |
ec6754a7 | 490 | atmel,pins = |
c9d0f317 JCPV |
491 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ |
492 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ | |
ec6754a7 JCPV |
493 | }; |
494 | ||
c58c0c5a JCPV |
495 | pinctrl_usart3_rts: usart3_rts-0 { |
496 | atmel,pins = | |
a009d692 | 497 | <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
c58c0c5a JCPV |
498 | }; |
499 | ||
500 | pinctrl_usart3_cts: usart3_cts-0 { | |
ec6754a7 | 501 | atmel,pins = |
a009d692 | 502 | <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; |
ec6754a7 JCPV |
503 | }; |
504 | }; | |
505 | ||
9e3129e9 JCPV |
506 | uart0 { |
507 | pinctrl_uart0: uart0-0 { | |
ec6754a7 | 508 | atmel,pins = |
c9d0f317 JCPV |
509 | <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ |
510 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ | |
ec6754a7 JCPV |
511 | }; |
512 | }; | |
513 | ||
9e3129e9 JCPV |
514 | uart1 { |
515 | pinctrl_uart1: uart1-0 { | |
ec6754a7 | 516 | atmel,pins = |
c9d0f317 JCPV |
517 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ |
518 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ | |
ec6754a7 JCPV |
519 | }; |
520 | }; | |
5314ec8e | 521 | |
7a38d450 JCPV |
522 | nand { |
523 | pinctrl_nand: nand-0 { | |
524 | atmel,pins = | |
c9d0f317 JCPV |
525 | <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ |
526 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ | |
7a38d450 JCPV |
527 | }; |
528 | }; | |
529 | ||
d9b4fe83 JCPV |
530 | macb { |
531 | pinctrl_macb_rmii: macb_rmii-0 { | |
532 | atmel,pins = | |
c9d0f317 JCPV |
533 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ |
534 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ | |
535 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ | |
536 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ | |
537 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ | |
538 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ | |
539 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ | |
540 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ | |
541 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ | |
542 | AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ | |
d9b4fe83 JCPV |
543 | }; |
544 | ||
545 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | |
546 | atmel,pins = | |
c9d0f317 JCPV |
547 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
548 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ | |
549 | AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ | |
550 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ | |
551 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ | |
552 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ | |
553 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
554 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ | |
d9b4fe83 JCPV |
555 | }; |
556 | ||
557 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { | |
558 | atmel,pins = | |
c9d0f317 JCPV |
559 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ |
560 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ | |
fc20c6ff | 561 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
c9d0f317 JCPV |
562 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
563 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ | |
564 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ | |
565 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
566 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ | |
d9b4fe83 JCPV |
567 | }; |
568 | }; | |
569 | ||
d4fe9ac7 JCPV |
570 | mmc0 { |
571 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
572 | atmel,pins = | |
c9d0f317 | 573 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
d4fe9ac7 JCPV |
574 | }; |
575 | ||
576 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
577 | atmel,pins = | |
c9d0f317 JCPV |
578 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
579 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ | |
d4fe9ac7 JCPV |
580 | }; |
581 | ||
582 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
583 | atmel,pins = | |
c9d0f317 JCPV |
584 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
585 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ | |
586 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ | |
d4fe9ac7 JCPV |
587 | }; |
588 | ||
589 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { | |
590 | atmel,pins = | |
c9d0f317 JCPV |
591 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ |
592 | AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ | |
d4fe9ac7 JCPV |
593 | }; |
594 | ||
595 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { | |
596 | atmel,pins = | |
c9d0f317 JCPV |
597 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ |
598 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ | |
599 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ | |
d4fe9ac7 JCPV |
600 | }; |
601 | }; | |
602 | ||
544ae6b2 BS |
603 | ssc0 { |
604 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
605 | atmel,pins = | |
c9d0f317 JCPV |
606 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
607 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ | |
608 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ | |
544ae6b2 BS |
609 | }; |
610 | ||
611 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
612 | atmel,pins = | |
c9d0f317 JCPV |
613 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ |
614 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ | |
615 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ | |
544ae6b2 BS |
616 | }; |
617 | }; | |
618 | ||
a68b728f WY |
619 | spi0 { |
620 | pinctrl_spi0: spi0-0 { | |
621 | atmel,pins = | |
c9d0f317 JCPV |
622 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ |
623 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ | |
624 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ | |
a68b728f WY |
625 | }; |
626 | }; | |
627 | ||
628 | spi1 { | |
629 | pinctrl_spi1: spi1-0 { | |
630 | atmel,pins = | |
c9d0f317 JCPV |
631 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ |
632 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ | |
633 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ | |
a68b728f WY |
634 | }; |
635 | }; | |
636 | ||
f89ae61b JCPV |
637 | i2c_gpio0 { |
638 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
639 | atmel,pins = | |
640 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE | |
641 | AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
642 | }; | |
643 | }; | |
644 | ||
028633c2 BB |
645 | tcb0 { |
646 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
647 | atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
648 | }; | |
649 | ||
650 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
651 | atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
652 | }; | |
653 | ||
654 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
655 | atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
656 | }; | |
657 | ||
658 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
659 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
660 | }; | |
661 | ||
662 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
663 | atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
664 | }; | |
665 | ||
666 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
667 | atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
668 | }; | |
669 | ||
670 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
671 | atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
672 | }; | |
673 | ||
674 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
675 | atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
676 | }; | |
677 | ||
678 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
679 | atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
680 | }; | |
681 | }; | |
682 | ||
683 | tcb1 { | |
684 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | |
685 | atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
686 | }; | |
687 | ||
688 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | |
689 | atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
690 | }; | |
691 | ||
692 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | |
693 | atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
694 | }; | |
695 | ||
696 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | |
697 | atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
698 | }; | |
699 | ||
700 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | |
701 | atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
702 | }; | |
703 | ||
704 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | |
705 | atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
706 | }; | |
707 | ||
708 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | |
709 | atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
710 | }; | |
711 | ||
712 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | |
713 | atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
714 | }; | |
715 | ||
716 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | |
717 | atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
a68b728f WY |
718 | }; |
719 | }; | |
720 | ||
e4541ff2 JCPV |
721 | pioA: gpio@fffff400 { |
722 | compatible = "atmel,at91rm9200-gpio"; | |
723 | reg = <0xfffff400 0x200>; | |
5e8b3bc3 | 724 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
725 | #gpio-cells = <2>; |
726 | gpio-controller; | |
727 | interrupt-controller; | |
728 | #interrupt-cells = <2>; | |
684b8fb5 | 729 | clocks = <&pioA_clk>; |
e4541ff2 JCPV |
730 | }; |
731 | ||
732 | pioB: gpio@fffff600 { | |
733 | compatible = "atmel,at91rm9200-gpio"; | |
734 | reg = <0xfffff600 0x200>; | |
5e8b3bc3 | 735 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
736 | #gpio-cells = <2>; |
737 | gpio-controller; | |
738 | interrupt-controller; | |
739 | #interrupt-cells = <2>; | |
684b8fb5 | 740 | clocks = <&pioB_clk>; |
e4541ff2 JCPV |
741 | }; |
742 | ||
743 | pioC: gpio@fffff800 { | |
744 | compatible = "atmel,at91rm9200-gpio"; | |
745 | reg = <0xfffff800 0x200>; | |
5e8b3bc3 | 746 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
747 | #gpio-cells = <2>; |
748 | gpio-controller; | |
749 | interrupt-controller; | |
750 | #interrupt-cells = <2>; | |
684b8fb5 | 751 | clocks = <&pioC_clk>; |
e4541ff2 | 752 | }; |
5b6089cb JCPV |
753 | }; |
754 | ||
755 | dbgu: serial@fffff200 { | |
8c07f664 | 756 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
5b6089cb | 757 | reg = <0xfffff200 0x200>; |
5e8b3bc3 | 758 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
ec6754a7 JCPV |
759 | pinctrl-names = "default"; |
760 | pinctrl-0 = <&pinctrl_dbgu>; | |
684b8fb5 AB |
761 | clocks = <&mck>; |
762 | clock-names = "usart"; | |
5b6089cb JCPV |
763 | status = "disabled"; |
764 | }; | |
765 | ||
766 | usart0: serial@fffb0000 { | |
767 | compatible = "atmel,at91sam9260-usart"; | |
768 | reg = <0xfffb0000 0x200>; | |
5e8b3bc3 | 769 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
770 | atmel,use-dma-rx; |
771 | atmel,use-dma-tx; | |
ec6754a7 | 772 | pinctrl-names = "default"; |
9e3129e9 | 773 | pinctrl-0 = <&pinctrl_usart0>; |
684b8fb5 AB |
774 | clocks = <&usart0_clk>; |
775 | clock-names = "usart"; | |
5b6089cb JCPV |
776 | status = "disabled"; |
777 | }; | |
778 | ||
779 | usart1: serial@fffb4000 { | |
780 | compatible = "atmel,at91sam9260-usart"; | |
781 | reg = <0xfffb4000 0x200>; | |
5e8b3bc3 | 782 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
783 | atmel,use-dma-rx; |
784 | atmel,use-dma-tx; | |
ec6754a7 | 785 | pinctrl-names = "default"; |
9e3129e9 | 786 | pinctrl-0 = <&pinctrl_usart1>; |
684b8fb5 AB |
787 | clocks = <&usart1_clk>; |
788 | clock-names = "usart"; | |
5b6089cb JCPV |
789 | status = "disabled"; |
790 | }; | |
791 | ||
792 | usart2: serial@fffb8000 { | |
793 | compatible = "atmel,at91sam9260-usart"; | |
794 | reg = <0xfffb8000 0x200>; | |
5e8b3bc3 | 795 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
796 | atmel,use-dma-rx; |
797 | atmel,use-dma-tx; | |
ec6754a7 | 798 | pinctrl-names = "default"; |
9e3129e9 | 799 | pinctrl-0 = <&pinctrl_usart2>; |
684b8fb5 AB |
800 | clocks = <&usart2_clk>; |
801 | clock-names = "usart"; | |
5b6089cb JCPV |
802 | status = "disabled"; |
803 | }; | |
804 | ||
805 | usart3: serial@fffd0000 { | |
806 | compatible = "atmel,at91sam9260-usart"; | |
807 | reg = <0xfffd0000 0x200>; | |
5e8b3bc3 | 808 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
809 | atmel,use-dma-rx; |
810 | atmel,use-dma-tx; | |
ec6754a7 | 811 | pinctrl-names = "default"; |
9e3129e9 | 812 | pinctrl-0 = <&pinctrl_usart3>; |
684b8fb5 AB |
813 | clocks = <&usart3_clk>; |
814 | clock-names = "usart"; | |
5b6089cb JCPV |
815 | status = "disabled"; |
816 | }; | |
817 | ||
9e3129e9 | 818 | uart0: serial@fffd4000 { |
5b6089cb JCPV |
819 | compatible = "atmel,at91sam9260-usart"; |
820 | reg = <0xfffd4000 0x200>; | |
5e8b3bc3 | 821 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
822 | atmel,use-dma-rx; |
823 | atmel,use-dma-tx; | |
ec6754a7 | 824 | pinctrl-names = "default"; |
9e3129e9 | 825 | pinctrl-0 = <&pinctrl_uart0>; |
684b8fb5 AB |
826 | clocks = <&uart0_clk>; |
827 | clock-names = "usart"; | |
5b6089cb JCPV |
828 | status = "disabled"; |
829 | }; | |
830 | ||
9e3129e9 | 831 | uart1: serial@fffd8000 { |
5b6089cb JCPV |
832 | compatible = "atmel,at91sam9260-usart"; |
833 | reg = <0xfffd8000 0x200>; | |
5e8b3bc3 | 834 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; |
5b6089cb JCPV |
835 | atmel,use-dma-rx; |
836 | atmel,use-dma-tx; | |
ec6754a7 | 837 | pinctrl-names = "default"; |
9e3129e9 | 838 | pinctrl-0 = <&pinctrl_uart1>; |
684b8fb5 AB |
839 | clocks = <&uart1_clk>; |
840 | clock-names = "usart"; | |
5b6089cb JCPV |
841 | status = "disabled"; |
842 | }; | |
843 | ||
844 | macb0: ethernet@fffc4000 { | |
9c348d45 | 845 | compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
5b6089cb | 846 | reg = <0xfffc4000 0x100>; |
5e8b3bc3 | 847 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; |
d9b4fe83 JCPV |
848 | pinctrl-names = "default"; |
849 | pinctrl-0 = <&pinctrl_macb_rmii>; | |
684b8fb5 AB |
850 | clocks = <&macb0_clk>, <&macb0_clk>; |
851 | clock-names = "hclk", "pclk"; | |
5b6089cb JCPV |
852 | status = "disabled"; |
853 | }; | |
854 | ||
855 | usb1: gadget@fffa4000 { | |
70a9beaa | 856 | compatible = "atmel,at91sam9260-udc"; |
5b6089cb | 857 | reg = <0xfffa4000 0x4000>; |
5e8b3bc3 | 858 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; |
684b8fb5 AB |
859 | clocks = <&udc_clk>, <&udpck>; |
860 | clock-names = "pclk", "hclk"; | |
5b6089cb JCPV |
861 | status = "disabled"; |
862 | }; | |
73d68d91 | 863 | |
05dcd361 LD |
864 | i2c0: i2c@fffac000 { |
865 | compatible = "atmel,at91sam9260-i2c"; | |
866 | reg = <0xfffac000 0x100>; | |
5e8b3bc3 | 867 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
05dcd361 LD |
868 | #address-cells = <1>; |
869 | #size-cells = <0>; | |
684b8fb5 | 870 | clocks = <&twi0_clk>; |
05dcd361 LD |
871 | status = "disabled"; |
872 | }; | |
873 | ||
9873137a LD |
874 | mmc0: mmc@fffa8000 { |
875 | compatible = "atmel,hsmci"; | |
876 | reg = <0xfffa8000 0x600>; | |
5e8b3bc3 | 877 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; |
9873137a LD |
878 | #address-cells = <1>; |
879 | #size-cells = <0>; | |
6e19c94d | 880 | pinctrl-names = "default"; |
684b8fb5 AB |
881 | clocks = <&mci0_clk>; |
882 | clock-names = "mci_clk"; | |
9873137a LD |
883 | status = "disabled"; |
884 | }; | |
885 | ||
099343c6 BS |
886 | ssc0: ssc@fffbc000 { |
887 | compatible = "atmel,at91rm9200-ssc"; | |
888 | reg = <0xfffbc000 0x4000>; | |
5e8b3bc3 | 889 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; |
544ae6b2 BS |
890 | pinctrl-names = "default"; |
891 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
684b8fb5 AB |
892 | clocks = <&ssc0_clk>; |
893 | clock-names = "pclk"; | |
046e7d68 | 894 | status = "disabled"; |
099343c6 BS |
895 | }; |
896 | ||
d50f88a0 RG |
897 | spi0: spi@fffc8000 { |
898 | #address-cells = <1>; | |
899 | #size-cells = <0>; | |
900 | compatible = "atmel,at91rm9200-spi"; | |
901 | reg = <0xfffc8000 0x200>; | |
5e8b3bc3 | 902 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; |
a68b728f WY |
903 | pinctrl-names = "default"; |
904 | pinctrl-0 = <&pinctrl_spi0>; | |
684b8fb5 AB |
905 | clocks = <&spi0_clk>; |
906 | clock-names = "spi_clk"; | |
d50f88a0 RG |
907 | status = "disabled"; |
908 | }; | |
909 | ||
910 | spi1: spi@fffcc000 { | |
911 | #address-cells = <1>; | |
912 | #size-cells = <0>; | |
913 | compatible = "atmel,at91rm9200-spi"; | |
914 | reg = <0xfffcc000 0x200>; | |
5e8b3bc3 | 915 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
a68b728f WY |
916 | pinctrl-names = "default"; |
917 | pinctrl-0 = <&pinctrl_spi1>; | |
684b8fb5 AB |
918 | clocks = <&spi1_clk>; |
919 | clock-names = "spi_clk"; | |
d50f88a0 RG |
920 | status = "disabled"; |
921 | }; | |
922 | ||
73d68d91 | 923 | adc0: adc@fffe0000 { |
e568d698 AB |
924 | #address-cells = <1>; |
925 | #size-cells = <0>; | |
73d68d91 NF |
926 | compatible = "atmel,at91sam9260-adc"; |
927 | reg = <0xfffe0000 0x100>; | |
5e8b3bc3 | 928 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; |
684b8fb5 AB |
929 | clocks = <&adc_clk>, <&adc_op_clk>; |
930 | clock-names = "adc_clk", "adc_op_clk"; | |
73d68d91 NF |
931 | atmel,adc-use-external-triggers; |
932 | atmel,adc-channels-used = <0xf>; | |
933 | atmel,adc-vref = <3300>; | |
73d68d91 | 934 | atmel,adc-startup-time = <15>; |
4b50da65 LD |
935 | atmel,adc-res = <8 10>; |
936 | atmel,adc-res-names = "lowres", "highres"; | |
937 | atmel,adc-use-res = "highres"; | |
73d68d91 NF |
938 | |
939 | trigger@0 { | |
e568d698 | 940 | reg = <0>; |
73d68d91 NF |
941 | trigger-name = "timer-counter-0"; |
942 | trigger-value = <0x1>; | |
943 | }; | |
944 | trigger@1 { | |
e568d698 | 945 | reg = <1>; |
73d68d91 NF |
946 | trigger-name = "timer-counter-1"; |
947 | trigger-value = <0x3>; | |
948 | }; | |
949 | ||
950 | trigger@2 { | |
e568d698 | 951 | reg = <2>; |
73d68d91 NF |
952 | trigger-name = "timer-counter-2"; |
953 | trigger-value = <0x5>; | |
954 | }; | |
955 | ||
956 | trigger@3 { | |
e568d698 | 957 | reg = <3>; |
73d68d91 | 958 | trigger-name = "external"; |
c1ff0b47 | 959 | trigger-value = <0xd>; |
73d68d91 NF |
960 | trigger-external; |
961 | }; | |
962 | }; | |
7492e7ca | 963 | |
9b5a0675 BB |
964 | rtc@fffffd20 { |
965 | compatible = "atmel,at91sam9260-rtt"; | |
966 | reg = <0xfffffd20 0x10>; | |
967 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
968 | clocks = <&clk32k>; | |
969 | status = "disabled"; | |
970 | }; | |
971 | ||
7492e7ca FP |
972 | watchdog@fffffd40 { |
973 | compatible = "atmel,at91sam9260-wdt"; | |
974 | reg = <0xfffffd40 0x10>; | |
fe46aa67 BB |
975 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
976 | atmel,watchdog-type = "hardware"; | |
977 | atmel,reset-type = "all"; | |
978 | atmel,dbg-halt; | |
7492e7ca FP |
979 | status = "disabled"; |
980 | }; | |
1ff3beca BB |
981 | |
982 | gpbr: syscon@fffffd50 { | |
983 | compatible = "atmel,at91sam9260-gpbr", "syscon"; | |
984 | reg = <0xfffffd50 0x10>; | |
985 | status = "disabled"; | |
986 | }; | |
5b6089cb JCPV |
987 | }; |
988 | ||
989 | nand0: nand@40000000 { | |
990 | compatible = "atmel,at91rm9200-nand"; | |
991 | #address-cells = <1>; | |
992 | #size-cells = <1>; | |
993 | reg = <0x40000000 0x10000000 | |
994 | 0xffffe800 0x200 | |
995 | >; | |
996 | atmel,nand-addr-offset = <21>; | |
997 | atmel,nand-cmd-offset = <22>; | |
7a38d450 JCPV |
998 | pinctrl-names = "default"; |
999 | pinctrl-0 = <&pinctrl_nand>; | |
92f8629b JCPV |
1000 | gpios = <&pioC 13 GPIO_ACTIVE_HIGH |
1001 | &pioC 14 GPIO_ACTIVE_HIGH | |
5b6089cb JCPV |
1002 | 0 |
1003 | >; | |
1004 | status = "disabled"; | |
1005 | }; | |
1006 | ||
1007 | usb0: ohci@00500000 { | |
1008 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
1009 | reg = <0x00500000 0x100000>; | |
5e8b3bc3 | 1010 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; |
f8073708 BB |
1011 | clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; |
1012 | clock-names = "ohci_clk", "hclk", "uhpck"; | |
5b6089cb JCPV |
1013 | status = "disabled"; |
1014 | }; | |
1015 | }; | |
1016 | ||
1017 | i2c@0 { | |
1018 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
1019 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ |
1020 | &pioA 24 GPIO_ACTIVE_HIGH /* scl */ | |
5b6089cb JCPV |
1021 | >; |
1022 | i2c-gpio,sda-open-drain; | |
1023 | i2c-gpio,scl-open-drain; | |
1024 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1025 | #address-cells = <1>; | |
1026 | #size-cells = <0>; | |
f89ae61b JCPV |
1027 | pinctrl-names = "default"; |
1028 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
5b6089cb JCPV |
1029 | status = "disabled"; |
1030 | }; | |
1031 | }; |