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5b6089cb
JCPV
1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9260 family SoC";
15 compatible = "atmel,at91sam9260";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
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24 serial5 = &uart0;
25 serial6 = &uart1;
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26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
05dcd361 31 i2c0 = &i2c0;
099343c6 32 ssc0 = &ssc0;
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33 };
34 cpus {
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LP
35 #address-cells = <0>;
36 #size-cells = <0>;
37
38 cpu {
39 compatible = "arm,arm926ej-s";
40 device_type = "cpu";
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41 };
42 };
43
44 memory {
45 reg = <0x20000000 0x04000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 apb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 aic: interrupt-controller@fffff000 {
f8a073ee 61 #interrupt-cells = <3>;
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62 compatible = "atmel,at91rm9200-aic";
63 interrupt-controller;
64 reg = <0xfffff000 0x200>;
c6573943 65 atmel,external-irqs = <29 30 31>;
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66 };
67
68 ramc0: ramc@ffffea00 {
69 compatible = "atmel,at91sam9260-sdramc";
70 reg = <0xffffea00 0x200>;
71 };
72
73 pmc: pmc@fffffc00 {
74 compatible = "atmel,at91rm9200-pmc";
75 reg = <0xfffffc00 0x100>;
76 };
77
78 rstc@fffffd00 {
79 compatible = "atmel,at91sam9260-rstc";
80 reg = <0xfffffd00 0x10>;
81 };
82
83 shdwc@fffffd10 {
84 compatible = "atmel,at91sam9260-shdwc";
85 reg = <0xfffffd10 0x10>;
86 };
87
88 pit: timer@fffffd30 {
89 compatible = "atmel,at91sam9260-pit";
90 reg = <0xfffffd30 0xf>;
f8a073ee 91 interrupts = <1 4 7>;
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92 };
93
94 tcb0: timer@fffa0000 {
95 compatible = "atmel,at91rm9200-tcb";
96 reg = <0xfffa0000 0x100>;
f8a073ee 97 interrupts = <17 4 0 18 4 0 19 4 0>;
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JCPV
98 };
99
100 tcb1: timer@fffdc000 {
101 compatible = "atmel,at91rm9200-tcb";
102 reg = <0xfffdc000 0x100>;
f8a073ee 103 interrupts = <26 4 0 27 4 0 28 4 0>;
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104 };
105
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106 pinctrl@fffff400 {
107 #address-cells = <1>;
108 #size-cells = <1>;
109 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
110 ranges = <0xfffff400 0xfffff400 0x600>;
111
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112 atmel,mux-mask = <
113 /* A B */
114 0xffffffff 0xffc00c3b /* pioA */
115 0xffffffff 0x7fff3ccf /* pioB */
116 0xffffffff 0x007fffff /* pioC */
117 >;
118
119 /* shared pinctrl settings */
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120 dbgu {
121 pinctrl_dbgu: dbgu-0 {
122 atmel,pins =
123 <1 14 0x1 0x0 /* PB14 periph A */
124 1 15 0x1 0x1>; /* PB15 periph with pullup */
125 };
126 };
127
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128 usart0 {
129 pinctrl_usart0: usart0-0 {
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130 atmel,pins =
131 <1 4 0x1 0x0 /* PB4 periph A */
132 1 5 0x1 0x0>; /* PB5 periph A */
133 };
134
c58c0c5a 135 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 136 atmel,pins =
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137 <1 26 0x1 0x0>; /* PB26 periph A */
138 };
139
140 pinctrl_usart0_cts: usart0_cts-0 {
141 atmel,pins =
142 <1 27 0x1 0x0>; /* PB27 periph A */
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143 };
144
9e3129e9 145 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
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146 atmel,pins =
147 <1 24 0x1 0x0 /* PB24 periph A */
148 1 22 0x1 0x0>; /* PB22 periph A */
149 };
150
9e3129e9 151 pinctrl_usart0_dcd: usart0_dcd-0 {
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152 atmel,pins =
153 <1 23 0x1 0x0>; /* PB23 periph A */
154 };
155
9e3129e9 156 pinctrl_usart0_ri: usart0_ri-0 {
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157 atmel,pins =
158 <1 25 0x1 0x0>; /* PB25 periph A */
159 };
160 };
161
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162 usart1 {
163 pinctrl_usart1: usart1-0 {
ec6754a7 164 atmel,pins =
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DG
165 <1 6 0x1 0x1 /* PB6 periph A with pullup */
166 1 7 0x1 0x0>; /* PB7 periph A */
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167 };
168
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169 pinctrl_usart1_rts: usart1_rts-0 {
170 atmel,pins =
171 <1 28 0x1 0x0>; /* PB28 periph A */
172 };
173
174 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 175 atmel,pins =
c58c0c5a 176 <1 29 0x1 0x0>; /* PB29 periph A */
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177 };
178 };
179
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180 usart2 {
181 pinctrl_usart2: usart2-0 {
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182 atmel,pins =
183 <1 8 0x1 0x1 /* PB8 periph A with pullup */
184 1 9 0x1 0x0>; /* PB9 periph A */
185 };
186
c58c0c5a 187 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 188 atmel,pins =
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189 <0 4 0x1 0x0>; /* PA4 periph A */
190 };
191
192 pinctrl_usart2_cts: usart2_cts-0 {
193 atmel,pins =
194 <0 5 0x1 0x0>; /* PA5 periph A */
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195 };
196 };
197
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198 usart3 {
199 pinctrl_usart3: usart3-0 {
ec6754a7 200 atmel,pins =
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201 <1 10 0x1 0x1 /* PB10 periph A with pullup */
202 1 11 0x1 0x0>; /* PB11 periph A */
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203 };
204
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205 pinctrl_usart3_rts: usart3_rts-0 {
206 atmel,pins =
f10491ff 207 <2 8 0x2 0x0>; /* PC8 periph B */
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208 };
209
210 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 211 atmel,pins =
f10491ff 212 <2 10 0x2 0x0>; /* PC10 periph B */
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213 };
214 };
215
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216 uart0 {
217 pinctrl_uart0: uart0-0 {
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218 atmel,pins =
219 <0 31 0x2 0x1 /* PA31 periph B with pullup */
220 0 30 0x2 0x0>; /* PA30 periph B */
221 };
222 };
223
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224 uart1 {
225 pinctrl_uart1: uart1-0 {
ec6754a7 226 atmel,pins =
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DG
227 <1 12 0x1 0x1 /* PB12 periph A with pullup */
228 1 13 0x1 0x0>; /* PB13 periph A */
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229 };
230 };
5314ec8e 231
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232 nand {
233 pinctrl_nand: nand-0 {
234 atmel,pins =
235 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
236 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
237 };
238 };
239
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240 macb {
241 pinctrl_macb_rmii: macb_rmii-0 {
242 atmel,pins =
243 <0 12 0x1 0x0 /* PA12 periph A */
244 0 13 0x1 0x0 /* PA13 periph A */
245 0 14 0x1 0x0 /* PA14 periph A */
246 0 15 0x1 0x0 /* PA15 periph A */
247 0 16 0x1 0x0 /* PA16 periph A */
248 0 17 0x1 0x0 /* PA17 periph A */
249 0 18 0x1 0x0 /* PA18 periph A */
250 0 19 0x1 0x0 /* PA19 periph A */
251 0 20 0x1 0x0 /* PA20 periph A */
252 0 21 0x1 0x0>; /* PA21 periph A */
253 };
254
255 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
256 atmel,pins =
257 <0 22 0x2 0x0 /* PA22 periph B */
258 0 23 0x2 0x0 /* PA23 periph B */
259 0 24 0x2 0x0 /* PA24 periph B */
260 0 25 0x2 0x0 /* PA25 periph B */
261 0 26 0x2 0x0 /* PA26 periph B */
262 0 27 0x2 0x0 /* PA27 periph B */
263 0 28 0x2 0x0 /* PA28 periph B */
264 0 29 0x2 0x0>; /* PA29 periph B */
265 };
266
267 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
268 atmel,pins =
269 <0 10 0x2 0x0 /* PA10 periph B */
270 0 11 0x2 0x0 /* PA11 periph B */
271 0 24 0x2 0x0 /* PA24 periph B */
272 0 25 0x2 0x0 /* PA25 periph B */
273 0 26 0x2 0x0 /* PA26 periph B */
274 0 27 0x2 0x0 /* PA27 periph B */
275 0 28 0x2 0x0 /* PA28 periph B */
276 0 29 0x2 0x0>; /* PA29 periph B */
277 };
278 };
279
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280 mmc0 {
281 pinctrl_mmc0_clk: mmc0_clk-0 {
282 atmel,pins =
283 <0 8 0x1 0x0>; /* PA8 periph A */
284 };
285
286 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
287 atmel,pins =
288 <0 7 0x1 0x1 /* PA7 periph A with pullup */
289 0 6 0x1 0x1>; /* PA6 periph A with pullup */
290 };
291
292 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
293 atmel,pins =
294 <0 9 0x1 0x1 /* PA9 periph A with pullup */
295 0 10 0x1 0x1 /* PA10 periph A with pullup */
296 0 11 0x1 0x1>; /* PA11 periph A with pullup */
297 };
298
299 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
300 atmel,pins =
301 <0 1 0x2 0x1 /* PA1 periph B with pullup */
302 0 0 0x2 0x1>; /* PA0 periph B with pullup */
303 };
304
305 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
306 atmel,pins =
307 <0 5 0x2 0x1 /* PA5 periph B with pullup */
308 0 4 0x2 0x1 /* PA4 periph B with pullup */
309 0 3 0x2 0x1>; /* PA3 periph B with pullup */
310 };
311 };
312
544ae6b2
BS
313 ssc0 {
314 pinctrl_ssc0_tx: ssc0_tx-0 {
315 atmel,pins =
316 <1 16 0x1 0x0 /* PB16 periph A */
317 1 17 0x1 0x0 /* PB17 periph A */
318 1 18 0x1 0x0>; /* PB18 periph A */
319 };
320
321 pinctrl_ssc0_rx: ssc0_rx-0 {
322 atmel,pins =
323 <1 19 0x1 0x0 /* PB19 periph A */
324 1 20 0x1 0x0 /* PB20 periph A */
325 1 21 0x1 0x0>; /* PB21 periph A */
326 };
327 };
328
a68b728f
WY
329 spi0 {
330 pinctrl_spi0: spi0-0 {
331 atmel,pins =
332 <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
333 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
334 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
335 };
336 };
337
338 spi1 {
339 pinctrl_spi1: spi1-0 {
340 atmel,pins =
341 <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
342 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
343 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
344 };
345 };
346
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JCPV
347 pioA: gpio@fffff400 {
348 compatible = "atmel,at91rm9200-gpio";
349 reg = <0xfffff400 0x200>;
350 interrupts = <2 4 1>;
351 #gpio-cells = <2>;
352 gpio-controller;
353 interrupt-controller;
354 #interrupt-cells = <2>;
355 };
356
357 pioB: gpio@fffff600 {
358 compatible = "atmel,at91rm9200-gpio";
359 reg = <0xfffff600 0x200>;
360 interrupts = <3 4 1>;
361 #gpio-cells = <2>;
362 gpio-controller;
363 interrupt-controller;
364 #interrupt-cells = <2>;
365 };
366
367 pioC: gpio@fffff800 {
368 compatible = "atmel,at91rm9200-gpio";
369 reg = <0xfffff800 0x200>;
370 interrupts = <4 4 1>;
371 #gpio-cells = <2>;
372 gpio-controller;
373 interrupt-controller;
374 #interrupt-cells = <2>;
375 };
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JCPV
376 };
377
378 dbgu: serial@fffff200 {
379 compatible = "atmel,at91sam9260-usart";
380 reg = <0xfffff200 0x200>;
f8a073ee 381 interrupts = <1 4 7>;
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382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_dbgu>;
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384 status = "disabled";
385 };
386
387 usart0: serial@fffb0000 {
388 compatible = "atmel,at91sam9260-usart";
389 reg = <0xfffb0000 0x200>;
f8a073ee 390 interrupts = <6 4 5>;
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391 atmel,use-dma-rx;
392 atmel,use-dma-tx;
ec6754a7 393 pinctrl-names = "default";
9e3129e9 394 pinctrl-0 = <&pinctrl_usart0>;
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395 status = "disabled";
396 };
397
398 usart1: serial@fffb4000 {
399 compatible = "atmel,at91sam9260-usart";
400 reg = <0xfffb4000 0x200>;
f8a073ee 401 interrupts = <7 4 5>;
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JCPV
402 atmel,use-dma-rx;
403 atmel,use-dma-tx;
ec6754a7 404 pinctrl-names = "default";
9e3129e9 405 pinctrl-0 = <&pinctrl_usart1>;
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JCPV
406 status = "disabled";
407 };
408
409 usart2: serial@fffb8000 {
410 compatible = "atmel,at91sam9260-usart";
411 reg = <0xfffb8000 0x200>;
f8a073ee 412 interrupts = <8 4 5>;
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JCPV
413 atmel,use-dma-rx;
414 atmel,use-dma-tx;
ec6754a7 415 pinctrl-names = "default";
9e3129e9 416 pinctrl-0 = <&pinctrl_usart2>;
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JCPV
417 status = "disabled";
418 };
419
420 usart3: serial@fffd0000 {
421 compatible = "atmel,at91sam9260-usart";
422 reg = <0xfffd0000 0x200>;
f8a073ee 423 interrupts = <23 4 5>;
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424 atmel,use-dma-rx;
425 atmel,use-dma-tx;
ec6754a7 426 pinctrl-names = "default";
9e3129e9 427 pinctrl-0 = <&pinctrl_usart3>;
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JCPV
428 status = "disabled";
429 };
430
9e3129e9 431 uart0: serial@fffd4000 {
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432 compatible = "atmel,at91sam9260-usart";
433 reg = <0xfffd4000 0x200>;
f8a073ee 434 interrupts = <24 4 5>;
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435 atmel,use-dma-rx;
436 atmel,use-dma-tx;
ec6754a7 437 pinctrl-names = "default";
9e3129e9 438 pinctrl-0 = <&pinctrl_uart0>;
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439 status = "disabled";
440 };
441
9e3129e9 442 uart1: serial@fffd8000 {
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443 compatible = "atmel,at91sam9260-usart";
444 reg = <0xfffd8000 0x200>;
f8a073ee 445 interrupts = <25 4 5>;
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JCPV
446 atmel,use-dma-rx;
447 atmel,use-dma-tx;
ec6754a7 448 pinctrl-names = "default";
9e3129e9 449 pinctrl-0 = <&pinctrl_uart1>;
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JCPV
450 status = "disabled";
451 };
452
453 macb0: ethernet@fffc4000 {
454 compatible = "cdns,at32ap7000-macb", "cdns,macb";
455 reg = <0xfffc4000 0x100>;
f8a073ee 456 interrupts = <21 4 3>;
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JCPV
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_macb_rmii>;
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JCPV
459 status = "disabled";
460 };
461
462 usb1: gadget@fffa4000 {
463 compatible = "atmel,at91rm9200-udc";
464 reg = <0xfffa4000 0x4000>;
f8a073ee 465 interrupts = <10 4 2>;
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JCPV
466 status = "disabled";
467 };
73d68d91 468
05dcd361
LD
469 i2c0: i2c@fffac000 {
470 compatible = "atmel,at91sam9260-i2c";
471 reg = <0xfffac000 0x100>;
472 interrupts = <11 4 6>;
473 #address-cells = <1>;
474 #size-cells = <0>;
475 status = "disabled";
476 };
477
9873137a
LD
478 mmc0: mmc@fffa8000 {
479 compatible = "atmel,hsmci";
480 reg = <0xfffa8000 0x600>;
481 interrupts = <9 4 0>;
482 #address-cells = <1>;
483 #size-cells = <0>;
484 status = "disabled";
485 };
486
099343c6
BS
487 ssc0: ssc@fffbc000 {
488 compatible = "atmel,at91rm9200-ssc";
489 reg = <0xfffbc000 0x4000>;
490 interrupts = <14 4 5>;
544ae6b2
BS
491 pinctrl-names = "default";
492 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
046e7d68 493 status = "disabled";
099343c6
BS
494 };
495
d50f88a0
RG
496 spi0: spi@fffc8000 {
497 #address-cells = <1>;
498 #size-cells = <0>;
499 compatible = "atmel,at91rm9200-spi";
500 reg = <0xfffc8000 0x200>;
501 interrupts = <12 4 3>;
a68b728f
WY
502 pinctrl-names = "default";
503 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG
504 status = "disabled";
505 };
506
507 spi1: spi@fffcc000 {
508 #address-cells = <1>;
509 #size-cells = <0>;
510 compatible = "atmel,at91rm9200-spi";
511 reg = <0xfffcc000 0x200>;
512 interrupts = <13 4 3>;
a68b728f
WY
513 pinctrl-names = "default";
514 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG
515 status = "disabled";
516 };
517
73d68d91
NF
518 adc0: adc@fffe0000 {
519 compatible = "atmel,at91sam9260-adc";
520 reg = <0xfffe0000 0x100>;
f8a073ee 521 interrupts = <5 4 0>;
73d68d91
NF
522 atmel,adc-use-external-triggers;
523 atmel,adc-channels-used = <0xf>;
524 atmel,adc-vref = <3300>;
525 atmel,adc-num-channels = <4>;
526 atmel,adc-startup-time = <15>;
527 atmel,adc-channel-base = <0x30>;
528 atmel,adc-drdy-mask = <0x10000>;
529 atmel,adc-status-register = <0x1c>;
530 atmel,adc-trigger-register = <0x04>;
4b50da65
LD
531 atmel,adc-res = <8 10>;
532 atmel,adc-res-names = "lowres", "highres";
533 atmel,adc-use-res = "highres";
73d68d91
NF
534
535 trigger@0 {
536 trigger-name = "timer-counter-0";
537 trigger-value = <0x1>;
538 };
539 trigger@1 {
540 trigger-name = "timer-counter-1";
541 trigger-value = <0x3>;
542 };
543
544 trigger@2 {
545 trigger-name = "timer-counter-2";
546 trigger-value = <0x5>;
547 };
548
549 trigger@3 {
550 trigger-name = "external";
551 trigger-value = <0x13>;
552 trigger-external;
553 };
554 };
7492e7ca
FP
555
556 watchdog@fffffd40 {
557 compatible = "atmel,at91sam9260-wdt";
558 reg = <0xfffffd40 0x10>;
559 status = "disabled";
560 };
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JCPV
561 };
562
563 nand0: nand@40000000 {
564 compatible = "atmel,at91rm9200-nand";
565 #address-cells = <1>;
566 #size-cells = <1>;
567 reg = <0x40000000 0x10000000
568 0xffffe800 0x200
569 >;
570 atmel,nand-addr-offset = <21>;
571 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_nand>;
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JCPV
574 gpios = <&pioC 13 0
575 &pioC 14 0
576 0
577 >;
578 status = "disabled";
579 };
580
581 usb0: ohci@00500000 {
582 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
583 reg = <0x00500000 0x100000>;
f8a073ee 584 interrupts = <20 4 2>;
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JCPV
585 status = "disabled";
586 };
587 };
588
589 i2c@0 {
590 compatible = "i2c-gpio";
591 gpios = <&pioA 23 0 /* sda */
592 &pioA 24 0 /* scl */
593 >;
594 i2c-gpio,sda-open-drain;
595 i2c-gpio,scl-open-drain;
596 i2c-gpio,delay-us = <2>; /* ~100 kHz */
597 #address-cells = <1>;
598 #size-cells = <0>;
599 status = "disabled";
600 };
601};