[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / at91sam9261.dtsi

/*
 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
 *
 *  Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
 *
 * Licensed under GPLv2 only.
 */

#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>

/ {
	model = "Atmel AT91SAM9261 family SoC";
	compatible = "atmel,at91sam9261";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
		ssc2 = &ssc2;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	memory {
		reg = <0x20000000 0x08000000>;
	};

	main_xtal: main_xtal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	slow_xtal: slow_xtal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x100000>;
			interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
			status = "disabled";
		};

		fb0: fb@0x00600000 {
			compatible = "atmel,at91sam9261-lcdc";
			reg = <0x00600000 0x1000>;
			interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_fb>;
			clocks = <&lcd_clk>, <&hclk1>;
			clock-names = "lcdc_clk", "hclk";
			status = "disabled";
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000>;
			atmel,nand-addr-offset = <22>;
			atmel,nand-cmd-offset = <21>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;

			gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
				<&pioC 14 GPIO_ACTIVE_HIGH>,
				<0>;
			status = "disabled";
		};

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			tcb0: timer@fffa0000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffa0000 0x100>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
					     <18 IRQ_TYPE_LEVEL_HIGH 0>,
					     <19 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
				clock-names = "t0_clk", "t1_clk", "t2_clk";
			};

			usb1: gadget@fffa4000 {
				compatible = "atmel,at91rm9200-udc";
				reg = <0xfffa4000 0x4000>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
				clocks = <&usb>, <&udc_clk>, <&udpck>;
				clock-names = "usb_clk", "udc_clk", "udpck";
				status = "disabled";
			};

			mmc0: mmc@fffa8000 {
				compatible = "atmel,hsmci";
				reg = <0xfffa8000 0x600>;
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&mci0_clk>;
				clock-names = "mci_clk";
				status = "disabled";
			};

			i2c0: i2c@fffac000 {
				compatible = "atmel,at91sam9261-i2c";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c_twi>;
				reg = <0xfffac000 0x100>;
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&twi0_clk>;
				status = "disabled";
			};

			usart0: serial@fffb0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb0000 0x200>;
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				clocks = <&usart0_clk>;
				clock-names = "usart";
				status = "disabled";
			};

			usart1: serial@fffb4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb4000 0x200>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				clocks = <&usart1_clk>;
				clock-names = "usart";
				status = "disabled";
			};

			usart2: serial@fffb8000{
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb8000 0x200>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				clocks = <&usart2_clk>;
				clock-names = "usart";
				status = "disabled";
			};

			ssc0: ssc@fffbc000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfffbc000 0x4000>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				clocks = <&ssc0_clk>;
				clock-names = "pclk";
				status = "disabled";
			};

			ssc1: ssc@fffc0000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfffc0000 0x4000>;
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
				clocks = <&ssc1_clk>;
				clock-names = "pclk";
				status = "disabled";
			};

			ssc2: ssc@fffc4000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfffc4000 0x4000>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
				clocks = <&ssc2_clk>;
				clock-names = "pclk";
				status = "disabled";
			};

			spi0: spi@fffc8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffc8000 0x200>;
				cs-gpios = <0>, <0>, <0>, <0>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				clocks = <&spi0_clk>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			spi1: spi@fffcc000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffcc000 0x200>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				clocks = <&spi1_clk>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			ramc: ramc@ffffea00 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffea00 0x200>;
			};

			matrix: matrix@ffffee00 {
				compatible = "atmel,at91sam9260-bus-matrix";
				reg = <0xffffee00 0x200>;
			};

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <29 30 31>;
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				clocks = <&mck>;
				clock-names = "usart";
				status = "disabled";
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x600>;

				atmel,mux-mask =
				      /*    A         B     */
				      <0xffffffff 0xfffffff7>,  /* pioA */
				      <0xffffffff 0xfffffff4>,  /* pioB */
				      <0xffffffff 0xffffff07>;  /* pioC */

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOA 9  AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
							<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};
				};

				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
					};
					};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
							<AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				ssc2 {
					pinctrl_ssc2_tx: ssc2_tx-0 {
						atmel,pins =
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_ssc2_rx: ssc2_rx-0 {
						atmel,pins =
							<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
					};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				i2c0 {
					pinctrl_i2c_bitbang: i2c-0-bitbang {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
							<AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
					pinctrl_i2c_twi: i2c-0-twi {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				fb {
					pinctrl_fb: fb-0 {
						atmel,pins =
							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
							<AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
							<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pioA_clk>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pioB_clk>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pioC_clk>;
				};
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				interrupt-controller;
				#address-cells = <1>;
				#size-cells = <0>;
				#interrupt-cells = <1>;

				slow_rc_osc: slow_rc_osc {
					compatible = "fixed-clock";
					#clock-cells = <0>;
					clock-frequency = <32768>;
					clock-accuracy = <50000000>;
				};

				clk32k: slck {
					compatible = "atmel,at91sam9260-clk-slow";
					#clock-cells = <0>;
					clocks = <&slow_rc_osc &slow_xtal>;
				};

				main: mainck {
					compatible = "atmel,at91rm9200-clk-main";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
					clocks = <&main_xtal>;
				};

				plla: pllack {
					compatible = "atmel,at91rm9200-clk-pll";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
					clocks = <&main>;
					reg = <0>;
					atmel,clk-input-range = <1000000 32000000>;
					#atmel,pll-clk-output-range-cells = <4>;
					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
								<190000000 240000000 2 1>;
				};

				pllb: pllbck {
					compatible = "atmel,at91rm9200-clk-pll";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
					clocks = <&main>;
					reg = <1>;
					atmel,clk-input-range = <1000000 5000000>;
					#atmel,pll-clk-output-range-cells = <4>;
					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
				};

				mck: masterck {
					compatible = "atmel,at91rm9200-clk-master";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
					atmel,clk-output-range = <0 94000000>;
					atmel,clk-divisors = <1 2 4 0>;
				};

				usb: usbck {
					compatible = "atmel,at91rm9200-clk-usb";
					#clock-cells = <0>;
					atmel,clk-divisors = <1 2 4 0>;
					clocks = <&pllb>;
				};

				prog: progck {
					compatible = "atmel,at91rm9200-clk-programmable";
					#address-cells = <1>;
					#size-cells = <0>;
					interrupt-parent = <&pmc>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;

					prog0: prog0 {
						#clock-cells = <0>;
						reg = <0>;
						interrupts = <AT91_PMC_PCKRDY(0)>;
					};

					prog1: prog1 {
						#clock-cells = <0>;
						reg = <1>;
						interrupts = <AT91_PMC_PCKRDY(1)>;
					};

					prog2: prog2 {
						#clock-cells = <0>;
						reg = <2>;
						interrupts = <AT91_PMC_PCKRDY(2)>;
					};

					prog3: prog3 {
						#clock-cells = <0>;
						reg = <3>;
						interrupts = <AT91_PMC_PCKRDY(3)>;
					};
				};

				systemck {
					compatible = "atmel,at91rm9200-clk-system";
					#address-cells = <1>;
					#size-cells = <0>;

					uhpck: uhpck {
						#clock-cells = <0>;
						reg = <6>;
						clocks = <&usb>;
					};

					udpck: udpck {
						#clock-cells = <0>;
						reg = <7>;
						clocks = <&usb>;
					};

					pck0: pck0 {
						#clock-cells = <0>;
						reg = <8>;
						clocks = <&prog0>;
					};

					pck1: pck1 {
						#clock-cells = <0>;
						reg = <9>;
						clocks = <&prog1>;
					};

					pck2: pck2 {
						#clock-cells = <0>;
						reg = <10>;
						clocks = <&prog2>;
					};

					pck3: pck3 {
						#clock-cells = <0>;
						reg = <11>;
						clocks = <&prog3>;
					};

					hclk0: hclk0 {
						#clock-cells = <0>;
						reg = <16>;
						clocks = <&mck>;
					};

					hclk1: hclk1 {
						#clock-cells = <0>;
						reg = <17>;
						clocks = <&mck>;
					};
				};

				periphck {
					compatible = "atmel,at91rm9200-clk-peripheral";
					#address-cells = <1>;
					#size-cells = <0>;
					clocks = <&mck>;

					pioA_clk: pioA_clk {
						#clock-cells = <0>;
						reg = <2>;
					};

					pioB_clk: pioB_clk {
						#clock-cells = <0>;
						reg = <3>;
					};

					pioC_clk: pioC_clk {
						#clock-cells = <0>;
						reg = <4>;
					};

					usart0_clk: usart0_clk {
						#clock-cells = <0>;
						reg = <6>;
					};

					usart1_clk: usart1_clk {
						#clock-cells = <0>;
						reg = <7>;
					};

					usart2_clk: usart2_clk {
						#clock-cells = <0>;
						reg = <8>;
					};

					mci0_clk: mci0_clk {
						#clock-cells = <0>;
						reg = <9>;
					};

					udc_clk: udc_clk {
						#clock-cells = <0>;
						reg = <10>;
					};

					twi0_clk: twi0_clk {
						reg = <11>;
						#clock-cells = <0>;
					};

					spi0_clk: spi0_clk {
						#clock-cells = <0>;
						reg = <12>;
					};

					spi1_clk: spi1_clk {
						#clock-cells = <0>;
						reg = <13>;
					};

					ssc0_clk: ssc0_clk {
						#clock-cells = <0>;
						reg = <14>;
					};

					ssc1_clk: ssc1_clk {
						#clock-cells = <0>;
						reg = <15>;
					};

					ssc2_clk: ssc2_clk {
						#clock-cells = <0>;
						reg = <16>;
					};

					tc0_clk: tc0_clk {
						#clock-cells = <0>;
						reg = <17>;
					};

					tc1_clk: tc1_clk {
						#clock-cells = <0>;
						reg = <18>;
					};

					tc2_clk: tc2_clk {
						#clock-cells = <0>;
						reg = <19>;
					};

					ohci_clk: ohci_clk {
						#clock-cells = <0>;
						reg = <20>;
					};

					lcd_clk: lcd_clk {
						#clock-cells = <0>;
						reg = <21>;
					};
				};
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&mck>;
			};

			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				status = "disabled";
			};
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_bitbang>;
		gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
			<&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
360ccb30 JJH	1	/*
	2	* at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
	3	*
	4	* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
	5	*
	6	* Licensed under GPLv2 only.
	7	*/
	8
	9	#include "skeleton.dtsi"
	10	#include <dt-bindings/pinctrl/at91.h>
	11	#include <dt-bindings/interrupt-controller/irq.h>
	12	#include <dt-bindings/gpio/gpio.h>
35d35aae	13	#include <dt-bindings/clock/at91.h>
360ccb30 JJH	14
	15	/ {
	16	model = "Atmel AT91SAM9261 family SoC";
	17	compatible = "atmel,at91sam9261";
	18	interrupt-parent = <&aic>;
	19
	20	aliases {
	21	serial0 = &dbgu;
	22	serial1 = &usart0;
	23	serial2 = &usart1;
	24	serial3 = &usart2;
	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	tcb0 = &tcb0;
	29	i2c0 = &i2c0;
	30	ssc0 = &ssc0;
	31	ssc1 = &ssc1;
32da8c85	32	ssc2 = &ssc2;
360ccb30 JJH	33	};
	34
	35	cpus {
	36	#address-cells = <0>;
	37	#size-cells = <0>;
	38
	39	cpu {
	40	compatible = "arm,arm926ej-s";
	41	device_type = "cpu";
	42	};
	43	};
	44
	45	memory {
	46	reg = <0x20000000 0x08000000>;
	47	};
	48
884fb7d0 BB	49	main_xtal: main_xtal {
	50	compatible = "fixed-clock";
	51	#clock-cells = <0>;
	52	clock-frequency = <0>;
	53	};
	54
	55	slow_xtal: slow_xtal {
	56	compatible = "fixed-clock";
	57	#clock-cells = <0>;
	58	clock-frequency = <0>;
	59	};
	60
360ccb30 JJH	61	ahb {
	62	compatible = "simple-bus";
	63	#address-cells = <1>;
	64	#size-cells = <1>;
	65	ranges;
	66
	67	usb0: ohci@00500000 {
	68	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	69	reg = <0x00500000 0x100000>;
	70	interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
	71	clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
	72	clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
	73	status = "disabled";
	74	};
	75
	76	fb0: fb@0x00600000 {
	77	compatible = "atmel,at91sam9261-lcdc";
	78	reg = <0x00600000 0x1000>;
	79	interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
	80	pinctrl-names = "default";
	81	pinctrl-0 = <&pinctrl_fb>;
	82	clocks = <&lcd_clk>, <&hclk1>;
	83	clock-names = "lcdc_clk", "hclk";
	84	status = "disabled";
	85	};
	86
	87	nand0: nand@40000000 {
	88	compatible = "atmel,at91rm9200-nand";
	89	#address-cells = <1>;
	90	#size-cells = <1>;
	91	reg = <0x40000000 0x10000000>;
	92	atmel,nand-addr-offset = <22>;
	93	atmel,nand-cmd-offset = <21>;
	94	pinctrl-names = "default";
	95	pinctrl-0 = <&pinctrl_nand>;
	96
	97	gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
	98	<&pioC 14 GPIO_ACTIVE_HIGH>,
	99	<0>;
	100	status = "disabled";
	101	};
	102
	103	apb {
	104	compatible = "simple-bus";
	105	#address-cells = <1>;
	106	#size-cells = <1>;
	107	ranges;
	108
	109	tcb0: timer@fffa0000 {
	110	compatible = "atmel,at91rm9200-tcb";
	111	reg = <0xfffa0000 0x100>;
	112	interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
	113	<18 IRQ_TYPE_LEVEL_HIGH 0>,
	114	<19 IRQ_TYPE_LEVEL_HIGH 0>;
	115	clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
	116	clock-names = "t0_clk", "t1_clk", "t2_clk";
	117	};
	118
	119	usb1: gadget@fffa4000 {
	120	compatible = "atmel,at91rm9200-udc";
	121	reg = <0xfffa4000 0x4000>;
	122	interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
	123	clocks = <&usb>, <&udc_clk>, <&udpck>;
	124	clock-names = "usb_clk", "udc_clk", "udpck";
125	status = "disabled";
126	};
127
128	mmc0: mmc@fffa8000 {
129	compatible = "atmel,hsmci";
130	reg = <0xfffa8000 0x600>;
131	interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
132	pinctrl-names = "default";
133	pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
134	#address-cells = <1>;
135	#size-cells = <0>;
136	clocks = <&mci0_clk>;
137	clock-names = "mci_clk";
138	status = "disabled";
139	};
140
141	i2c0: i2c@fffac000 {
142	compatible = "atmel,at91sam9261-i2c";
143	pinctrl-names = "default";
144	pinctrl-0 = <&pinctrl_i2c_twi>;
145	reg = <0xfffac000 0x100>;
146	interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
147	#address-cells = <1>;
148	#size-cells = <0>;
149	clocks = <&twi0_clk>;
150	status = "disabled";
151	};
152
153	usart0: serial@fffb0000 {
154	compatible = "atmel,at91sam9260-usart";
155	reg = <0xfffb0000 0x200>;
156	interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
157	atmel,use-dma-rx;
158	atmel,use-dma-tx;
159	pinctrl-names = "default";
160	pinctrl-0 = <&pinctrl_usart0>;
161	clocks = <&usart0_clk>;
162	clock-names = "usart";
163	status = "disabled";
164	};
165
166	usart1: serial@fffb4000 {
167	compatible = "atmel,at91sam9260-usart";
168	reg = <0xfffb4000 0x200>;
169	interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
170	atmel,use-dma-rx;
171	atmel,use-dma-tx;
172	pinctrl-names = "default";
173	pinctrl-0 = <&pinctrl_usart1>;
174	clocks = <&usart1_clk>;
175	clock-names = "usart";
176	status = "disabled";
177	};
178
179	usart2: serial@fffb8000{
180	compatible = "atmel,at91sam9260-usart";
181	reg = <0xfffb8000 0x200>;
182	interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
183	atmel,use-dma-rx;
184	atmel,use-dma-tx;
185	pinctrl-names = "default";
186	pinctrl-0 = <&pinctrl_usart2>;
187	clocks = <&usart2_clk>;
188	clock-names = "usart";
189	status = "disabled";
190	};
191
192	ssc0: ssc@fffbc000 {
193	compatible = "atmel,at91rm9200-ssc";
194	reg = <0xfffbc000 0x4000>;
195	interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
196	pinctrl-names = "default";
197	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
32da8c85 AB	198	clocks = <&ssc0_clk>;
32da8c85 AB	199	clock-names = "pclk";
360ccb30 JJH	200	status = "disabled";
	201	};
	202
	203	ssc1: ssc@fffc0000 {
	204	compatible = "atmel,at91rm9200-ssc";
	205	reg = <0xfffc0000 0x4000>;
	206	interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
	207	pinctrl-names = "default";
	208	pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
32da8c85 AB	209	clocks = <&ssc1_clk>;
	210	clock-names = "pclk";
	211	status = "disabled";
	212	};
	213
	214	ssc2: ssc@fffc4000 {
	215	compatible = "atmel,at91rm9200-ssc";
	216	reg = <0xfffc4000 0x4000>;
	217	interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
	218	pinctrl-names = "default";
	219	pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
	220	clocks = <&ssc2_clk>;
	221	clock-names = "pclk";
360ccb30 JJH	222	status = "disabled";
	223	};
	224
	225	spi0: spi@fffc8000 {
	226	#address-cells = <1>;
	227	#size-cells = <0>;
	228	compatible = "atmel,at91rm9200-spi";
	229	reg = <0xfffc8000 0x200>;
	230	cs-gpios = <0>, <0>, <0>, <0>;
	231	interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
	232	pinctrl-names = "default";
	233	pinctrl-0 = <&pinctrl_spi0>;
	234	clocks = <&spi0_clk>;
	235	clock-names = "spi_clk";
	236	status = "disabled";
	237	};
	238
	239	spi1: spi@fffcc000 {
	240	#address-cells = <1>;
	241	#size-cells = <0>;
	242	compatible = "atmel,at91rm9200-spi";
	243	reg = <0xfffcc000 0x200>;
	244	interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
	245	pinctrl-names = "default";
	246	pinctrl-0 = <&pinctrl_spi1>;
	247	clocks = <&spi1_clk>;
	248	clock-names = "spi_clk";
	249	status = "disabled";
	250	};
	251
	252	ramc: ramc@ffffea00 {
	253	compatible = "atmel,at91sam9260-sdramc";
	254	reg = <0xffffea00 0x200>;
	255	};
	256
	257	matrix: matrix@ffffee00 {
	258	compatible = "atmel,at91sam9260-bus-matrix";
	259	reg = <0xffffee00 0x200>;
	260	};
	261
	262	aic: interrupt-controller@fffff000 {
	263	#interrupt-cells = <3>;
	264	compatible = "atmel,at91rm9200-aic";
	265	interrupt-controller;
	266	reg = <0xfffff000 0x200>;
	267	atmel,external-irqs = <29 30 31>;
	268	};
	269
	270	dbgu: serial@fffff200 {
	271	compatible = "atmel,at91sam9260-usart";
	272	reg = <0xfffff200 0x200>;
	273	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
	274	pinctrl-names = "default";
	275	pinctrl-0 = <&pinctrl_dbgu>;
	276	clocks = <&mck>;
	277	clock-names = "usart";
	278	status = "disabled";
	279	};
	280
	281	pinctrl@fffff400 {
	282	#address-cells = <1>;
	283	#size-cells = <1>;
	284	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
	285	ranges = <0xfffff400 0xfffff400 0x600>;
286
287	atmel,mux-mask =
288	/* A B */
289	<0xffffffff 0xfffffff7>, /* pioA */
290	<0xffffffff 0xfffffff4>, /* pioB */
291	<0xffffffff 0xffffff07>; /* pioC */
292
293	/* shared pinctrl settings */
294	dbgu {
295	pinctrl_dbgu: dbgu-0 {
296	atmel,pins =
297	<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
298	<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
299	};
300	};
301
302	usart0 {
303	pinctrl_usart0: usart0-0 {
304	atmel,pins =
305	<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
306	<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
307	};
308
309	pinctrl_usart0_rts: usart0_rts-0 {
310	atmel,pins =
311	<AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
312	};
313
314	pinctrl_usart0_cts: usart0_cts-0 {
315	atmel,pins =
316	<AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
317	};
318	};
319
320	usart1 {
321	pinctrl_usart1: usart1-0 {
322	atmel,pins =
323	<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
324	<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325	};
326
327	pinctrl_usart1_rts: usart1_rts-0 {
328	atmel,pins =
329	<AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
330	};
331
332	pinctrl_usart1_cts: usart1_cts-0 {
333	atmel,pins =
334	<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
335	};
336	};
337
338	usart2 {
339	pinctrl_usart2: usart2-0 {
340	atmel,pins =
341	<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
342	<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343	};
344
345	pinctrl_usart2_rts: usart2_rts-0 {
346	atmel,pins =
347	<AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
348	};
349
350	pinctrl_usart2_cts: usart2_cts-0 {
351	atmel,pins =
352	<AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
353	};
354	};
355
356	nand {
357	pinctrl_nand: nand-0 {
358	atmel,pins =
359	<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
360	<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
361	};
362	};
363
364	mmc0 {
365	pinctrl_mmc0_clk: mmc0_clk-0 {
366	atmel,pins =
367	<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
368	};
369
370	pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
371	atmel,pins =
372	<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
373	<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
374	};
375
376	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
377	atmel,pins =
378	<AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
379	<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
380	<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
381	};
382	};
383
384	ssc0 {
385	pinctrl_ssc0_tx: ssc0_tx-0 {
386	atmel,pins =
387	<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
388	<AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
389	<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
390	};
391
392	pinctrl_ssc0_rx: ssc0_rx-0 {
393	atmel,pins =
394	<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
395	<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
396	<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
397	};
398	};
399
400	ssc1 {
401	pinctrl_ssc1_tx: ssc1_tx-0 {
402	atmel,pins =
403	<AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
404	<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
405	<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
406	};
407
408	pinctrl_ssc1_rx: ssc1_rx-0 {
409	atmel,pins =
410	<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
411	<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
412	<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413	};
414	};
415
32da8c85 AB	416	ssc2 {
	417	pinctrl_ssc2_tx: ssc2_tx-0 {
	418	atmel,pins =
	419	<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
	420	<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
	421	<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	422	};
	423
	424	pinctrl_ssc2_rx: ssc2_rx-0 {
	425	atmel,pins =
	426	<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
	427	<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
	428	<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	429	};
	430	};
	431
360ccb30 JJH	432	spi0 {
	433	pinctrl_spi0: spi0-0 {
	434	atmel,pins =
	435	<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
	436	<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
	437	<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
	438	};
	439	};
	440
	441	spi1 {
	442	pinctrl_spi1: spi1-0 {
	443	atmel,pins =
	444	<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
	445	<AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
	446	<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
	447	};
	448	};
	449
	450	tcb0 {
	451	pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
	452	atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	453	};
	454
	455	pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
	456	atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	457	};
	458
	459	pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
	460	atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	461	};
	462
	463	pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
	464	atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	465	};
	466
	467	pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
	468	atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	469	};
	470
	471	pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
	472	atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	473	};
	474
	475	pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
	476	atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	477	};
	478
	479	pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
	480	atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	481	};
	482
	483	pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
	484	atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
	485	};
	486	};
	487
	488	i2c0 {
	489	pinctrl_i2c_bitbang: i2c-0-bitbang {
	490	atmel,pins =
	491	<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
	492	<AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
	493	};
	494	pinctrl_i2c_twi: i2c-0-twi {
	495	atmel,pins =
496	<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
497	<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
498	};
499	};
500
501	fb {
502	pinctrl_fb: fb-0 {
503	atmel,pins =
504	<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
505	<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
506	<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
507	<AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
508	<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
509	<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
510	<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
511	<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
512	<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
513	<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
514	<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
515	<AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
516	<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
517	<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518	<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
519	<AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
520	<AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
521	<AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
522	<AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
523	<AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
524	<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
525	};
526	};
527
528	pioA: gpio@fffff400 {
529	compatible = "atmel,at91rm9200-gpio";
530	reg = <0xfffff400 0x200>;
531	interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
532	#gpio-cells = <2>;
533	gpio-controller;
534	interrupt-controller;
535	#interrupt-cells = <2>;
536	clocks = <&pioA_clk>;
537	};
538
539	pioB: gpio@fffff600 {
540	compatible = "atmel,at91rm9200-gpio";
541	reg = <0xfffff600 0x200>;
542	interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
543	#gpio-cells = <2>;
544	gpio-controller;
545	interrupt-controller;
546	#interrupt-cells = <2>;
547	clocks = <&pioB_clk>;
548	};
549
550	pioC: gpio@fffff800 {
551	compatible = "atmel,at91rm9200-gpio";
552	reg = <0xfffff800 0x200>;
553	interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
554	#gpio-cells = <2>;
555	gpio-controller;
556	interrupt-controller;
557	#interrupt-cells = <2>;
558	clocks = <&pioC_clk>;
559	};
560	};
561
562	pmc: pmc@fffffc00 {
563	compatible = "atmel,at91rm9200-pmc";
564	reg = <0xfffffc00 0x100>;
565	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
566	interrupt-controller;
567	#address-cells = <1>;
568	#size-cells = <0>;
569	#interrupt-cells = <1>;
570
884fb7d0	571	slow_rc_osc: slow_rc_osc {
360ccb30 JJH	572	compatible = "fixed-clock";
	573	#clock-cells = <0>;
	574	clock-frequency = <32768>;
884fb7d0 BB	575	clock-accuracy = <50000000>;
	576	};
	577
	578	clk32k: slck {
	579	compatible = "atmel,at91sam9260-clk-slow";
	580	#clock-cells = <0>;
	581	clocks = <&slow_rc_osc &slow_xtal>;
360ccb30 JJH	582	};
	583
	584	main: mainck {
	585	compatible = "atmel,at91rm9200-clk-main";
	586	#clock-cells = <0>;
	587	interrupts-extended = <&pmc AT91_PMC_MOSCS>;
884fb7d0	588	clocks = <&main_xtal>;
360ccb30 JJH	589	};
	590
	591	plla: pllack {
	592	compatible = "atmel,at91rm9200-clk-pll";
	593	#clock-cells = <0>;
	594	interrupts-extended = <&pmc AT91_PMC_LOCKA>;
	595	clocks = <&main>;
	596	reg = <0>;
	597	atmel,clk-input-range = <1000000 32000000>;
	598	#atmel,pll-clk-output-range-cells = <4>;
b1059186 AB	599	atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
b1059186 AB	600	<190000000 240000000 2 1>;
360ccb30 JJH	601	};
	602
	603	pllb: pllbck {
	604	compatible = "atmel,at91rm9200-clk-pll";
	605	#clock-cells = <0>;
	606	interrupts-extended = <&pmc AT91_PMC_LOCKB>;
	607	clocks = <&main>;
	608	reg = <1>;
b1059186	609	atmel,clk-input-range = <1000000 5000000>;
360ccb30	610	#atmel,pll-clk-output-range-cells = <4>;
b1059186	611	atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
360ccb30 JJH	612	};
	613
	614	mck: masterck {
	615	compatible = "atmel,at91rm9200-clk-master";
	616	#clock-cells = <0>;
	617	interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
	618	clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
	619	atmel,clk-output-range = <0 94000000>;
b1059186	620	atmel,clk-divisors = <1 2 4 0>;
360ccb30 JJH	621	};
	622
	623	usb: usbck {
	624	compatible = "atmel,at91rm9200-clk-usb";
	625	#clock-cells = <0>;
b1059186	626	atmel,clk-divisors = <1 2 4 0>;
360ccb30 JJH	627	clocks = <&pllb>;
	628	};
	629
32da8c85 AB	630	prog: progck {
	631	compatible = "atmel,at91rm9200-clk-programmable";
	632	#address-cells = <1>;
	633	#size-cells = <0>;
	634	interrupt-parent = <&pmc>;
	635	clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
	636
	637	prog0: prog0 {
	638	#clock-cells = <0>;
	639	reg = <0>;
	640	interrupts = <AT91_PMC_PCKRDY(0)>;
	641	};
	642
	643	prog1: prog1 {
	644	#clock-cells = <0>;
	645	reg = <1>;
	646	interrupts = <AT91_PMC_PCKRDY(1)>;
	647	};
	648
	649	prog2: prog2 {
	650	#clock-cells = <0>;
	651	reg = <2>;
	652	interrupts = <AT91_PMC_PCKRDY(2)>;
	653	};
	654
	655	prog3: prog3 {
	656	#clock-cells = <0>;
	657	reg = <3>;
	658	interrupts = <AT91_PMC_PCKRDY(3)>;
	659	};
	660	};
	661
360ccb30 JJH	662	systemck {
	663	compatible = "atmel,at91rm9200-clk-system";
	664	#address-cells = <1>;
	665	#size-cells = <0>;
	666
	667	uhpck: uhpck {
	668	#clock-cells = <0>;
	669	reg = <6>;
	670	clocks = <&usb>;
	671	};
	672
	673	udpck: udpck {
	674	#clock-cells = <0>;
	675	reg = <7>;
	676	clocks = <&usb>;
	677	};
	678
32da8c85 AB	679	pck0: pck0 {
	680	#clock-cells = <0>;
	681	reg = <8>;
	682	clocks = <&prog0>;
	683	};
	684
	685	pck1: pck1 {
	686	#clock-cells = <0>;
	687	reg = <9>;
	688	clocks = <&prog1>;
	689	};
	690
	691	pck2: pck2 {
	692	#clock-cells = <0>;
	693	reg = <10>;
	694	clocks = <&prog2>;
	695	};
	696
	697	pck3: pck3 {
	698	#clock-cells = <0>;
	699	reg = <11>;
	700	clocks = <&prog3>;
	701	};
	702
360ccb30 JJH	703	hclk0: hclk0 {
	704	#clock-cells = <0>;
	705	reg = <16>;
	706	clocks = <&mck>;
	707	};
	708
	709	hclk1: hclk1 {
	710	#clock-cells = <0>;
	711	reg = <17>;
	712	clocks = <&mck>;
	713	};
	714	};
	715
	716	periphck {
	717	compatible = "atmel,at91rm9200-clk-peripheral";
	718	#address-cells = <1>;
	719	#size-cells = <0>;
	720	clocks = <&mck>;
	721
	722	pioA_clk: pioA_clk {
	723	#clock-cells = <0>;
	724	reg = <2>;
	725	};
	726
	727	pioB_clk: pioB_clk {
	728	#clock-cells = <0>;
	729	reg = <3>;
	730	};
	731
	732	pioC_clk: pioC_clk {
	733	#clock-cells = <0>;
	734	reg = <4>;
	735	};
	736
	737	usart0_clk: usart0_clk {
	738	#clock-cells = <0>;
	739	reg = <6>;
	740	};
	741
	742	usart1_clk: usart1_clk {
	743	#clock-cells = <0>;
	744	reg = <7>;
	745	};
	746
	747	usart2_clk: usart2_clk {
	748	#clock-cells = <0>;
	749	reg = <8>;
	750	};
	751
	752	mci0_clk: mci0_clk {
	753	#clock-cells = <0>;
	754	reg = <9>;
	755	};
	756
	757	udc_clk: udc_clk {
	758	#clock-cells = <0>;
	759	reg = <10>;
	760	};
	761
	762	twi0_clk: twi0_clk {
	763	reg = <11>;
	764	#clock-cells = <0>;
	765	};
	766
767	spi0_clk: spi0_clk {
768	#clock-cells = <0>;
769	reg = <12>;
770	};
771
772	spi1_clk: spi1_clk {
773	#clock-cells = <0>;
774	reg = <13>;
775	};
776
32da8c85 AB	777	ssc0_clk: ssc0_clk {
	778	#clock-cells = <0>;
	779	reg = <14>;
	780	};
	781
	782	ssc1_clk: ssc1_clk {
	783	#clock-cells = <0>;
	784	reg = <15>;
	785	};
	786
	787	ssc2_clk: ssc2_clk {
	788	#clock-cells = <0>;
	789	reg = <16>;
	790	};
	791
360ccb30 JJH	792	tc0_clk: tc0_clk {
	793	#clock-cells = <0>;
	794	reg = <17>;
	795	};
	796
	797	tc1_clk: tc1_clk {
	798	#clock-cells = <0>;
	799	reg = <18>;
	800	};
	801
	802	tc2_clk: tc2_clk {
	803	#clock-cells = <0>;
	804	reg = <19>;
	805	};
	806
	807	ohci_clk: ohci_clk {
	808	#clock-cells = <0>;
	809	reg = <20>;
	810	};
	811
	812	lcd_clk: lcd_clk {
	813	#clock-cells = <0>;
	814	reg = <21>;
	815	};
	816	};
	817	};
	818
	819	rstc@fffffd00 {
	820	compatible = "atmel,at91sam9260-rstc";
	821	reg = <0xfffffd00 0x10>;
	822	};
	823
	824	shdwc@fffffd10 {
	825	compatible = "atmel,at91sam9260-shdwc";
	826	reg = <0xfffffd10 0x10>;
	827	};
	828
	829	pit: timer@fffffd30 {
	830	compatible = "atmel,at91sam9260-pit";
	831	reg = <0xfffffd30 0xf>;
	832	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
	833	clocks = <&mck>;
	834	};
	835
	836	watchdog@fffffd40 {
	837	compatible = "atmel,at91sam9260-wdt";
	838	reg = <0xfffffd40 0x10>;
	839	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
	840	status = "disabled";
	841	};
	842	};
	843	};
	844
	845	i2c@0 {
	846	compatible = "i2c-gpio";
	847	pinctrl-names = "default";
	848	pinctrl-0 = <&pinctrl_i2c_bitbang>;
	849	gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
	850	<&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
	851	i2c-gpio,sda-open-drain;
	852	i2c-gpio,scl-open-drain;
	853	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	854	#address-cells = <1>;
	855	#size-cells = <0>;
856	status = "disabled";
857	};
858	};