[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / at91sam9263.dtsi

/*
 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
 *
 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 only.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9263 family SoC";
	compatible = "atmel,at91sam9263";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <30 31>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			ramc: ramc@ffffe200 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe200 0x200
				       0xffffe800 0x200>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <19 4 0>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

				atmel,mux-mask = <
				      /*    A         B     */
				       0xfffffffb 0xffffe07f  /* pioA */
				       0x0007ffff 0x39072fff  /* pioB */
				       0xffffffff 0x3ffffff8  /* pioC */
				       0xfffffbff 0xffffffff  /* pioD */
				       0xffe00fff 0xfbfcff00  /* pioE */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<2 30 0x1 0x0	/* PC30 periph A */
							 2 31 0x1 0x1>;	/* PC31 periph with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<0 26 0x1 0x1	/* PA26 periph A with pullup */
							 0 27 0x1 0x0>;	/* PA27 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<0 28 0x1 0x0>;	/* PA28 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<0 29 0x1 0x0>;	/* PA29 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<3 0 0x1 0x1	/* PD0 periph A with pullup */
							 3 1 0x1 0x0>;	/* PD1 periph A */
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<3 7 0x2 0x0>;	/* PD7 periph B */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<3 8 0x2 0x0>;	/* PD8 periph B */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<3 2 0x1 0x1	/* PD2 periph A with pullup */
							 3 3 0x1 0x0>;	/* PD3 periph A */
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<3 5 0x2 0x0>;	/* PD5 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<4 6 0x2 0x0>;	/* PD6 periph B */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<0 22 0x0 0x1	/* PA22 gpio RDY pin pull_up*/
							 3 15 0x0 0x1>;	/* PD15 gpio enable pin pull_up */
					};
				};

				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
							<2 25 0x2 0x0	/* PC25 periph B */
							 4 21 0x1 0x0	/* PE21 periph A */
							 4 23 0x1 0x0	/* PE23 periph A */
							 4 24 0x1 0x0	/* PE24 periph A */
							 4 25 0x1 0x0	/* PE25 periph A */
							 4 26 0x1 0x0	/* PE26 periph A */
							 4 27 0x1 0x0	/* PE27 periph A */
							 4 28 0x1 0x0	/* PE28 periph A */
							 4 29 0x1 0x0	/* PE29 periph A */
							 4 30 0x1 0x0>;	/* PE30 periph A */
					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
							<2 20 0x2 0x0	/* PC20 periph B */
							 2 21 0x2 0x0	/* PC21 periph B */
							 2 22 0x2 0x0	/* PC22 periph B */
							 2 23 0x2 0x0	/* PC23 periph B */
							 2 24 0x2 0x0	/* PC24 periph B */
							 2 25 0x2 0x0	/* PC25 periph B */
							 2 27 0x2 0x0	/* PC27 periph B */
							 4 22 0x2 0x0>;	/* PE22 periph B */
					};
				};

				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
							<0 12 0x1 0x0>;	/* PA12 periph A */
					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
							<0 1 0x1 0x1	/* PA1 periph A with pullup */
							 0 0 0x1 0x1>;	/* PA0 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<0 3 0x1 0x1	/* PA3 periph A with pullup */
							 0 4 0x1 0x1	/* PA4 periph A with pullup */
							 0 5 0x1 0x1>;	/* PA5 periph A with pullup */
					};

					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
						atmel,pins =
							<0 16 0x1 0x1	/* PA16 periph A with pullup */
							 0 17 0x1 0x1>;	/* PA17 periph A with pullup */
					};

					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
						atmel,pins =
							<0 18 0x1 0x1	/* PA18 periph A with pullup */
							 0 19 0x1 0x1	/* PA19 periph A with pullup */
							 0 20 0x1 0x1>;	/* PA20 periph A with pullup */
					};
				};

				mmc1 {
					pinctrl_mmc1_clk: mmc1_clk-0 {
						atmel,pins =
							<0 6 0x1 0x0>;	/* PA6 periph A */
					};

					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
						atmel,pins =
							<0 7 0x1 0x1	/* PA7 periph A with pullup */
							 0 8 0x1 0x1>;	/* PA8 periph A with pullup */
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
							<0 9 0x1 0x1	/* PA9 periph A with pullup */
							 0 10 0x1 0x1	/* PA10 periph A with pullup */
							 0 11 0x1 0x1>;	/* PA11 periph A with pullup */
					};

					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
						atmel,pins =
							<0 21 0x1 0x1	/* PA21 periph A with pullup */
							 0 22 0x1 0x1>;	/* PA22 periph A with pullup */
					};

					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
						atmel,pins =
							<0 23 0x1 0x1	/* PA23 periph A with pullup */
							 0 24 0x1 0x1	/* PA24 periph A with pullup */
							 0 25 0x1 0x1>;	/* PA25 periph A with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<1 0 0x2 0x0	/* PB0 periph B */
							 1 1 0x2 0x0	/* PB1 periph B */
							 1 2 0x2 0x0>;	/* PB2 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<1 3 0x2 0x0	/* PB3 periph B */
							 1 4 0x2 0x0	/* PB4 periph B */
							 1 5 0x2 0x0>;	/* PB5 periph B */
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
							<1 6 0x1 0x0	/* PB6 periph A */
							 1 7 0x1 0x0	/* PB7 periph A */
							 1 8 0x1 0x0>;	/* PB8 periph A */
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
							<1 9 0x1 0x0	/* PB9 periph A */
							 1 10 0x1 0x0	/* PB10 periph A */
							 1 11 0x1 0x0>;	/* PB11 periph A */
					};
				};

				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			ssc0: ssc@fff98000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff98000 0x4000>;
				interrupts = <16 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			ssc1: ssc@fff9c000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff9c000 0x4000>;
				interrupts = <17 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <21 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
				status = "disabled";
			};

			usb1: gadget@fff78000 {
				compatible = "atmel,at91rm9200-udc";
				reg = <0xfff78000 0x4000>;
				interrupts = <24 4 2>;
				status = "disabled";
			};

			i2c0: i2c@fff88000 {
				compatible = "atmel,at91sam9263-i2c";
				reg = <0xfff88000 0x100>;
				interrupts = <13 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc0: mmc@fff80000 {
				compatible = "atmel,hsmci";
				reg = <0xfff80000 0x600>;
				interrupts = <10 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@fff84000 {
				compatible = "atmel,hsmci";
				reg = <0xfff84000 0x600>;
				interrupts = <11 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe000 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioA 22 0
				 &pioD 15 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00a00000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00a00000 0x100000>;
			interrupts = <29 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
4abb3677 JCPV	1	/*
	2	* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
	3	*
	4	* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	5	*
	6	* Licensed under GPLv2 only.
	7	*/
	8
	9	/include/ "skeleton.dtsi"
	10
	11	/ {
	12	model = "Atmel AT91SAM9263 family SoC";
	13	compatible = "atmel,at91sam9263";
	14	interrupt-parent = <&aic>;
	15
	16	aliases {
	17	serial0 = &dbgu;
	18	serial1 = &usart0;
	19	serial2 = &usart1;
	20	serial3 = &usart2;
	21	gpio0 = &pioA;
	22	gpio1 = &pioB;
	23	gpio2 = &pioC;
	24	gpio3 = &pioD;
	25	gpio4 = &pioE;
	26	tcb0 = &tcb0;
05dcd361	27	i2c0 = &i2c0;
099343c6 BS	28	ssc0 = &ssc0;
099343c6 BS	29	ssc1 = &ssc1;
4abb3677 JCPV	30	};
	31	cpus {
	32	cpu@0 {
	33	compatible = "arm,arm926ejs";
	34	};
	35	};
	36
	37	memory {
	38	reg = <0x20000000 0x08000000>;
	39	};
	40
	41	ahb {
	42	compatible = "simple-bus";
	43	#address-cells = <1>;
	44	#size-cells = <1>;
	45	ranges;
	46
	47	apb {
	48	compatible = "simple-bus";
	49	#address-cells = <1>;
	50	#size-cells = <1>;
	51	ranges;
	52
	53	aic: interrupt-controller@fffff000 {
f8a073ee	54	#interrupt-cells = <3>;
4abb3677 JCPV	55	compatible = "atmel,at91rm9200-aic";
	56	interrupt-controller;
	57	reg = <0xfffff000 0x200>;
c6573943	58	atmel,external-irqs = <30 31>;
4abb3677 JCPV	59	};
	60
	61	pmc: pmc@fffffc00 {
	62	compatible = "atmel,at91rm9200-pmc";
	63	reg = <0xfffffc00 0x100>;
	64	};
	65
	66	ramc: ramc@ffffe200 {
	67	compatible = "atmel,at91sam9260-sdramc";
	68	reg = <0xffffe200 0x200
	69	0xffffe800 0x200>;
	70	};
	71
	72	pit: timer@fffffd30 {
	73	compatible = "atmel,at91sam9260-pit";
	74	reg = <0xfffffd30 0xf>;
f8a073ee	75	interrupts = <1 4 7>;
4abb3677 JCPV	76	};
	77
	78	tcb0: timer@fff7c000 {
	79	compatible = "atmel,at91rm9200-tcb";
	80	reg = <0xfff7c000 0x100>;
f8a073ee	81	interrupts = <19 4 0>;
4abb3677 JCPV	82	};
	83
	84	rstc@fffffd00 {
	85	compatible = "atmel,at91sam9260-rstc";
	86	reg = <0xfffffd00 0x10>;
	87	};
	88
	89	shdwc@fffffd10 {
	90	compatible = "atmel,at91sam9260-shdwc";
	91	reg = <0xfffffd10 0x10>;
	92	};
	93
e4541ff2 JCPV	94	pinctrl@fffff200 {
	95	#address-cells = <1>;
	96	#size-cells = <1>;
	97	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
	98	ranges = <0xfffff200 0xfffff200 0xa00>;
	99
5314ec8e JCPV	100	atmel,mux-mask = <
	101	/* A B */
	102	0xfffffffb 0xffffe07f /* pioA */
	103	0x0007ffff 0x39072fff /* pioB */
	104	0xffffffff 0x3ffffff8 /* pioC */
	105	0xfffffbff 0xffffffff /* pioD */
	106	0xffe00fff 0xfbfcff00 /* pioE */
	107	>;
	108
	109	/* shared pinctrl settings */
ec6754a7 JCPV	110	dbgu {
	111	pinctrl_dbgu: dbgu-0 {
	112	atmel,pins =
	113	<2 30 0x1 0x0 /* PC30 periph A */
	114	2 31 0x1 0x1>; /* PC31 periph with pullup */
	115	};
	116	};
	117
9e3129e9 JCPV	118	usart0 {
9e3129e9 JCPV	119	pinctrl_usart0: usart0-0 {
ec6754a7 JCPV	120	atmel,pins =
	121	<0 26 0x1 0x1 /* PA26 periph A with pullup */
	122	0 27 0x1 0x0>; /* PA27 periph A */
	123	};
	124
c58c0c5a	125	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	126	atmel,pins =
c58c0c5a JCPV	127	<0 28 0x1 0x0>; /* PA28 periph A */
	128	};
	129
	130	pinctrl_usart0_cts: usart0_cts-0 {
	131	atmel,pins =
	132	<0 29 0x1 0x0>; /* PA29 periph A */
ec6754a7 JCPV	133	};
	134	};
	135
9e3129e9 JCPV	136	usart1 {
9e3129e9 JCPV	137	pinctrl_usart1: usart1-0 {
ec6754a7 JCPV	138	atmel,pins =
	139	<3 0 0x1 0x1 /* PD0 periph A with pullup */
	140	3 1 0x1 0x0>; /* PD1 periph A */
	141	};
	142
c58c0c5a	143	pinctrl_usart1_rts: usart1_rts-0 {
ec6754a7	144	atmel,pins =
c58c0c5a JCPV	145	<3 7 0x2 0x0>; /* PD7 periph B */
	146	};
	147
	148	pinctrl_usart1_cts: usart1_cts-0 {
	149	atmel,pins =
	150	<3 8 0x2 0x0>; /* PD8 periph B */
ec6754a7 JCPV	151	};
	152	};
	153
9e3129e9 JCPV	154	usart2 {
9e3129e9 JCPV	155	pinctrl_usart2: usart2-0 {
ec6754a7 JCPV	156	atmel,pins =
	157	<3 2 0x1 0x1 /* PD2 periph A with pullup */
	158	3 3 0x1 0x0>; /* PD3 periph A */
	159	};
	160
c58c0c5a JCPV	161	pinctrl_usart2_rts: usart2_rts-0 {
	162	atmel,pins =
	163	<3 5 0x2 0x0>; /* PD5 periph B */
	164	};
	165
	166	pinctrl_usart2_cts: usart2_cts-0 {
ec6754a7	167	atmel,pins =
c58c0c5a	168	<4 6 0x2 0x0>; /* PD6 periph B */
ec6754a7 JCPV	169	};
ec6754a7 JCPV	170	};
5314ec8e	171
7a38d450 JCPV	172	nand {
	173	pinctrl_nand: nand-0 {
	174	atmel,pins =
	175	<0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
	176	3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
	177	};
	178	};
	179
d9b4fe83 JCPV	180	macb {
	181	pinctrl_macb_rmii: macb_rmii-0 {
	182	atmel,pins =
	183	<2 25 0x2 0x0 /* PC25 periph B */
	184	4 21 0x1 0x0 /* PE21 periph A */
	185	4 23 0x1 0x0 /* PE23 periph A */
	186	4 24 0x1 0x0 /* PE24 periph A */
	187	4 25 0x1 0x0 /* PE25 periph A */
	188	4 26 0x1 0x0 /* PE26 periph A */
	189	4 27 0x1 0x0 /* PE27 periph A */
	190	4 28 0x1 0x0 /* PE28 periph A */
	191	4 29 0x1 0x0 /* PE29 periph A */
	192	4 30 0x1 0x0>; /* PE30 periph A */
	193	};
	194
	195	pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
	196	atmel,pins =
	197	<2 20 0x2 0x0 /* PC20 periph B */
	198	2 21 0x2 0x0 /* PC21 periph B */
	199	2 22 0x2 0x0 /* PC22 periph B */
	200	2 23 0x2 0x0 /* PC23 periph B */
	201	2 24 0x2 0x0 /* PC24 periph B */
	202	2 25 0x2 0x0 /* PC25 periph B */
	203	2 27 0x2 0x0 /* PC27 periph B */
	204	4 22 0x2 0x0>; /* PE22 periph B */
	205	};
	206	};
	207
d4fe9ac7 JCPV	208	mmc0 {
	209	pinctrl_mmc0_clk: mmc0_clk-0 {
	210	atmel,pins =
	211	<0 12 0x1 0x0>; /* PA12 periph A */
	212	};
	213
	214	pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
	215	atmel,pins =
	216	<0 1 0x1 0x1 /* PA1 periph A with pullup */
	217	0 0 0x1 0x1>; /* PA0 periph A with pullup */
	218	};
	219
	220	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
	221	atmel,pins =
	222	<0 3 0x1 0x1 /* PA3 periph A with pullup */
	223	0 4 0x1 0x1 /* PA4 periph A with pullup */
	224	0 5 0x1 0x1>; /* PA5 periph A with pullup */
	225	};
	226
	227	pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
	228	atmel,pins =
	229	<0 16 0x1 0x1 /* PA16 periph A with pullup */
	230	0 17 0x1 0x1>; /* PA17 periph A with pullup */
	231	};
	232
	233	pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
	234	atmel,pins =
	235	<0 18 0x1 0x1 /* PA18 periph A with pullup */
	236	0 19 0x1 0x1 /* PA19 periph A with pullup */
	237	0 20 0x1 0x1>; /* PA20 periph A with pullup */
	238	};
	239	};
	240
	241	mmc1 {
	242	pinctrl_mmc1_clk: mmc1_clk-0 {
	243	atmel,pins =
	244	<0 6 0x1 0x0>; /* PA6 periph A */
	245	};
	246
	247	pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
	248	atmel,pins =
	249	<0 7 0x1 0x1 /* PA7 periph A with pullup */
	250	0 8 0x1 0x1>; /* PA8 periph A with pullup */
	251	};
	252
	253	pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
	254	atmel,pins =
	255	<0 9 0x1 0x1 /* PA9 periph A with pullup */
	256	0 10 0x1 0x1 /* PA10 periph A with pullup */
	257	0 11 0x1 0x1>; /* PA11 periph A with pullup */
	258	};
	259
	260	pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
	261	atmel,pins =
	262	<0 21 0x1 0x1 /* PA21 periph A with pullup */
	263	0 22 0x1 0x1>; /* PA22 periph A with pullup */
	264	};
	265
	266	pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
	267	atmel,pins =
	268	<0 23 0x1 0x1 /* PA23 periph A with pullup */
	269	0 24 0x1 0x1 /* PA24 periph A with pullup */
	270	0 25 0x1 0x1>; /* PA25 periph A with pullup */
	271	};
272	};
273
544ae6b2 BS	274	ssc0 {
	275	pinctrl_ssc0_tx: ssc0_tx-0 {
	276	atmel,pins =
	277	<1 0 0x2 0x0 /* PB0 periph B */
	278	1 1 0x2 0x0 /* PB1 periph B */
	279	1 2 0x2 0x0>; /* PB2 periph B */
	280	};
	281
	282	pinctrl_ssc0_rx: ssc0_rx-0 {
	283	atmel,pins =
	284	<1 3 0x2 0x0 /* PB3 periph B */
	285	1 4 0x2 0x0 /* PB4 periph B */
	286	1 5 0x2 0x0>; /* PB5 periph B */
	287	};
	288	};
	289
	290	ssc1 {
	291	pinctrl_ssc1_tx: ssc1_tx-0 {
	292	atmel,pins =
	293	<1 6 0x1 0x0 /* PB6 periph A */
	294	1 7 0x1 0x0 /* PB7 periph A */
	295	1 8 0x1 0x0>; /* PB8 periph A */
	296	};
	297
	298	pinctrl_ssc1_rx: ssc1_rx-0 {
	299	atmel,pins =
	300	<1 9 0x1 0x0 /* PB9 periph A */
	301	1 10 0x1 0x0 /* PB10 periph A */
	302	1 11 0x1 0x0>; /* PB11 periph A */
	303	};
	304	};
	305
e4541ff2 JCPV	306	pioA: gpio@fffff200 {
	307	compatible = "atmel,at91rm9200-gpio";
	308	reg = <0xfffff200 0x200>;
	309	interrupts = <2 4 1>;
	310	#gpio-cells = <2>;
	311	gpio-controller;
	312	interrupt-controller;
	313	#interrupt-cells = <2>;
	314	};
	315
	316	pioB: gpio@fffff400 {
	317	compatible = "atmel,at91rm9200-gpio";
	318	reg = <0xfffff400 0x200>;
	319	interrupts = <3 4 1>;
	320	#gpio-cells = <2>;
	321	gpio-controller;
	322	interrupt-controller;
	323	#interrupt-cells = <2>;
	324	};
	325
	326	pioC: gpio@fffff600 {
	327	compatible = "atmel,at91rm9200-gpio";
	328	reg = <0xfffff600 0x200>;
	329	interrupts = <4 4 1>;
	330	#gpio-cells = <2>;
	331	gpio-controller;
	332	interrupt-controller;
	333	#interrupt-cells = <2>;
	334	};
	335
	336	pioD: gpio@fffff800 {
	337	compatible = "atmel,at91rm9200-gpio";
	338	reg = <0xfffff800 0x200>;
	339	interrupts = <4 4 1>;
	340	#gpio-cells = <2>;
	341	gpio-controller;
	342	interrupt-controller;
	343	#interrupt-cells = <2>;
	344	};
	345
	346	pioE: gpio@fffffa00 {
	347	compatible = "atmel,at91rm9200-gpio";
	348	reg = <0xfffffa00 0x200>;
	349	interrupts = <4 4 1>;
	350	#gpio-cells = <2>;
	351	gpio-controller;
	352	interrupt-controller;
	353	#interrupt-cells = <2>;
5314ec8e	354	};
4abb3677 JCPV	355	};
	356
	357	dbgu: serial@ffffee00 {
	358	compatible = "atmel,at91sam9260-usart";
	359	reg = <0xffffee00 0x200>;
f8a073ee	360	interrupts = <1 4 7>;
ec6754a7 JCPV	361	pinctrl-names = "default";
ec6754a7 JCPV	362	pinctrl-0 = <&pinctrl_dbgu>;
4abb3677 JCPV	363	status = "disabled";
	364	};
	365
	366	usart0: serial@fff8c000 {
	367	compatible = "atmel,at91sam9260-usart";
	368	reg = <0xfff8c000 0x200>;
f8a073ee	369	interrupts = <7 4 5>;
4abb3677 JCPV	370	atmel,use-dma-rx;
4abb3677 JCPV	371	atmel,use-dma-tx;
ec6754a7	372	pinctrl-names = "default";
9e3129e9	373	pinctrl-0 = <&pinctrl_usart0>;
4abb3677 JCPV	374	status = "disabled";
	375	};
	376
	377	usart1: serial@fff90000 {
	378	compatible = "atmel,at91sam9260-usart";
	379	reg = <0xfff90000 0x200>;
f8a073ee	380	interrupts = <8 4 5>;
4abb3677 JCPV	381	atmel,use-dma-rx;
4abb3677 JCPV	382	atmel,use-dma-tx;
ec6754a7	383	pinctrl-names = "default";
9e3129e9	384	pinctrl-0 = <&pinctrl_usart1>;
4abb3677 JCPV	385	status = "disabled";
	386	};
	387
	388	usart2: serial@fff94000 {
	389	compatible = "atmel,at91sam9260-usart";
	390	reg = <0xfff94000 0x200>;
f8a073ee	391	interrupts = <9 4 5>;
4abb3677 JCPV	392	atmel,use-dma-rx;
4abb3677 JCPV	393	atmel,use-dma-tx;
ec6754a7	394	pinctrl-names = "default";
9e3129e9	395	pinctrl-0 = <&pinctrl_usart2>;
4abb3677 JCPV	396	status = "disabled";
	397	};
	398
099343c6 BS	399	ssc0: ssc@fff98000 {
	400	compatible = "atmel,at91rm9200-ssc";
	401	reg = <0xfff98000 0x4000>;
	402	interrupts = <16 4 5>;
544ae6b2 BS	403	pinctrl-names = "default";
544ae6b2 BS	404	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc	405	status = "disabled";
099343c6 BS	406	};
	407
	408	ssc1: ssc@fff9c000 {
	409	compatible = "atmel,at91rm9200-ssc";
	410	reg = <0xfff9c000 0x4000>;
	411	interrupts = <17 4 5>;
544ae6b2 BS	412	pinctrl-names = "default";
544ae6b2 BS	413	pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc	414	status = "disabled";
099343c6 BS	415	};
099343c6 BS	416
4abb3677 JCPV	417	macb0: ethernet@fffbc000 {
	418	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	419	reg = <0xfffbc000 0x100>;
f8a073ee	420	interrupts = <21 4 3>;
d9b4fe83 JCPV	421	pinctrl-names = "default";
d9b4fe83 JCPV	422	pinctrl-0 = <&pinctrl_macb_rmii>;
4abb3677 JCPV	423	status = "disabled";
	424	};
	425
	426	usb1: gadget@fff78000 {
	427	compatible = "atmel,at91rm9200-udc";
	428	reg = <0xfff78000 0x4000>;
f8a073ee	429	interrupts = <24 4 2>;
4abb3677 JCPV	430	status = "disabled";
4abb3677 JCPV	431	};
05dcd361 LD	432
	433	i2c0: i2c@fff88000 {
	434	compatible = "atmel,at91sam9263-i2c";
	435	reg = <0xfff88000 0x100>;
	436	interrupts = <13 4 6>;
	437	#address-cells = <1>;
	438	#size-cells = <0>;
	439	status = "disabled";
	440	};
9873137a LD	441
	442	mmc0: mmc@fff80000 {
	443	compatible = "atmel,hsmci";
	444	reg = <0xfff80000 0x600>;
	445	interrupts = <10 4 0>;
	446	#address-cells = <1>;
	447	#size-cells = <0>;
	448	status = "disabled";
	449	};
	450
	451	mmc1: mmc@fff84000 {
	452	compatible = "atmel,hsmci";
	453	reg = <0xfff84000 0x600>;
	454	interrupts = <11 4 0>;
	455	#address-cells = <1>;
	456	#size-cells = <0>;
	457	status = "disabled";
	458	};
db5b0ae0	459
7492e7ca FP	460	watchdog@fffffd40 {
	461	compatible = "atmel,at91sam9260-wdt";
	462	reg = <0xfffffd40 0x10>;
	463	status = "disabled";
	464	};
4abb3677 JCPV	465	};
	466
	467	nand0: nand@40000000 {
	468	compatible = "atmel,at91rm9200-nand";
	469	#address-cells = <1>;
	470	#size-cells = <1>;
	471	reg = <0x40000000 0x10000000
	472	0xffffe000 0x200
	473	>;
	474	atmel,nand-addr-offset = <21>;
	475	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	476	pinctrl-names = "default";
7a38d450 JCPV	477	pinctrl-0 = <&pinctrl_nand>;
4abb3677 JCPV	478	gpios = <&pioA 22 0
	479	&pioD 15 0
	480	0
	481	>;
	482	status = "disabled";
	483	};
	484
	485	usb0: ohci@00a00000 {
	486	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	487	reg = <0x00a00000 0x100000>;
f8a073ee	488	interrupts = <29 4 2>;
4abb3677 JCPV	489	status = "disabled";
	490	};
	491	};
	492
	493	i2c@0 {
	494	compatible = "i2c-gpio";
	495	gpios = <&pioB 4 0 /* sda */
	496	&pioB 5 0 /* scl */
	497	>;
	498	i2c-gpio,sda-open-drain;
	499	i2c-gpio,scl-open-drain;
	500	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	501	#address-cells = <1>;
	502	#size-cells = <0>;
	503	status = "disabled";
	504	};
	505	};