]>
Commit | Line | Data |
---|---|---|
5cb4e735 JCPV |
1 | /* |
2 | * at91sam9g20ek_2mmc.dts - Device Tree file for Atmel at91sam9g20ek 2 MMC board | |
3 | * | |
4 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
5 | * | |
6 | * Licensed under GPLv2. | |
7 | */ | |
8 | /dts-v1/; | |
6db64d29 | 9 | #include "at91sam9g20ek_common.dtsi" |
5cb4e735 JCPV |
10 | |
11 | / { | |
12 | model = "Atmel at91sam9g20ek 2 mmc"; | |
13 | compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9"; | |
14 | ||
4134a455 LD |
15 | ahb { |
16 | apb{ | |
17 | mmc0: mmc@fffa8000 { | |
199e2ede JCPV |
18 | /* clk already mux wuth slot0 */ |
19 | pinctrl-0 = < | |
20 | &pinctrl_board_mmc0_slot0 | |
21 | &pinctrl_mmc0_slot0_cmd_dat0 | |
22 | &pinctrl_mmc0_slot0_dat1_3>; | |
4134a455 LD |
23 | slot@0 { |
24 | reg = <0>; | |
25 | bus-width = <4>; | |
92f8629b | 26 | cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>; |
4134a455 LD |
27 | }; |
28 | }; | |
199e2ede JCPV |
29 | |
30 | pinctrl@fffff400 { | |
31 | mmc0_slot0 { | |
32 | pinctrl_board_mmc0_slot0: mmc0_slot0-board { | |
33 | atmel,pins = | |
c9d0f317 | 34 | <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */ |
199e2ede JCPV |
35 | }; |
36 | }; | |
37 | }; | |
4134a455 LD |
38 | }; |
39 | }; | |
40 | ||
5cb4e735 JCPV |
41 | leds { |
42 | compatible = "gpio-leds"; | |
43 | ||
44 | ds1 { | |
45 | label = "ds1"; | |
92f8629b | 46 | gpios = <&pioB 9 GPIO_ACTIVE_HIGH>; |
5cb4e735 JCPV |
47 | linux,default-trigger = "heartbeat"; |
48 | }; | |
49 | ||
50 | ds5 { | |
51 | label = "ds5"; | |
92f8629b | 52 | gpios = <&pioB 8 GPIO_ACTIVE_LOW>; |
5cb4e735 JCPV |
53 | }; |
54 | }; | |
55 | }; |