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[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / at91sam9g45.dtsi
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a636cd6c 1// SPDX-License-Identifier: GPL-2.0-or-later
49fe2ba3
NF		 2/*
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
4 * applies to AT91SAM9G45, AT91SAM9M10,
5 * AT91SAM9G46, AT91SAM9M11 SoC
6 *
7 * Copyright (C) 2011 Atmel,
8 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
49fe2ba3
NF		 9 */
10
d4ae89c8 11#include <dt-bindings/dma/at91.h>
c9d0f317 12#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 13#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 14#include <dt-bindings/gpio/gpio.h>
6f368c30 15#include <dt-bindings/clock/at91.h>
49fe2ba3
NF		 16
17/ {
abe60a3a
RH		 18 #address-cells = <1>;
19 #size-cells = <1>;
49fe2ba3
NF		 20 model = "Atmel AT91SAM9G45 family SoC";
21 compatible = "atmel,at91sam9g45";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 serial4 = &usart3;
21f81872
NF		 30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 gpio3 = &pioD;
34 gpio4 = &pioE;
3a61a5da
NF		 35 tcb0 = &tcb0;
36 tcb1 = &tcb1;
05dcd361
LD		 37 i2c0 = &i2c0;
38 i2c1 = &i2c1;
099343c6
BS		 39 ssc0 = &ssc0;
40 ssc1 = &ssc1;
f3ab0527 41 pwm0 = &pwm0;
49fe2ba3
NF		 42 };
43 cpus {
e757a6ee
LP		 44 #address-cells = <0>;
45 #size-cells = <0>;
46
47 cpu {
48 compatible = "arm,arm926ej-s";
49 device_type = "cpu";
49fe2ba3
NF		 50 };
51 };
52
dcce6ce8 53 memory {
abe60a3a 54 device_type = "memory";
49fe2ba3
NF		 55 reg = <0x70000000 0x10000000>;
56 };
57
6f368c30
AB		 58 clocks {
59 slow_xtal: slow_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64
65 main_xtal: main_xtal {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
69 };
70
71 adc_op_clk: adc_op_clk{
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <300000>;
75 };
76 };
77
8dccafaa 78 sram: sram@300000 {
f04660e4
AB		 79 compatible = "mmio-sram";
80 reg = <0x00300000 0x10000>;
81 };
82
49fe2ba3
NF		 83 ahb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 apb {
90 compatible = "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges;
94
95 aic: interrupt-controller@fffff000 {
f8a073ee 96 #interrupt-cells = <3>;
49fe2ba3
NF		 97 compatible = "atmel,at91rm9200-aic";
98 interrupt-controller;
49fe2ba3 99 reg = <0xfffff000 0x200>;
c6573943 100 atmel,external-irqs = <31>;
49fe2ba3
NF		 101 };
102
a7776ec6
JCPV		 103 ramc0: ramc@ffffe400 {
104 compatible = "atmel,at91sam9g45-ddramc";
1e165a7d 105 reg = <0xffffe400 0x200>;
464d6e18
NF		 106 clocks = <&ddrck>;
107 clock-names = "ddrck";
1e165a7d
MR		 108 };
109
110 ramc1: ramc@ffffe600 {
111 compatible = "atmel,at91sam9g45-ddramc";
112 reg = <0xffffe600 0x200>;
6f368c30
AB		 113 clocks = <&ddrck>;
114 clock-names = "ddrck";
a7776ec6
JCPV		 115 };
116
d9c41bf3
BB		 117 smc: smc@ffffe800 {
118 compatible = "atmel,at91sam9260-smc", "syscon";
119 reg = <0xffffe800 0x200>;
120 };
121
122 matrix: matrix@ffffea00 {
123 compatible = "atmel,at91sam9g45-matrix", "syscon";
124 reg = <0xffffea00 0x200>;
125 };
126
eb5e76ff 127 pmc: pmc@fffffc00 {
620f5033 128 compatible = "atmel,at91sam9g45-pmc", "syscon";
eb5e76ff 129 reg = <0xfffffc00 0x100>;
6f368c30
AB		 130 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
131 interrupt-controller;
132 #address-cells = <1>;
133 #size-cells = <0>;
134 #interrupt-cells = <1>;
135
136 main_osc: main_osc {
137 compatible = "atmel,at91rm9200-clk-main-osc";
138 #clock-cells = <0>;
139 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
140 clocks = <&main_xtal>;
141 };
142
143 main: mainck {
144 compatible = "atmel,at91rm9200-clk-main";
145 #clock-cells = <0>;
146 clocks = <&main_osc>;
147 };
148
149 plla: pllack {
150 compatible = "atmel,at91rm9200-clk-pll";
151 #clock-cells = <0>;
152 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
153 clocks = <&main>;
154 reg = <0>;
155 atmel,clk-input-range = <2000000 32000000>;
156 #atmel,pll-clk-output-range-cells = <4>;
157 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
158 695000000 750000000 1 0
159 645000000 700000000 2 0
160 595000000 650000000 3 0
161 545000000 600000000 0 1
162 495000000 555000000 1 1
163 445000000 500000000 2 1
164 400000000 450000000 3 1>;
165 };
166
167 plladiv: plladivck {
168 compatible = "atmel,at91sam9x5-clk-plldiv";
169 #clock-cells = <0>;
170 clocks = <&plla>;
171 };
172
173 utmi: utmick {
174 compatible = "atmel,at91sam9x5-clk-utmi";
175 #clock-cells = <0>;
176 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
177 clocks = <&main>;
178 };
179
180 mck: masterck {
181 compatible = "atmel,at91rm9200-clk-master";
182 #clock-cells = <0>;
183 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
97735da4 184 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
6f368c30
AB		 185 atmel,clk-output-range = <0 133333333>;
186 atmel,clk-divisors = <1 2 4 3>;
187 };
188
189 usb: usbck {
190 compatible = "atmel,at91sam9x5-clk-usb";
191 #clock-cells = <0>;
192 clocks = <&plladiv>, <&utmi>;
193 };
194
195 prog: progck {
196 compatible = "atmel,at91sam9g45-clk-programmable";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 interrupt-parent = <&pmc>;
97735da4 200 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
6f368c30
AB		 201
202 prog0: prog0 {
203 #clock-cells = <0>;
204 reg = <0>;
205 interrupts = <AT91_PMC_PCKRDY(0)>;
206 };
207
208 prog1: prog1 {
209 #clock-cells = <0>;
210 reg = <1>;
211 interrupts = <AT91_PMC_PCKRDY(1)>;
212 };
213 };
214
215 systemck {
216 compatible = "atmel,at91rm9200-clk-system";
217 #address-cells = <1>;
218 #size-cells = <0>;
219
220 ddrck: ddrck {
221 #clock-cells = <0>;
222 reg = <2>;
223 clocks = <&mck>;
224 };
225
226 uhpck: uhpck {
227 #clock-cells = <0>;
228 reg = <6>;
229 clocks = <&usb>;
230 };
231
232 pck0: pck0 {
233 #clock-cells = <0>;
234 reg = <8>;
235 clocks = <&prog0>;
236 };
237
238 pck1: pck1 {
239 #clock-cells = <0>;
240 reg = <9>;
241 clocks = <&prog1>;
242 };
243 };
244
245 periphck {
246 compatible = "atmel,at91rm9200-clk-peripheral";
247 #address-cells = <1>;
248 #size-cells = <0>;
249 clocks = <&mck>;
250
251 pioA_clk: pioA_clk {
252 #clock-cells = <0>;
253 reg = <2>;
254 };
255
256 pioB_clk: pioB_clk {
257 #clock-cells = <0>;
258 reg = <3>;
259 };
260
261 pioC_clk: pioC_clk {
262 #clock-cells = <0>;
263 reg = <4>;
264 };
265
266 pioDE_clk: pioDE_clk {
267 #clock-cells = <0>;
268 reg = <5>;
269 };
270
271 trng_clk: trng_clk {
272 #clock-cells = <0>;
273 reg = <6>;
274 };
275
276 usart0_clk: usart0_clk {
277 #clock-cells = <0>;
278 reg = <7>;
279 };
280
281 usart1_clk: usart1_clk {
282 #clock-cells = <0>;
283 reg = <8>;
284 };
285
286 usart2_clk: usart2_clk {
287 #clock-cells = <0>;
288 reg = <9>;
289 };
290
291 usart3_clk: usart3_clk {
292 #clock-cells = <0>;
293 reg = <10>;
294 };
295
296 mci0_clk: mci0_clk {
297 #clock-cells = <0>;
298 reg = <11>;
299 };
300
301 twi0_clk: twi0_clk {
302 #clock-cells = <0>;
303 reg = <12>;
304 };
305
306 twi1_clk: twi1_clk {
307 #clock-cells = <0>;
308 reg = <13>;
309 };
310
311 spi0_clk: spi0_clk {
312 #clock-cells = <0>;
313 reg = <14>;
314 };
315
316 spi1_clk: spi1_clk {
317 #clock-cells = <0>;
318 reg = <15>;
319 };
320
321 ssc0_clk: ssc0_clk {
322 #clock-cells = <0>;
323 reg = <16>;
324 };
325
326 ssc1_clk: ssc1_clk {
327 #clock-cells = <0>;
328 reg = <17>;
329 };
330
331 tcb0_clk: tcb0_clk {
332 #clock-cells = <0>;
333 reg = <18>;
334 };
335
336 pwm_clk: pwm_clk {
337 #clock-cells = <0>;
338 reg = <19>;
339 };
340
341 adc_clk: adc_clk {
342 #clock-cells = <0>;
343 reg = <20>;
344 };
345
346 dma0_clk: dma0_clk {
347 #clock-cells = <0>;
348 reg = <21>;
349 };
350
351 uhphs_clk: uhphs_clk {
352 #clock-cells = <0>;
353 reg = <22>;
354 };
355
356 lcd_clk: lcd_clk {
357 #clock-cells = <0>;
358 reg = <23>;
359 };
360
361 ac97_clk: ac97_clk {
362 #clock-cells = <0>;
363 reg = <24>;
364 };
365
366 macb0_clk: macb0_clk {
367 #clock-cells = <0>;
368 reg = <25>;
369 };
370
371 isi_clk: isi_clk {
372 #clock-cells = <0>;
373 reg = <26>;
374 };
375
376 udphs_clk: udphs_clk {
377 #clock-cells = <0>;
378 reg = <27>;
379 };
380
381 aestdessha_clk: aestdessha_clk {
382 #clock-cells = <0>;
383 reg = <28>;
384 };
385
386 mci1_clk: mci1_clk {
387 #clock-cells = <0>;
388 reg = <29>;
389 };
390
391 vdec_clk: vdec_clk {
392 #clock-cells = <0>;
393 reg = <30>;
394 };
395 };
eb5e76ff
JCPV		 396 };
397
c8082d34
JCPV		 398 rstc@fffffd00 {
399 compatible = "atmel,at91sam9g45-rstc";
400 reg = <0xfffffd00 0x10>;
6b271792 401 clocks = <&clk32k>;
c8082d34
JCPV		 402 };
403
23fa648f
JCPV		 404 pit: timer@fffffd30 {
405 compatible = "atmel,at91sam9260-pit";
406 reg = <0xfffffd30 0xf>;
5e8b3bc3 407 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
6f368c30 408 clocks = <&mck>;
23fa648f
JCPV		 409 };
410
3a61a5da 411
82015c4e
JCPV		 412 shdwc@fffffd10 {
413 compatible = "atmel,at91sam9rl-shdwc";
414 reg = <0xfffffd10 0x10>;
6b271792 415 clocks = <&clk32k>;
82015c4e
JCPV		 416 };
417
3a61a5da 418 tcb0: timer@fff7c000 {
b0492361
AB		 419 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
420 #address-cells = <1>;
421 #size-cells = <0>;
3a61a5da 422 reg = <0xfff7c000 0x100>;
5e8b3bc3 423 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
6b271792
AB		 424 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
425 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
3a61a5da
NF		 426 };
427
428 tcb1: timer@fffd4000 {
b0492361
AB		 429 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
430 #address-cells = <1>;
431 #size-cells = <0>;
3a61a5da 432 reg = <0xfffd4000 0x100>;
5e8b3bc3 433 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
6b271792
AB		 434 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
435 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
3a61a5da
NF		 436 };
437
49fe2ba3
NF		 438 dma: dma-controller@ffffec00 {
439 compatible = "atmel,at91sam9g45-dma";
440 reg = <0xffffec00 0x200>;
5e8b3bc3 441 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 442 #dma-cells = <2>;
6f368c30
AB		 443 clocks = <&dma0_clk>;
444 clock-names = "dma_clk";
49fe2ba3
NF		 445 };
446
e4541ff2
JCPV		 447 pinctrl@fffff200 {
448 #address-cells = <1>;
449 #size-cells = <1>;
450 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
451 ranges = <0xfffff200 0xfffff200 0xa00>;
452
5314ec8e
JCPV		 453 atmel,mux-mask = <
454 /* A B */
455 0xffffffff 0xffc003ff /* pioA */
456 0xffffffff 0x800f8f00 /* pioB */
457 0xffffffff 0x00000e00 /* pioC */
458 0xffffffff 0xff0c1381 /* pioD */
459 0xffffffff 0x81ffff81 /* pioE */
460 >;
461
462 /* shared pinctrl settings */
2b17939d
DR		 463 ac97 {
464 pinctrl_ac97: ac97-0 {
465 atmel,pins =
466 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97RX */
467 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97TX */
468 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97FS */
469 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* AC97CK */
470 };
471 };
472
72e6caca
AB		 473 adc0 {
474 pinctrl_adc0_adtrg: adc0_adtrg {
475 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
476 };
477 pinctrl_adc0_ad0: adc0_ad0 {
478 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
479 };
480 pinctrl_adc0_ad1: adc0_ad1 {
481 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
482 };
483 pinctrl_adc0_ad2: adc0_ad2 {
484 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
485 };
486 pinctrl_adc0_ad3: adc0_ad3 {
487 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
488 };
489 pinctrl_adc0_ad4: adc0_ad4 {
490 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
491 };
492 pinctrl_adc0_ad5: adc0_ad5 {
493 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
494 };
495 pinctrl_adc0_ad6: adc0_ad6 {
496 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
497 };
498 pinctrl_adc0_ad7: adc0_ad7 {
499 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
500 };
501 };
502
ec6754a7
JCPV		 503 dbgu {
504 pinctrl_dbgu: dbgu-0 {
505 atmel,pins =
138c2b2f
SR		 506 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
507 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
ec6754a7
JCPV		 508 };
509 };
510
cd127e1d
LD		 511 i2c0 {
512 pinctrl_i2c0: i2c0-0 {
513 atmel,pins =
514 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
515 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
516 };
517 };
518
519 i2c1 {
520 pinctrl_i2c1: i2c1-0 {
521 atmel,pins =
522 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
523 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
524 };
525 };
526
accda273 527 isi {
917cdc5f
JW		 528 pinctrl_isi_data_0_7: isi-0-data-0-7 {
529 atmel,pins =
530 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
531 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
532 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
533 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
534 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
535 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
536 AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
537 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
538 AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
539 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
540 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
541 };
542
543 pinctrl_isi_data_8_9: isi-0-data-8-9 {
544 atmel,pins =
545 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
546 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
547 };
548
549 pinctrl_isi_data_10_11: isi-0-data-10-11 {
550 atmel,pins =
551 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
552 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
accda273
BB		 553 };
554 };
555
9e3129e9
JCPV		 556 usart0 {
557 pinctrl_usart0: usart0-0 {
ec6754a7 558 atmel,pins =
5e04822f
PR		 559 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
560 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 561 };
562
c58c0c5a 563 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 564 atmel,pins =
c9d0f317 565 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
c58c0c5a
JCPV		 566 };
567
568 pinctrl_usart0_cts: usart0_cts-0 {
569 atmel,pins =
c9d0f317 570 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
ec6754a7
JCPV		 571 };
572 };
573
10af10db 574 usart1 {
9e3129e9 575 pinctrl_usart1: usart1-0 {
ec6754a7 576 atmel,pins =
5e04822f
PR		 577 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
578 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 579 };
580
c58c0c5a
JCPV		 581 pinctrl_usart1_rts: usart1_rts-0 {
582 atmel,pins =
c9d0f317 583 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
c58c0c5a
JCPV		 584 };
585
586 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 587 atmel,pins =
c9d0f317 588 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
ec6754a7
JCPV		 589 };
590 };
591
9e3129e9
JCPV		 592 usart2 {
593 pinctrl_usart2: usart2-0 {
ec6754a7 594 atmel,pins =
5e04822f
PR		 595 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 597 };
598
c58c0c5a 599 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 600 atmel,pins =
c9d0f317 601 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
c58c0c5a
JCPV		 602 };
603
604 pinctrl_usart2_cts: usart2_cts-0 {
605 atmel,pins =
c9d0f317 606 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
ec6754a7
JCPV		 607 };
608 };
609
9e3129e9
JCPV		 610 usart3 {
611 pinctrl_usart3: usart3-0 {
ec6754a7 612 atmel,pins =
5e04822f
PR		 613 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
614 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 615 };
616
c58c0c5a
JCPV		 617 pinctrl_usart3_rts: usart3_rts-0 {
618 atmel,pins =
c9d0f317 619 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
c58c0c5a
JCPV		 620 };
621
622 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 623 atmel,pins =
c9d0f317 624 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
ec6754a7
JCPV		 625 };
626 };
5314ec8e 627
7a38d450 628 nand {
1004a297 629 pinctrl_nand_rb: nand-rb-0 {
7a38d450 630 atmel,pins =
1004a297
BB		 631 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
632 };
633
634 pinctrl_nand_cs: nand-cs-0 {
635 atmel,pins =
636 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
7a38d450
JCPV		 637 };
638 };
639
d9b4fe83
JCPV		 640 macb {
641 pinctrl_macb_rmii: macb_rmii-0 {
642 atmel,pins =
c9d0f317
JCPV		 643 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
644 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
645 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
646 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
647 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
648 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
649 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
650 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
651 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
652 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
d9b4fe83
JCPV		 653 };
654
655 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
656 atmel,pins =
c9d0f317
JCPV		 657 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
658 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
659 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
660 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
661 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
662 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
663 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
664 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
d9b4fe83
JCPV		 665 };
666 };
667
d4fe9ac7
JCPV		 668 mmc0 {
669 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
670 atmel,pins =
c9d0f317
JCPV		 671 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
672 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
673 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
d4fe9ac7
JCPV		 674 };
675
676 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
677 atmel,pins =
c9d0f317
JCPV		 678 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
679 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
680 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7
JCPV		 681 };
682
683 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
684 atmel,pins =
c9d0f317
JCPV		 685 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
686 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
687 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
688 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
d4fe9ac7
JCPV		 689 };
690 };
691
692 mmc1 {
693 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
694 atmel,pins =
c9d0f317
JCPV		 695 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
696 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
697 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
d4fe9ac7
JCPV		 698 };
699
700 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
701 atmel,pins =
c9d0f317
JCPV		 702 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
703 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
704 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
d4fe9ac7
JCPV		 705 };
706
707 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
708 atmel,pins =
c9d0f317
JCPV		 709 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
710 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
711 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
712 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
d4fe9ac7
JCPV		 713 };
714 };
715
544ae6b2
BS		 716 ssc0 {
717 pinctrl_ssc0_tx: ssc0_tx-0 {
718 atmel,pins =
c9d0f317
JCPV		 719 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
720 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
721 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
544ae6b2
BS		 722 };
723
724 pinctrl_ssc0_rx: ssc0_rx-0 {
725 atmel,pins =
c9d0f317
JCPV		 726 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
727 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
728 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
544ae6b2
BS		 729 };
730 };
731
732 ssc1 {
733 pinctrl_ssc1_tx: ssc1_tx-0 {
734 atmel,pins =
c9d0f317
JCPV		 735 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
736 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
737 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
544ae6b2
BS		 738 };
739
740 pinctrl_ssc1_rx: ssc1_rx-0 {
741 atmel,pins =
c9d0f317
JCPV		 742 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
743 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
744 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
544ae6b2
BS		 745 };
746 };
747
a68b728f
WY		 748 spi0 {
749 pinctrl_spi0: spi0-0 {
750 atmel,pins =
c9d0f317
JCPV		 751 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
752 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
753 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
a68b728f
WY		 754 };
755 };
756
757 spi1 {
758 pinctrl_spi1: spi1-0 {
759 atmel,pins =
c9d0f317
JCPV		 760 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
761 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
762 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
a68b728f
WY		 763 };
764 };
765
028633c2
BB		 766 tcb0 {
767 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
768 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
769 };
770
771 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
772 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
773 };
774
775 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
776 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
777 };
778
779 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
780 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
781 };
782
783 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
784 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
785 };
786
787 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
788 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
789 };
790
791 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
792 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
793 };
794
795 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
796 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
797 };
798
799 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
800 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
801 };
802 };
803
804 tcb1 {
805 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
806 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
807 };
808
809 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
810 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
811 };
812
813 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
814 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
815 };
816
817 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
818 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
819 };
820
821 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
822 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
823 };
824
825 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
826 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
827 };
828
829 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
830 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
831 };
832
833 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
834 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
835 };
836
837 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
838 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
839 };
840 };
841
ddee65b3
JCPV		 842 fb {
843 pinctrl_fb: fb-0 {
844 atmel,pins =
845 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
846 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
847 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
848 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
849 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
850 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
851 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
852 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
853 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
854 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
855 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
856 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
857 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
858 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
859 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
860 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
861 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
862 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
863 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
864 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
865 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
866 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
867 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
868 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
869 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
870 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
871 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
872 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
873 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
874 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
875 };
876 };
877
e4541ff2
JCPV		 878 pioA: gpio@fffff200 {
879 compatible = "atmel,at91rm9200-gpio";
880 reg = <0xfffff200 0x200>;
5e8b3bc3 881 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 882 #gpio-cells = <2>;
883 gpio-controller;
884 interrupt-controller;
885 #interrupt-cells = <2>;
6f368c30 886 clocks = <&pioA_clk>;
e4541ff2
JCPV		 887 };
888
889 pioB: gpio@fffff400 {
890 compatible = "atmel,at91rm9200-gpio";
891 reg = <0xfffff400 0x200>;
5e8b3bc3 892 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 893 #gpio-cells = <2>;
894 gpio-controller;
895 interrupt-controller;
896 #interrupt-cells = <2>;
6f368c30 897 clocks = <&pioB_clk>;
e4541ff2
JCPV		 898 };
899
900 pioC: gpio@fffff600 {
901 compatible = "atmel,at91rm9200-gpio";
902 reg = <0xfffff600 0x200>;
5e8b3bc3 903 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 904 #gpio-cells = <2>;
905 gpio-controller;
906 interrupt-controller;
907 #interrupt-cells = <2>;
6f368c30 908 clocks = <&pioC_clk>;
e4541ff2
JCPV		 909 };
910
911 pioD: gpio@fffff800 {
912 compatible = "atmel,at91rm9200-gpio";
913 reg = <0xfffff800 0x200>;
5e8b3bc3 914 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 915 #gpio-cells = <2>;
916 gpio-controller;
917 interrupt-controller;
918 #interrupt-cells = <2>;
6f368c30 919 clocks = <&pioDE_clk>;
e4541ff2
JCPV		 920 };
921
922 pioE: gpio@fffffa00 {
923 compatible = "atmel,at91rm9200-gpio";
924 reg = <0xfffffa00 0x200>;
5e8b3bc3 925 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 926 #gpio-cells = <2>;
927 gpio-controller;
928 interrupt-controller;
929 #interrupt-cells = <2>;
6f368c30 930 clocks = <&pioDE_clk>;
e4541ff2 931 };
21f81872
NF		 932 };
933
49fe2ba3 934 dbgu: serial@ffffee00 {
8c07f664 935 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
49fe2ba3 936 reg = <0xffffee00 0x200>;
5e8b3bc3 937 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 938 pinctrl-names = "default";
939 pinctrl-0 = <&pinctrl_dbgu>;
6f368c30
AB		 940 clocks = <&mck>;
941 clock-names = "usart";
49fe2ba3
NF		 942 status = "disabled";
943 };
944
945 usart0: serial@fff8c000 {
946 compatible = "atmel,at91sam9260-usart";
947 reg = <0xfff8c000 0x200>;
5e8b3bc3 948 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 949 atmel,use-dma-rx;
950 atmel,use-dma-tx;
ec6754a7 951 pinctrl-names = "default";
9e3129e9 952 pinctrl-0 = <&pinctrl_usart0>;
6f368c30
AB		 953 clocks = <&usart0_clk>;
954 clock-names = "usart";
49fe2ba3
NF		 955 status = "disabled";
956 };
957
958 usart1: serial@fff90000 {
959 compatible = "atmel,at91sam9260-usart";
960 reg = <0xfff90000 0x200>;
5e8b3bc3 961 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 962 atmel,use-dma-rx;
963 atmel,use-dma-tx;
ec6754a7 964 pinctrl-names = "default";
9e3129e9 965 pinctrl-0 = <&pinctrl_usart1>;
6f368c30
AB		 966 clocks = <&usart1_clk>;
967 clock-names = "usart";
49fe2ba3
NF		 968 status = "disabled";
969 };
970
971 usart2: serial@fff94000 {
972 compatible = "atmel,at91sam9260-usart";
973 reg = <0xfff94000 0x200>;
5e8b3bc3 974 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 975 atmel,use-dma-rx;
976 atmel,use-dma-tx;
ec6754a7 977 pinctrl-names = "default";
9e3129e9 978 pinctrl-0 = <&pinctrl_usart2>;
6f368c30
AB		 979 clocks = <&usart2_clk>;
980 clock-names = "usart";
49fe2ba3
NF		 981 status = "disabled";
982 };
983
984 usart3: serial@fff98000 {
985 compatible = "atmel,at91sam9260-usart";
986 reg = <0xfff98000 0x200>;
5e8b3bc3 987 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 988 atmel,use-dma-rx;
989 atmel,use-dma-tx;
ec6754a7 990 pinctrl-names = "default";
9e3129e9 991 pinctrl-0 = <&pinctrl_usart3>;
6f368c30
AB		 992 clocks = <&usart3_clk>;
993 clock-names = "usart";
49fe2ba3
NF		 994 status = "disabled";
995 };
0d4f99d8
NF		 996
997 macb0: ethernet@fffbc000 {
9c348d45 998 compatible = "cdns,at91sam9260-macb", "cdns,macb";
0d4f99d8 999 reg = <0xfffbc000 0x100>;
5e8b3bc3 1000 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 1001 pinctrl-names = "default";
1002 pinctrl-0 = <&pinctrl_macb_rmii>;
6f368c30
AB		 1003 clocks = <&macb0_clk>, <&macb0_clk>;
1004 clock-names = "hclk", "pclk";
0d4f99d8
NF		 1005 status = "disabled";
1006 };
93b298ba 1007
3e16d322
BB		 1008 trng@fffcc000 {
1009 compatible = "atmel,at91sam9g45-trng";
0e230593 1010 reg = <0xfffcc000 0x100>;
3e16d322
BB		 1011 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
1012 clocks = <&trng_clk>;
1013 };
1014
05dcd361
LD		 1015 i2c0: i2c@fff84000 {
1016 compatible = "atmel,at91sam9g10-i2c";
1017 reg = <0xfff84000 0x100>;
5e8b3bc3 1018 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 1019 pinctrl-names = "default";
1020 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 1021 #address-cells = <1>;
1022 #size-cells = <0>;
6f368c30 1023 clocks = <&twi0_clk>;
05dcd361
LD		 1024 status = "disabled";
1025 };
1026
1027 i2c1: i2c@fff88000 {
1028 compatible = "atmel,at91sam9g10-i2c";
1029 reg = <0xfff88000 0x100>;
5e8b3bc3 1030 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 1031 pinctrl-names = "default";
1032 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 1033 #address-cells = <1>;
1034 #size-cells = <0>;
6f368c30 1035 clocks = <&twi1_clk>;
05dcd361
LD		 1036 status = "disabled";
1037 };
1038
099343c6
BS		 1039 ssc0: ssc@fff9c000 {
1040 compatible = "atmel,at91sam9g45-ssc";
1041 reg = <0xfff9c000 0x4000>;
5e8b3bc3 1042 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 1043 pinctrl-names = "default";
1044 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
6f368c30
AB		 1045 clocks = <&ssc0_clk>;
1046 clock-names = "pclk";
315656bc 1047 status = "disabled";
099343c6
BS		 1048 };
1049
1050 ssc1: ssc@fffa0000 {
1051 compatible = "atmel,at91sam9g45-ssc";
1052 reg = <0xfffa0000 0x4000>;
5e8b3bc3 1053 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 1054 pinctrl-names = "default";
1055 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
6f368c30
AB		 1056 clocks = <&ssc1_clk>;
1057 clock-names = "pclk";
315656bc 1058 status = "disabled";
099343c6
BS		 1059 };
1060
2b17939d
DR		 1061 ac97: sound@fffac000 {
1062 compatible = "atmel,at91sam9263-ac97c";
1063 reg = <0xfffac000 0x4000>;
1064 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
1065 pinctrl-names = "default";
1066 pinctrl-0 = <&pinctrl_ac97>;
1067 clocks = <&ac97_clk>;
1068 clock-names = "ac97_clk";
1069 status = "disabled";
1070 };
1071
93b298ba 1072 adc0: adc@fffb0000 {
e1abeb72
AB		 1073 #address-cells = <1>;
1074 #size-cells = <0>;
72e6caca 1075 compatible = "atmel,at91sam9g45-adc";
93b298ba 1076 reg = <0xfffb0000 0x100>;
5e8b3bc3 1077 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
6f368c30
AB		 1078 clocks = <&adc_clk>, <&adc_op_clk>;
1079 clock-names = "adc_clk", "adc_op_clk";
93b298ba
MR		 1080 atmel,adc-channels-used = <0xff>;
1081 atmel,adc-vref = <3300>;
93b298ba 1082 atmel,adc-startup-time = <40>;
4b50da65
LD		 1083 atmel,adc-res = <8 10>;
1084 atmel,adc-res-names = "lowres", "highres";
1085 atmel,adc-use-res = "highres";
93b298ba 1086
c94afa13 1087 trigger0 {
93b298ba
MR		 1088 trigger-name = "external-rising";
1089 trigger-value = <0x1>;
1090 trigger-external;
1091 };
c94afa13 1092 trigger1 {
93b298ba
MR		 1093 trigger-name = "external-falling";
1094 trigger-value = <0x2>;
1095 trigger-external;
1096 };
1097
c94afa13 1098 trigger2 {
93b298ba
MR		 1099 trigger-name = "external-any";
1100 trigger-value = <0x3>;
1101 trigger-external;
1102 };
1103
c94afa13 1104 trigger3 {
93b298ba
MR		 1105 trigger-name = "continuous";
1106 trigger-value = <0x6>;
1107 };
1108 };
9873137a 1109
accda273
BB		 1110 isi@fffb4000 {
1111 compatible = "atmel,at91sam9g45-isi";
1112 reg = <0xfffb4000 0x4000>;
1113 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1114 clocks = <&isi_clk>;
1115 clock-names = "isi_clk";
accda273 1116 status = "disabled";
917cdc5f
JW		 1117 port {
1118 #address-cells = <1>;
1119 #size-cells = <0>;
1120 };
accda273
BB		 1121 };
1122
f3ab0527
BS		 1123 pwm0: pwm@fffb8000 {
1124 compatible = "atmel,at91sam9rl-pwm";
1125 reg = <0xfffb8000 0x300>;
1126 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1127 #pwm-cells = <3>;
6f368c30 1128 clocks = <&pwm_clk>;
f3ab0527
BS		 1129 status = "disabled";
1130 };
1131
9873137a
LD		 1132 mmc0: mmc@fff80000 {
1133 compatible = "atmel,hsmci";
1134 reg = <0xfff80000 0x600>;
5e8b3bc3 1135 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 1136 pinctrl-names = "default";
d4ae89c8 1137 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 1138 dma-names = "rxtx";
9873137a
LD		 1139 #address-cells = <1>;
1140 #size-cells = <0>;
6f368c30
AB		 1141 clocks = <&mci0_clk>;
1142 clock-names = "mci_clk";
9873137a
LD		 1143 status = "disabled";
1144 };
1145
1146 mmc1: mmc@fffd0000 {
1147 compatible = "atmel,hsmci";
1148 reg = <0xfffd0000 0x600>;
5e8b3bc3 1149 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 1150 pinctrl-names = "default";
d4ae89c8 1151 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
05c1bc97 1152 dma-names = "rxtx";
9873137a
LD		 1153 #address-cells = <1>;
1154 #size-cells = <0>;
6f368c30
AB		 1155 clocks = <&mci1_clk>;
1156 clock-names = "mci_clk";
9873137a 1157 status = "disabled";
db5b0ae0
LT		 1158 };
1159
7492e7ca
FP		 1160 watchdog@fffffd40 {
1161 compatible = "atmel,at91sam9260-wdt";
1162 reg = <0xfffffd40 0x10>;
fe46aa67 1163 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
6b271792 1164 clocks = <&clk32k>;
fe46aa67
BB		 1165 atmel,watchdog-type = "hardware";
1166 atmel,reset-type = "all";
1167 atmel,dbg-halt;
7492e7ca 1168 status = "disabled";
d50f88a0
RG		 1169 };
1170
1171 spi0: spi@fffa4000 {
1172 #address-cells = <1>;
1173 #size-cells = <0>;
1174 compatible = "atmel,at91rm9200-spi";
1175 reg = <0xfffa4000 0x200>;
1176 interrupts = <14 4 3>;
a68b728f
WY		 1177 pinctrl-names = "default";
1178 pinctrl-0 = <&pinctrl_spi0>;
6f368c30
AB		 1179 clocks = <&spi0_clk>;
1180 clock-names = "spi_clk";
d50f88a0
RG		 1181 status = "disabled";
1182 };
1183
1184 spi1: spi@fffa8000 {
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1187 compatible = "atmel,at91rm9200-spi";
1188 reg = <0xfffa8000 0x200>;
1189 interrupts = <15 4 3>;
a68b728f
WY		 1190 pinctrl-names = "default";
1191 pinctrl-0 = <&pinctrl_spi1>;
6f368c30
AB		 1192 clocks = <&spi1_clk>;
1193 clock-names = "spi_clk";
d50f88a0 1194 status = "disabled";
9873137a 1195 };
3cba498f
JCPV		 1196
1197 usb2: gadget@fff78000 {
1198 #address-cells = <1>;
1199 #size-cells = <0>;
6540165c 1200 compatible = "atmel,at91sam9g45-udc";
3cba498f
JCPV		 1201 reg = <0x00600000 0x80000
1202 0xfff78000 0x400>;
1203 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
6f368c30
AB		 1204 clocks = <&udphs_clk>, <&utmi>;
1205 clock-names = "pclk", "hclk";
3cba498f
JCPV		 1206 status = "disabled";
1207
c32b5bcf 1208 ep@0 {
3cba498f
JCPV		 1209 reg = <0>;
1210 atmel,fifo-size = <64>;
1211 atmel,nb-banks = <1>;
1212 };
1213
c32b5bcf 1214 ep@1 {
3cba498f
JCPV		 1215 reg = <1>;
1216 atmel,fifo-size = <1024>;
1217 atmel,nb-banks = <2>;
1218 atmel,can-dma;
1219 atmel,can-isoc;
1220 };
1221
c32b5bcf 1222 ep@2 {
3cba498f
JCPV		 1223 reg = <2>;
1224 atmel,fifo-size = <1024>;
1225 atmel,nb-banks = <2>;
1226 atmel,can-dma;
1227 atmel,can-isoc;
1228 };
1229
c32b5bcf 1230 ep@3 {
3cba498f
JCPV		 1231 reg = <3>;
1232 atmel,fifo-size = <1024>;
1233 atmel,nb-banks = <3>;
1234 atmel,can-dma;
1235 };
1236
c32b5bcf 1237 ep@4 {
3cba498f
JCPV		 1238 reg = <4>;
1239 atmel,fifo-size = <1024>;
1240 atmel,nb-banks = <3>;
1241 atmel,can-dma;
1242 };
1243
c32b5bcf 1244 ep@5 {
3cba498f
JCPV		 1245 reg = <5>;
1246 atmel,fifo-size = <1024>;
1247 atmel,nb-banks = <3>;
1248 atmel,can-dma;
1249 atmel,can-isoc;
1250 };
1251
c32b5bcf 1252 ep@6 {
3cba498f
JCPV		 1253 reg = <6>;
1254 atmel,fifo-size = <1024>;
1255 atmel,nb-banks = <3>;
1256 atmel,can-dma;
1257 atmel,can-isoc;
1258 };
1259 };
97735da4 1260
01048f10 1261 clk32k: sckc@fffffd50 {
97735da4
BB		 1262 compatible = "atmel,at91sam9x5-sckc";
1263 reg = <0xfffffd50 0x4>;
01048f10
AB		 1264 clocks = <&slow_xtal>;
1265 #clock-cells = <0>;
97735da4 1266 };
4dd7933a 1267
9b5a0675
BB		 1268 rtc@fffffd20 {
1269 compatible = "atmel,at91sam9260-rtt";
1270 reg = <0xfffffd20 0x10>;
1271 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1272 clocks = <&clk32k>;
1273 status = "disabled";
1274 };
1275
4dd7933a
EL		 1276 rtc@fffffdb0 {
1277 compatible = "atmel,at91rm9200-rtc";
1278 reg = <0xfffffdb0 0x30>;
1279 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
6b271792 1280 clocks = <&clk32k>;
4dd7933a
EL		 1281 status = "disabled";
1282 };
1ff3beca
BB		 1283
1284 gpbr: syscon@fffffd60 {
1285 compatible = "atmel,at91sam9260-gpbr", "syscon";
1286 reg = <0xfffffd60 0x10>;
1287 status = "disabled";
1288 };
49fe2ba3 1289 };
d6a01661 1290
ed4ced0c 1291 fb0: fb@500000 {
ddee65b3
JCPV		 1292 compatible = "atmel,at91sam9g45-lcdc";
1293 reg = <0x00500000 0x1000>;
1294 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1295 pinctrl-names = "default";
1296 pinctrl-0 = <&pinctrl_fb>;
6f368c30
AB		 1297 clocks = <&lcd_clk>, <&lcd_clk>;
1298 clock-names = "hclk", "lcdc_clk";
ddee65b3
JCPV		 1299 status = "disabled";
1300 };
1301
8dccafaa 1302 usb0: ohci@700000 {
6a062459
JCPV		 1303 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1304 reg = <0x00700000 0x100000>;
5e8b3bc3 1305 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
f8073708
BB		 1306 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1307 clock-names = "ohci_clk", "hclk", "uhpck";
6a062459
JCPV		 1308 status = "disabled";
1309 };
62c5553a 1310
8dccafaa 1311 usb1: ehci@800000 {
62c5553a
JCPV		 1312 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1313 reg = <0x00800000 0x100000>;
5e8b3bc3 1314 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
855868a5
BB		 1315 clocks = <&utmi>, <&uhphs_clk>;
1316 clock-names = "usb_clk", "ehci_clk";
62c5553a
JCPV		 1317 status = "disabled";
1318 };
d9c41bf3
BB		 1319
1320 ebi: ebi@10000000 {
1321 compatible = "atmel,at91sam9g45-ebi";
1322 #address-cells = <2>;
1323 #size-cells = <1>;
1324 atmel,smc = <&smc>;
1325 atmel,matrix = <&matrix>;
1326 reg = <0x10000000 0x80000000>;
1327 ranges = <0x0 0x0 0x10000000 0x10000000
1328 0x1 0x0 0x20000000 0x10000000
1329 0x2 0x0 0x30000000 0x10000000
1330 0x3 0x0 0x40000000 0x10000000
1331 0x4 0x0 0x50000000 0x10000000
1332 0x5 0x0 0x60000000 0x10000000>;
1333 clocks = <&mck>;
1334 status = "disabled";
1335
1336 nand_controller: nand-controller {
1337 compatible = "atmel,at91sam9g45-nand-controller";
1338 #address-cells = <2>;
1339 #size-cells = <1>;
1340 ranges;
1341 status = "disabled";
1342 };
1343 };
49fe2ba3 1344 };
8f24bdaa 1345
e152e3f7 1346 i2c-gpio-0 {
8f24bdaa 1347 compatible = "i2c-gpio";
92f8629b
JCPV		 1348 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1349 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
8f24bdaa
JCPV		 1350 >;
1351 i2c-gpio,sda-open-drain;
1352 i2c-gpio,scl-open-drain;
1353 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1356 status = "disabled";
1357 };
49fe2ba3 1358};
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