projects / mirror_ubuntu-zesty-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 49fe2ba3 NF |
1 | /* |
| 2 | * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC | |
| 3 | * applies to AT91SAM9G45, AT91SAM9M10, | |
| 4 | * AT91SAM9G46, AT91SAM9M11 SoC | |
| 5 | * | |
| 6 | * Copyright (C) 2011 Atmel, | |
| 7 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> | |
| 8 | * | |
| 9 | * Licensed under GPLv2 or later. | |
| 10 | */ | |
| 11 | ||
| 6db64d29 | 12 | #include "skeleton.dtsi" |
| d4ae89c8 | 13 | #include <dt-bindings/dma/at91.h> |
| c9d0f317 | 14 | #include <dt-bindings/pinctrl/at91.h> |
| 5e8b3bc3 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
| 92f8629b | 16 | #include <dt-bindings/gpio/gpio.h> |
| 6f368c30 | 17 | #include <dt-bindings/clock/at91.h> |
| 49fe2ba3 NF |
18 | |
| 19 | / { | |
| 20 | model = "Atmel AT91SAM9G45 family SoC"; | |
| 21 | compatible = "atmel,at91sam9g45"; | |
| 22 | interrupt-parent = <&aic>; | |
| 23 | ||
| 24 | aliases { | |
| 25 | serial0 = &dbgu; | |
| 26 | serial1 = &usart0; | |
| 27 | serial2 = &usart1; | |
| 28 | serial3 = &usart2; | |
| 29 | serial4 = &usart3; | |
| 21f81872 NF |
30 | gpio0 = &pioA; |
| 31 | gpio1 = &pioB; | |
| 32 | gpio2 = &pioC; | |
| 33 | gpio3 = &pioD; | |
| 34 | gpio4 = &pioE; | |
| 3a61a5da NF |
35 | tcb0 = &tcb0; |
| 36 | tcb1 = &tcb1; | |
| 05dcd361 LD |
37 | i2c0 = &i2c0; |
| 38 | i2c1 = &i2c1; | |
| 099343c6 BS |
39 | ssc0 = &ssc0; |
| 40 | ssc1 = &ssc1; | |
| f3ab0527 | 41 | pwm0 = &pwm0; |
| 49fe2ba3 NF |
42 | }; |
| 43 | cpus { | |
| e757a6ee LP |
44 | #address-cells = <0>; |
| 45 | #size-cells = <0>; | |
| 46 | ||
| 47 | cpu { | |
| 48 | compatible = "arm,arm926ej-s"; | |
| 49 | device_type = "cpu"; | |
| 49fe2ba3 NF |
50 | }; |
| 51 | }; | |
| 52 | ||
| dcce6ce8 | 53 | memory { |
| 49fe2ba3 NF |
54 | reg = <0x70000000 0x10000000>; |
| 55 | }; | |
| 56 | ||
| 6f368c30 AB |
57 | clocks { |
| 58 | slow_xtal: slow_xtal { | |
| 59 | compatible = "fixed-clock"; | |
| 60 | #clock-cells = <0>; | |
| 61 | clock-frequency = <0>; | |
| 62 | }; | |
| 63 | ||
| 64 | main_xtal: main_xtal { | |
| 65 | compatible = "fixed-clock"; | |
| 66 | #clock-cells = <0>; | |
| 67 | clock-frequency = <0>; | |
| 68 | }; | |
| 69 | ||
| 70 | adc_op_clk: adc_op_clk{ | |
| 71 | compatible = "fixed-clock"; | |
| 72 | #clock-cells = <0>; | |
| 73 | clock-frequency = <300000>; | |
| 74 | }; | |
| 75 | }; | |
| 76 | ||
| 49fe2ba3 NF |
77 | ahb { |
| 78 | compatible = "simple-bus"; | |
| 79 | #address-cells = <1>; | |
| 80 | #size-cells = <1>; | |
| 81 | ranges; | |
| 82 | ||
| 83 | apb { | |
| 84 | compatible = "simple-bus"; | |
| 85 | #address-cells = <1>; | |
| 86 | #size-cells = <1>; | |
| 87 | ranges; | |
| 88 | ||
| 89 | aic: interrupt-controller@fffff000 { | |
| f8a073ee | 90 | #interrupt-cells = <3>; |
| 49fe2ba3 NF |
91 | compatible = "atmel,at91rm9200-aic"; |
| 92 | interrupt-controller; | |
| 49fe2ba3 | 93 | reg = <0xfffff000 0x200>; |
| c6573943 | 94 | atmel,external-irqs = <31>; |
| 49fe2ba3 NF |
95 | }; |
| 96 | ||
| a7776ec6 JCPV |
97 | ramc0: ramc@ffffe400 { |
| 98 | compatible = "atmel,at91sam9g45-ddramc"; | |
| 1e165a7d | 99 | reg = <0xffffe400 0x200>; |
| 464d6e18 NF |
100 | clocks = <&ddrck>; |
| 101 | clock-names = "ddrck"; | |
| 1e165a7d MR |
102 | }; |
| 103 | ||
| 104 | ramc1: ramc@ffffe600 { | |
| 105 | compatible = "atmel,at91sam9g45-ddramc"; | |
| 106 | reg = <0xffffe600 0x200>; | |
| 6f368c30 AB |
107 | clocks = <&ddrck>; |
| 108 | clock-names = "ddrck"; | |
| a7776ec6 JCPV |
109 | }; |
| 110 | ||
| eb5e76ff | 111 | pmc: pmc@fffffc00 { |
| 6f368c30 | 112 | compatible = "atmel,at91sam9g45-pmc"; |
| eb5e76ff | 113 | reg = <0xfffffc00 0x100>; |
| 6f368c30 AB |
114 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 115 | interrupt-controller; | |
| 116 | #address-cells = <1>; | |
| 117 | #size-cells = <0>; | |
| 118 | #interrupt-cells = <1>; | |
| 119 | ||
| 120 | main_osc: main_osc { | |
| 121 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
| 122 | #clock-cells = <0>; | |
| 123 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
| 124 | clocks = <&main_xtal>; | |
| 125 | }; | |
| 126 | ||
| 127 | main: mainck { | |
| 128 | compatible = "atmel,at91rm9200-clk-main"; | |
| 129 | #clock-cells = <0>; | |
| 130 | clocks = <&main_osc>; | |
| 131 | }; | |
| 132 | ||
| 133 | plla: pllack { | |
| 134 | compatible = "atmel,at91rm9200-clk-pll"; | |
| 135 | #clock-cells = <0>; | |
| 136 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
| 137 | clocks = <&main>; | |
| 138 | reg = <0>; | |
| 139 | atmel,clk-input-range = <2000000 32000000>; | |
| 140 | #atmel,pll-clk-output-range-cells = <4>; | |
| 141 | atmel,pll-clk-output-ranges = <745000000 800000000 0 0 | |
| 142 | 695000000 750000000 1 0 | |
| 143 | 645000000 700000000 2 0 | |
| 144 | 595000000 650000000 3 0 | |
| 145 | 545000000 600000000 0 1 | |
| 146 | 495000000 555000000 1 1 | |
| 147 | 445000000 500000000 2 1 | |
| 148 | 400000000 450000000 3 1>; | |
| 149 | }; | |
| 150 | ||
| 151 | plladiv: plladivck { | |
| 152 | compatible = "atmel,at91sam9x5-clk-plldiv"; | |
| 153 | #clock-cells = <0>; | |
| 154 | clocks = <&plla>; | |
| 155 | }; | |
| 156 | ||
| 157 | utmi: utmick { | |
| 158 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
| 159 | #clock-cells = <0>; | |
| 160 | interrupts-extended = <&pmc AT91_PMC_LOCKU>; | |
| 161 | clocks = <&main>; | |
| 162 | }; | |
| 163 | ||
| 164 | mck: masterck { | |
| 165 | compatible = "atmel,at91rm9200-clk-master"; | |
| 166 | #clock-cells = <0>; | |
| 167 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
| 97735da4 | 168 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; |
| 6f368c30 AB |
169 | atmel,clk-output-range = <0 133333333>; |
| 170 | atmel,clk-divisors = <1 2 4 3>; | |
| 171 | }; | |
| 172 | ||
| 173 | usb: usbck { | |
| 174 | compatible = "atmel,at91sam9x5-clk-usb"; | |
| 175 | #clock-cells = <0>; | |
| 176 | clocks = <&plladiv>, <&utmi>; | |
| 177 | }; | |
| 178 | ||
| 179 | prog: progck { | |
| 180 | compatible = "atmel,at91sam9g45-clk-programmable"; | |
| 181 | #address-cells = <1>; | |
| 182 | #size-cells = <0>; | |
| 183 | interrupt-parent = <&pmc>; | |
| 97735da4 | 184 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; |
| 6f368c30 AB |
185 | |
| 186 | prog0: prog0 { | |
| 187 | #clock-cells = <0>; | |
| 188 | reg = <0>; | |
| 189 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
| 190 | }; | |
| 191 | ||
| 192 | prog1: prog1 { | |
| 193 | #clock-cells = <0>; | |
| 194 | reg = <1>; | |
| 195 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
| 196 | }; | |
| 197 | }; | |
| 198 | ||
| 199 | systemck { | |
| 200 | compatible = "atmel,at91rm9200-clk-system"; | |
| 201 | #address-cells = <1>; | |
| 202 | #size-cells = <0>; | |
| 203 | ||
| 204 | ddrck: ddrck { | |
| 205 | #clock-cells = <0>; | |
| 206 | reg = <2>; | |
| 207 | clocks = <&mck>; | |
| 208 | }; | |
| 209 | ||
| 210 | uhpck: uhpck { | |
| 211 | #clock-cells = <0>; | |
| 212 | reg = <6>; | |
| 213 | clocks = <&usb>; | |
| 214 | }; | |
| 215 | ||
| 216 | pck0: pck0 { | |
| 217 | #clock-cells = <0>; | |
| 218 | reg = <8>; | |
| 219 | clocks = <&prog0>; | |
| 220 | }; | |
| 221 | ||
| 222 | pck1: pck1 { | |
| 223 | #clock-cells = <0>; | |
| 224 | reg = <9>; | |
| 225 | clocks = <&prog1>; | |
| 226 | }; | |
| 227 | }; | |
| 228 | ||
| 229 | periphck { | |
| 230 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
| 231 | #address-cells = <1>; | |
| 232 | #size-cells = <0>; | |
| 233 | clocks = <&mck>; | |
| 234 | ||
| 235 | pioA_clk: pioA_clk { | |
| 236 | #clock-cells = <0>; | |
| 237 | reg = <2>; | |
| 238 | }; | |
| 239 | ||
| 240 | pioB_clk: pioB_clk { | |
| 241 | #clock-cells = <0>; | |
| 242 | reg = <3>; | |
| 243 | }; | |
| 244 | ||
| 245 | pioC_clk: pioC_clk { | |
| 246 | #clock-cells = <0>; | |
| 247 | reg = <4>; | |
| 248 | }; | |
| 249 | ||
| 250 | pioDE_clk: pioDE_clk { | |
| 251 | #clock-cells = <0>; | |
| 252 | reg = <5>; | |
| 253 | }; | |
| 254 | ||
| 255 | trng_clk: trng_clk { | |
| 256 | #clock-cells = <0>; | |
| 257 | reg = <6>; | |
| 258 | }; | |
| 259 | ||
| 260 | usart0_clk: usart0_clk { | |
| 261 | #clock-cells = <0>; | |
| 262 | reg = <7>; | |
| 263 | }; | |
| 264 | ||
| 265 | usart1_clk: usart1_clk { | |
| 266 | #clock-cells = <0>; | |
| 267 | reg = <8>; | |
| 268 | }; | |
| 269 | ||
| 270 | usart2_clk: usart2_clk { | |
| 271 | #clock-cells = <0>; | |
| 272 | reg = <9>; | |
| 273 | }; | |
| 274 | ||
| 275 | usart3_clk: usart3_clk { | |
| 276 | #clock-cells = <0>; | |
| 277 | reg = <10>; | |
| 278 | }; | |
| 279 | ||
| 280 | mci0_clk: mci0_clk { | |
| 281 | #clock-cells = <0>; | |
| 282 | reg = <11>; | |
| 283 | }; | |
| 284 | ||
| 285 | twi0_clk: twi0_clk { | |
| 286 | #clock-cells = <0>; | |
| 287 | reg = <12>; | |
| 288 | }; | |
| 289 | ||
| 290 | twi1_clk: twi1_clk { | |
| 291 | #clock-cells = <0>; | |
| 292 | reg = <13>; | |
| 293 | }; | |
| 294 | ||
| 295 | spi0_clk: spi0_clk { | |
| 296 | #clock-cells = <0>; | |
| 297 | reg = <14>; | |
| 298 | }; | |
| 299 | ||
| 300 | spi1_clk: spi1_clk { | |
| 301 | #clock-cells = <0>; | |
| 302 | reg = <15>; | |
| 303 | }; | |
| 304 | ||
| 305 | ssc0_clk: ssc0_clk { | |
| 306 | #clock-cells = <0>; | |
| 307 | reg = <16>; | |
| 308 | }; | |
| 309 | ||
| 310 | ssc1_clk: ssc1_clk { | |
| 311 | #clock-cells = <0>; | |
| 312 | reg = <17>; | |
| 313 | }; | |
| 314 | ||
| 315 | tcb0_clk: tcb0_clk { | |
| 316 | #clock-cells = <0>; | |
| 317 | reg = <18>; | |
| 318 | }; | |
| 319 | ||
| 320 | pwm_clk: pwm_clk { | |
| 321 | #clock-cells = <0>; | |
| 322 | reg = <19>; | |
| 323 | }; | |
| 324 | ||
| 325 | adc_clk: adc_clk { | |
| 326 | #clock-cells = <0>; | |
| 327 | reg = <20>; | |
| 328 | }; | |
| 329 | ||
| 330 | dma0_clk: dma0_clk { | |
| 331 | #clock-cells = <0>; | |
| 332 | reg = <21>; | |
| 333 | }; | |
| 334 | ||
| 335 | uhphs_clk: uhphs_clk { | |
| 336 | #clock-cells = <0>; | |
| 337 | reg = <22>; | |
| 338 | }; | |
| 339 | ||
| 340 | lcd_clk: lcd_clk { | |
| 341 | #clock-cells = <0>; | |
| 342 | reg = <23>; | |
| 343 | }; | |
| 344 | ||
| 345 | ac97_clk: ac97_clk { | |
| 346 | #clock-cells = <0>; | |
| 347 | reg = <24>; | |
| 348 | }; | |
| 349 | ||
| 350 | macb0_clk: macb0_clk { | |
| 351 | #clock-cells = <0>; | |
| 352 | reg = <25>; | |
| 353 | }; | |
| 354 | ||
| 355 | isi_clk: isi_clk { | |
| 356 | #clock-cells = <0>; | |
| 357 | reg = <26>; | |
| 358 | }; | |
| 359 | ||
| 360 | udphs_clk: udphs_clk { | |
| 361 | #clock-cells = <0>; | |
| 362 | reg = <27>; | |
| 363 | }; | |
| 364 | ||
| 365 | aestdessha_clk: aestdessha_clk { | |
| 366 | #clock-cells = <0>; | |
| 367 | reg = <28>; | |
| 368 | }; | |
| 369 | ||
| 370 | mci1_clk: mci1_clk { | |
| 371 | #clock-cells = <0>; | |
| 372 | reg = <29>; | |
| 373 | }; | |
| 374 | ||
| 375 | vdec_clk: vdec_clk { | |
| 376 | #clock-cells = <0>; | |
| 377 | reg = <30>; | |
| 378 | }; | |
| 379 | }; | |
| eb5e76ff JCPV |
380 | }; |
| 381 | ||
| c8082d34 JCPV |
382 | rstc@fffffd00 { |
| 383 | compatible = "atmel,at91sam9g45-rstc"; | |
| 384 | reg = <0xfffffd00 0x10>; | |
| 385 | }; | |
| 386 | ||
| 23fa648f JCPV |
387 | pit: timer@fffffd30 { |
| 388 | compatible = "atmel,at91sam9260-pit"; | |
| 389 | reg = <0xfffffd30 0xf>; | |
| 5e8b3bc3 | 390 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 6f368c30 | 391 | clocks = <&mck>; |
| 23fa648f JCPV |
392 | }; |
| 393 | ||
| 3a61a5da | 394 | |
| 82015c4e JCPV |
395 | shdwc@fffffd10 { |
| 396 | compatible = "atmel,at91sam9rl-shdwc"; | |
| 397 | reg = <0xfffffd10 0x10>; | |
| 398 | }; | |
| 399 | ||
| 3a61a5da NF |
400 | tcb0: timer@fff7c000 { |
| 401 | compatible = "atmel,at91rm9200-tcb"; | |
| 402 | reg = <0xfff7c000 0x100>; | |
| 5e8b3bc3 | 403 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
404 | clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; |
| 405 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
| 3a61a5da NF |
406 | }; |
| 407 | ||
| 408 | tcb1: timer@fffd4000 { | |
| 409 | compatible = "atmel,at91rm9200-tcb"; | |
| 410 | reg = <0xfffd4000 0x100>; | |
| 5e8b3bc3 | 411 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
412 | clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; |
| 413 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
| 3a61a5da NF |
414 | }; |
| 415 | ||
| 49fe2ba3 NF |
416 | dma: dma-controller@ffffec00 { |
| 417 | compatible = "atmel,at91sam9g45-dma"; | |
| 418 | reg = <0xffffec00 0x200>; | |
| 5e8b3bc3 | 419 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
| 980ce7d9 | 420 | #dma-cells = <2>; |
| 6f368c30 AB |
421 | clocks = <&dma0_clk>; |
| 422 | clock-names = "dma_clk"; | |
| 49fe2ba3 NF |
423 | }; |
| 424 | ||
| e4541ff2 JCPV |
425 | pinctrl@fffff200 { |
| 426 | #address-cells = <1>; | |
| 427 | #size-cells = <1>; | |
| 428 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
| 429 | ranges = <0xfffff200 0xfffff200 0xa00>; | |
| 430 | ||
| 5314ec8e JCPV |
431 | atmel,mux-mask = < |
| 432 | /* A B */ | |
| 433 | 0xffffffff 0xffc003ff /* pioA */ | |
| 434 | 0xffffffff 0x800f8f00 /* pioB */ | |
| 435 | 0xffffffff 0x00000e00 /* pioC */ | |
| 436 | 0xffffffff 0xff0c1381 /* pioD */ | |
| 437 | 0xffffffff 0x81ffff81 /* pioE */ | |
| 438 | >; | |
| 439 | ||
| 440 | /* shared pinctrl settings */ | |
| 72e6caca AB |
441 | adc0 { |
| 442 | pinctrl_adc0_adtrg: adc0_adtrg { | |
| 443 | atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 444 | }; | |
| 445 | pinctrl_adc0_ad0: adc0_ad0 { | |
| 446 | atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 447 | }; | |
| 448 | pinctrl_adc0_ad1: adc0_ad1 { | |
| 449 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 450 | }; | |
| 451 | pinctrl_adc0_ad2: adc0_ad2 { | |
| 452 | atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 453 | }; | |
| 454 | pinctrl_adc0_ad3: adc0_ad3 { | |
| 455 | atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 456 | }; | |
| 457 | pinctrl_adc0_ad4: adc0_ad4 { | |
| 458 | atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 459 | }; | |
| 460 | pinctrl_adc0_ad5: adc0_ad5 { | |
| 461 | atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 462 | }; | |
| 463 | pinctrl_adc0_ad6: adc0_ad6 { | |
| 464 | atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 465 | }; | |
| 466 | pinctrl_adc0_ad7: adc0_ad7 { | |
| 467 | atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 468 | }; | |
| 469 | }; | |
| 470 | ||
| ec6754a7 JCPV |
471 | dbgu { |
| 472 | pinctrl_dbgu: dbgu-0 { | |
| 473 | atmel,pins = | |
| c9d0f317 JCPV |
474 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ |
| 475 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ | |
| ec6754a7 JCPV |
476 | }; |
| 477 | }; | |
| 478 | ||
| cd127e1d LD |
479 | i2c0 { |
| 480 | pinctrl_i2c0: i2c0-0 { | |
| 481 | atmel,pins = | |
| 482 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */ | |
| 483 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */ | |
| 484 | }; | |
| 485 | }; | |
| 486 | ||
| 487 | i2c1 { | |
| 488 | pinctrl_i2c1: i2c1-0 { | |
| 489 | atmel,pins = | |
| 490 | <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */ | |
| 491 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */ | |
| 492 | }; | |
| 493 | }; | |
| 494 | ||
| 9e3129e9 JCPV |
495 | usart0 { |
| 496 | pinctrl_usart0: usart0-0 { | |
| ec6754a7 | 497 | atmel,pins = |
| c9d0f317 JCPV |
498 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */ |
| 499 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ | |
| ec6754a7 JCPV |
500 | }; |
| 501 | ||
| c58c0c5a | 502 | pinctrl_usart0_rts: usart0_rts-0 { |
| ec6754a7 | 503 | atmel,pins = |
| c9d0f317 | 504 | <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ |
| c58c0c5a JCPV |
505 | }; |
| 506 | ||
| 507 | pinctrl_usart0_cts: usart0_cts-0 { | |
| 508 | atmel,pins = | |
| c9d0f317 | 509 | <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ |
| ec6754a7 JCPV |
510 | }; |
| 511 | }; | |
| 512 | ||
| 513 | uart1 { | |
| 9e3129e9 | 514 | pinctrl_usart1: usart1-0 { |
| ec6754a7 | 515 | atmel,pins = |
| c9d0f317 JCPV |
516 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */ |
| 517 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ | |
| ec6754a7 JCPV |
518 | }; |
| 519 | ||
| c58c0c5a JCPV |
520 | pinctrl_usart1_rts: usart1_rts-0 { |
| 521 | atmel,pins = | |
| c9d0f317 | 522 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ |
| c58c0c5a JCPV |
523 | }; |
| 524 | ||
| 525 | pinctrl_usart1_cts: usart1_cts-0 { | |
| ec6754a7 | 526 | atmel,pins = |
| c9d0f317 | 527 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ |
| ec6754a7 JCPV |
528 | }; |
| 529 | }; | |
| 530 | ||
| 9e3129e9 JCPV |
531 | usart2 { |
| 532 | pinctrl_usart2: usart2-0 { | |
| ec6754a7 | 533 | atmel,pins = |
| c9d0f317 JCPV |
534 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
| 535 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ | |
| ec6754a7 JCPV |
536 | }; |
| 537 | ||
| c58c0c5a | 538 | pinctrl_usart2_rts: usart2_rts-0 { |
| ec6754a7 | 539 | atmel,pins = |
| c9d0f317 | 540 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ |
| c58c0c5a JCPV |
541 | }; |
| 542 | ||
| 543 | pinctrl_usart2_cts: usart2_cts-0 { | |
| 544 | atmel,pins = | |
| c9d0f317 | 545 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ |
| ec6754a7 JCPV |
546 | }; |
| 547 | }; | |
| 548 | ||
| 9e3129e9 JCPV |
549 | usart3 { |
| 550 | pinctrl_usart3: usart3-0 { | |
| ec6754a7 | 551 | atmel,pins = |
| c9d0f317 JCPV |
552 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */ |
| 553 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ | |
| ec6754a7 JCPV |
554 | }; |
| 555 | ||
| c58c0c5a JCPV |
556 | pinctrl_usart3_rts: usart3_rts-0 { |
| 557 | atmel,pins = | |
| c9d0f317 | 558 | <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ |
| c58c0c5a JCPV |
559 | }; |
| 560 | ||
| 561 | pinctrl_usart3_cts: usart3_cts-0 { | |
| ec6754a7 | 562 | atmel,pins = |
| c9d0f317 | 563 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ |
| ec6754a7 JCPV |
564 | }; |
| 565 | }; | |
| 5314ec8e | 566 | |
| 7a38d450 JCPV |
567 | nand { |
| 568 | pinctrl_nand: nand-0 { | |
| 569 | atmel,pins = | |
| c9d0f317 JCPV |
570 | <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/ |
| 571 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ | |
| 7a38d450 JCPV |
572 | }; |
| 573 | }; | |
| 574 | ||
| d9b4fe83 JCPV |
575 | macb { |
| 576 | pinctrl_macb_rmii: macb_rmii-0 { | |
| 577 | atmel,pins = | |
| c9d0f317 JCPV |
578 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ |
| 579 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ | |
| 580 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ | |
| 581 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ | |
| 582 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ | |
| 583 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ | |
| 584 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ | |
| 585 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ | |
| 586 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ | |
| 587 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ | |
| d9b4fe83 JCPV |
588 | }; |
| 589 | ||
| 590 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | |
| 591 | atmel,pins = | |
| c9d0f317 JCPV |
592 | <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ |
| 593 | AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ | |
| 594 | AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ | |
| 595 | AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ | |
| 596 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ | |
| 597 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
| 598 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ | |
| 599 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ | |
| d9b4fe83 JCPV |
600 | }; |
| 601 | }; | |
| 602 | ||
| d4fe9ac7 JCPV |
603 | mmc0 { |
| 604 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | |
| 605 | atmel,pins = | |
| c9d0f317 JCPV |
606 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ |
| 607 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ | |
| 608 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ | |
| d4fe9ac7 JCPV |
609 | }; |
| 610 | ||
| 611 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
| 612 | atmel,pins = | |
| c9d0f317 JCPV |
613 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ |
| 614 | AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ | |
| 615 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ | |
| d4fe9ac7 JCPV |
616 | }; |
| 617 | ||
| 618 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { | |
| 619 | atmel,pins = | |
| c9d0f317 JCPV |
620 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ |
| 621 | AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ | |
| 622 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ | |
| 623 | AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ | |
| d4fe9ac7 JCPV |
624 | }; |
| 625 | }; | |
| 626 | ||
| 627 | mmc1 { | |
| 628 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | |
| 629 | atmel,pins = | |
| c9d0f317 JCPV |
630 | <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ |
| 631 | AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ | |
| 632 | AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ | |
| d4fe9ac7 JCPV |
633 | }; |
| 634 | ||
| 635 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
| 636 | atmel,pins = | |
| c9d0f317 JCPV |
637 | <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ |
| 638 | AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ | |
| 639 | AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ | |
| d4fe9ac7 JCPV |
640 | }; |
| 641 | ||
| 642 | pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { | |
| 643 | atmel,pins = | |
| c9d0f317 JCPV |
644 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ |
| 645 | AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ | |
| 646 | AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ | |
| 647 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ | |
| d4fe9ac7 JCPV |
648 | }; |
| 649 | }; | |
| 650 | ||
| 544ae6b2 BS |
651 | ssc0 { |
| 652 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
| 653 | atmel,pins = | |
| c9d0f317 JCPV |
654 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ |
| 655 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ | |
| 656 | AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ | |
| 544ae6b2 BS |
657 | }; |
| 658 | ||
| 659 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
| 660 | atmel,pins = | |
| c9d0f317 JCPV |
661 | <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ |
| 662 | AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ | |
| 663 | AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ | |
| 544ae6b2 BS |
664 | }; |
| 665 | }; | |
| 666 | ||
| 667 | ssc1 { | |
| 668 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
| 669 | atmel,pins = | |
| c9d0f317 JCPV |
670 | <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ |
| 671 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ | |
| 672 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ | |
| 544ae6b2 BS |
673 | }; |
| 674 | ||
| 675 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
| 676 | atmel,pins = | |
| c9d0f317 JCPV |
677 | <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ |
| 678 | AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ | |
| 679 | AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ | |
| 544ae6b2 BS |
680 | }; |
| 681 | }; | |
| 682 | ||
| a68b728f WY |
683 | spi0 { |
| 684 | pinctrl_spi0: spi0-0 { | |
| 685 | atmel,pins = | |
| c9d0f317 JCPV |
686 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ |
| 687 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ | |
| 688 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ | |
| a68b728f WY |
689 | }; |
| 690 | }; | |
| 691 | ||
| 692 | spi1 { | |
| 693 | pinctrl_spi1: spi1-0 { | |
| 694 | atmel,pins = | |
| c9d0f317 JCPV |
695 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ |
| 696 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ | |
| 697 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ | |
| a68b728f WY |
698 | }; |
| 699 | }; | |
| 700 | ||
| 028633c2 BB |
701 | tcb0 { |
| 702 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
| 703 | atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 704 | }; | |
| 705 | ||
| 706 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
| 707 | atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 708 | }; | |
| 709 | ||
| 710 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
| 711 | atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 712 | }; | |
| 713 | ||
| 714 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
| 715 | atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 716 | }; | |
| 717 | ||
| 718 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
| 719 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 720 | }; | |
| 721 | ||
| 722 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
| 723 | atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 724 | }; | |
| 725 | ||
| 726 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
| 727 | atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 728 | }; | |
| 729 | ||
| 730 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
| 731 | atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 732 | }; | |
| 733 | ||
| 734 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
| 735 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 736 | }; | |
| 737 | }; | |
| 738 | ||
| 739 | tcb1 { | |
| 740 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | |
| 741 | atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 742 | }; | |
| 743 | ||
| 744 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | |
| 745 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 746 | }; | |
| 747 | ||
| 748 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | |
| 749 | atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 750 | }; | |
| 751 | ||
| 752 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | |
| 753 | atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 754 | }; | |
| 755 | ||
| 756 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | |
| 757 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 758 | }; | |
| 759 | ||
| 760 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | |
| 761 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 762 | }; | |
| 763 | ||
| 764 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | |
| 765 | atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 766 | }; | |
| 767 | ||
| 768 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | |
| 769 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 770 | }; | |
| 771 | ||
| 772 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | |
| 773 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 774 | }; | |
| 775 | }; | |
| 776 | ||
| ddee65b3 JCPV |
777 | fb { |
| 778 | pinctrl_fb: fb-0 { | |
| 779 | atmel,pins = | |
| 780 | <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */ | |
| 781 | AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */ | |
| 782 | AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */ | |
| 783 | AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */ | |
| 784 | AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */ | |
| 785 | AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */ | |
| 786 | AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */ | |
| 787 | AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */ | |
| 788 | AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */ | |
| 789 | AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */ | |
| 790 | AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */ | |
| 791 | AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */ | |
| 792 | AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */ | |
| 793 | AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */ | |
| 794 | AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */ | |
| 795 | AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */ | |
| 796 | AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */ | |
| 797 | AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */ | |
| 798 | AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */ | |
| 799 | AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */ | |
| 800 | AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ | |
| 801 | AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */ | |
| 802 | AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ | |
| 803 | AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ | |
| 804 | AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ | |
| 805 | AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ | |
| 806 | AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ | |
| 807 | AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ | |
| 808 | AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ | |
| 809 | AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ | |
| 810 | }; | |
| 811 | }; | |
| 812 | ||
| e4541ff2 JCPV |
813 | pioA: gpio@fffff200 { |
| 814 | compatible = "atmel,at91rm9200-gpio"; | |
| 815 | reg = <0xfffff200 0x200>; | |
| 5e8b3bc3 | 816 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
817 | #gpio-cells = <2>; |
| 818 | gpio-controller; | |
| 819 | interrupt-controller; | |
| 820 | #interrupt-cells = <2>; | |
| 6f368c30 | 821 | clocks = <&pioA_clk>; |
| e4541ff2 JCPV |
822 | }; |
| 823 | ||
| 824 | pioB: gpio@fffff400 { | |
| 825 | compatible = "atmel,at91rm9200-gpio"; | |
| 826 | reg = <0xfffff400 0x200>; | |
| 5e8b3bc3 | 827 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
828 | #gpio-cells = <2>; |
| 829 | gpio-controller; | |
| 830 | interrupt-controller; | |
| 831 | #interrupt-cells = <2>; | |
| 6f368c30 | 832 | clocks = <&pioB_clk>; |
| e4541ff2 JCPV |
833 | }; |
| 834 | ||
| 835 | pioC: gpio@fffff600 { | |
| 836 | compatible = "atmel,at91rm9200-gpio"; | |
| 837 | reg = <0xfffff600 0x200>; | |
| 5e8b3bc3 | 838 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
839 | #gpio-cells = <2>; |
| 840 | gpio-controller; | |
| 841 | interrupt-controller; | |
| 842 | #interrupt-cells = <2>; | |
| 6f368c30 | 843 | clocks = <&pioC_clk>; |
| e4541ff2 JCPV |
844 | }; |
| 845 | ||
| 846 | pioD: gpio@fffff800 { | |
| 847 | compatible = "atmel,at91rm9200-gpio"; | |
| 848 | reg = <0xfffff800 0x200>; | |
| 5e8b3bc3 | 849 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
850 | #gpio-cells = <2>; |
| 851 | gpio-controller; | |
| 852 | interrupt-controller; | |
| 853 | #interrupt-cells = <2>; | |
| 6f368c30 | 854 | clocks = <&pioDE_clk>; |
| e4541ff2 JCPV |
855 | }; |
| 856 | ||
| 857 | pioE: gpio@fffffa00 { | |
| 858 | compatible = "atmel,at91rm9200-gpio"; | |
| 859 | reg = <0xfffffa00 0x200>; | |
| 5e8b3bc3 | 860 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
861 | #gpio-cells = <2>; |
| 862 | gpio-controller; | |
| 863 | interrupt-controller; | |
| 864 | #interrupt-cells = <2>; | |
| 6f368c30 | 865 | clocks = <&pioDE_clk>; |
| e4541ff2 | 866 | }; |
| 21f81872 NF |
867 | }; |
| 868 | ||
| 49fe2ba3 NF |
869 | dbgu: serial@ffffee00 { |
| 870 | compatible = "atmel,at91sam9260-usart"; | |
| 871 | reg = <0xffffee00 0x200>; | |
| 5e8b3bc3 | 872 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| ec6754a7 JCPV |
873 | pinctrl-names = "default"; |
| 874 | pinctrl-0 = <&pinctrl_dbgu>; | |
| 6f368c30 AB |
875 | clocks = <&mck>; |
| 876 | clock-names = "usart"; | |
| 49fe2ba3 NF |
877 | status = "disabled"; |
| 878 | }; | |
| 879 | ||
| 880 | usart0: serial@fff8c000 { | |
| 881 | compatible = "atmel,at91sam9260-usart"; | |
| 882 | reg = <0xfff8c000 0x200>; | |
| 5e8b3bc3 | 883 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
884 | atmel,use-dma-rx; |
| 885 | atmel,use-dma-tx; | |
| ec6754a7 | 886 | pinctrl-names = "default"; |
| 9e3129e9 | 887 | pinctrl-0 = <&pinctrl_usart0>; |
| 6f368c30 AB |
888 | clocks = <&usart0_clk>; |
| 889 | clock-names = "usart"; | |
| 49fe2ba3 NF |
890 | status = "disabled"; |
| 891 | }; | |
| 892 | ||
| 893 | usart1: serial@fff90000 { | |
| 894 | compatible = "atmel,at91sam9260-usart"; | |
| 895 | reg = <0xfff90000 0x200>; | |
| 5e8b3bc3 | 896 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
897 | atmel,use-dma-rx; |
| 898 | atmel,use-dma-tx; | |
| ec6754a7 | 899 | pinctrl-names = "default"; |
| 9e3129e9 | 900 | pinctrl-0 = <&pinctrl_usart1>; |
| 6f368c30 AB |
901 | clocks = <&usart1_clk>; |
| 902 | clock-names = "usart"; | |
| 49fe2ba3 NF |
903 | status = "disabled"; |
| 904 | }; | |
| 905 | ||
| 906 | usart2: serial@fff94000 { | |
| 907 | compatible = "atmel,at91sam9260-usart"; | |
| 908 | reg = <0xfff94000 0x200>; | |
| 5e8b3bc3 | 909 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
910 | atmel,use-dma-rx; |
| 911 | atmel,use-dma-tx; | |
| ec6754a7 | 912 | pinctrl-names = "default"; |
| 9e3129e9 | 913 | pinctrl-0 = <&pinctrl_usart2>; |
| 6f368c30 AB |
914 | clocks = <&usart2_clk>; |
| 915 | clock-names = "usart"; | |
| 49fe2ba3 NF |
916 | status = "disabled"; |
| 917 | }; | |
| 918 | ||
| 919 | usart3: serial@fff98000 { | |
| 920 | compatible = "atmel,at91sam9260-usart"; | |
| 921 | reg = <0xfff98000 0x200>; | |
| 5e8b3bc3 | 922 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
923 | atmel,use-dma-rx; |
| 924 | atmel,use-dma-tx; | |
| ec6754a7 | 925 | pinctrl-names = "default"; |
| 9e3129e9 | 926 | pinctrl-0 = <&pinctrl_usart3>; |
| 6f368c30 AB |
927 | clocks = <&usart3_clk>; |
| 928 | clock-names = "usart"; | |
| 49fe2ba3 NF |
929 | status = "disabled"; |
| 930 | }; | |
| 0d4f99d8 NF |
931 | |
| 932 | macb0: ethernet@fffbc000 { | |
| 933 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
| 934 | reg = <0xfffbc000 0x100>; | |
| 5e8b3bc3 | 935 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; |
| d9b4fe83 JCPV |
936 | pinctrl-names = "default"; |
| 937 | pinctrl-0 = <&pinctrl_macb_rmii>; | |
| 6f368c30 AB |
938 | clocks = <&macb0_clk>, <&macb0_clk>; |
| 939 | clock-names = "hclk", "pclk"; | |
| 0d4f99d8 NF |
940 | status = "disabled"; |
| 941 | }; | |
| 93b298ba | 942 | |
| 05dcd361 LD |
943 | i2c0: i2c@fff84000 { |
| 944 | compatible = "atmel,at91sam9g10-i2c"; | |
| 945 | reg = <0xfff84000 0x100>; | |
| 5e8b3bc3 | 946 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; |
| cd127e1d LD |
947 | pinctrl-names = "default"; |
| 948 | pinctrl-0 = <&pinctrl_i2c0>; | |
| 05dcd361 LD |
949 | #address-cells = <1>; |
| 950 | #size-cells = <0>; | |
| 6f368c30 | 951 | clocks = <&twi0_clk>; |
| 05dcd361 LD |
952 | status = "disabled"; |
| 953 | }; | |
| 954 | ||
| 955 | i2c1: i2c@fff88000 { | |
| 956 | compatible = "atmel,at91sam9g10-i2c"; | |
| 957 | reg = <0xfff88000 0x100>; | |
| 5e8b3bc3 | 958 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; |
| cd127e1d LD |
959 | pinctrl-names = "default"; |
| 960 | pinctrl-0 = <&pinctrl_i2c1>; | |
| 05dcd361 LD |
961 | #address-cells = <1>; |
| 962 | #size-cells = <0>; | |
| 6f368c30 | 963 | clocks = <&twi1_clk>; |
| 05dcd361 LD |
964 | status = "disabled"; |
| 965 | }; | |
| 966 | ||
| 099343c6 BS |
967 | ssc0: ssc@fff9c000 { |
| 968 | compatible = "atmel,at91sam9g45-ssc"; | |
| 969 | reg = <0xfff9c000 0x4000>; | |
| 5e8b3bc3 | 970 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
971 | pinctrl-names = "default"; |
| 972 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
| 6f368c30 AB |
973 | clocks = <&ssc0_clk>; |
| 974 | clock-names = "pclk"; | |
| 315656bc | 975 | status = "disabled"; |
| 099343c6 BS |
976 | }; |
| 977 | ||
| 978 | ssc1: ssc@fffa0000 { | |
| 979 | compatible = "atmel,at91sam9g45-ssc"; | |
| 980 | reg = <0xfffa0000 0x4000>; | |
| 5e8b3bc3 | 981 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
982 | pinctrl-names = "default"; |
| 983 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
| 6f368c30 AB |
984 | clocks = <&ssc1_clk>; |
| 985 | clock-names = "pclk"; | |
| 315656bc | 986 | status = "disabled"; |
| 099343c6 BS |
987 | }; |
| 988 | ||
| 93b298ba | 989 | adc0: adc@fffb0000 { |
| e1abeb72 AB |
990 | #address-cells = <1>; |
| 991 | #size-cells = <0>; | |
| 72e6caca | 992 | compatible = "atmel,at91sam9g45-adc"; |
| 93b298ba | 993 | reg = <0xfffb0000 0x100>; |
| 5e8b3bc3 | 994 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
995 | clocks = <&adc_clk>, <&adc_op_clk>; |
| 996 | clock-names = "adc_clk", "adc_op_clk"; | |
| 93b298ba MR |
997 | atmel,adc-channels-used = <0xff>; |
| 998 | atmel,adc-vref = <3300>; | |
| 93b298ba | 999 | atmel,adc-startup-time = <40>; |
| 4b50da65 LD |
1000 | atmel,adc-res = <8 10>; |
| 1001 | atmel,adc-res-names = "lowres", "highres"; | |
| 1002 | atmel,adc-use-res = "highres"; | |
| 93b298ba MR |
1003 | |
| 1004 | trigger@0 { | |
| e1abeb72 | 1005 | reg = <0>; |
| 93b298ba MR |
1006 | trigger-name = "external-rising"; |
| 1007 | trigger-value = <0x1>; | |
| 1008 | trigger-external; | |
| 1009 | }; | |
| 1010 | trigger@1 { | |
| e1abeb72 | 1011 | reg = <1>; |
| 93b298ba MR |
1012 | trigger-name = "external-falling"; |
| 1013 | trigger-value = <0x2>; | |
| 1014 | trigger-external; | |
| 1015 | }; | |
| 1016 | ||
| 1017 | trigger@2 { | |
| e1abeb72 | 1018 | reg = <2>; |
| 93b298ba MR |
1019 | trigger-name = "external-any"; |
| 1020 | trigger-value = <0x3>; | |
| 1021 | trigger-external; | |
| 1022 | }; | |
| 1023 | ||
| 1024 | trigger@3 { | |
| e1abeb72 | 1025 | reg = <3>; |
| 93b298ba MR |
1026 | trigger-name = "continuous"; |
| 1027 | trigger-value = <0x6>; | |
| 1028 | }; | |
| 1029 | }; | |
| 9873137a | 1030 | |
| f3ab0527 BS |
1031 | pwm0: pwm@fffb8000 { |
| 1032 | compatible = "atmel,at91sam9rl-pwm"; | |
| 1033 | reg = <0xfffb8000 0x300>; | |
| 1034 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
| 1035 | #pwm-cells = <3>; | |
| 6f368c30 | 1036 | clocks = <&pwm_clk>; |
| f3ab0527 BS |
1037 | status = "disabled"; |
| 1038 | }; | |
| 1039 | ||
| 9873137a LD |
1040 | mmc0: mmc@fff80000 { |
| 1041 | compatible = "atmel,hsmci"; | |
| 1042 | reg = <0xfff80000 0x600>; | |
| 5e8b3bc3 | 1043 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; |
| 0645b93f | 1044 | pinctrl-names = "default"; |
| d4ae89c8 | 1045 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; |
| 05c1bc97 | 1046 | dma-names = "rxtx"; |
| 9873137a LD |
1047 | #address-cells = <1>; |
| 1048 | #size-cells = <0>; | |
| 6f368c30 AB |
1049 | clocks = <&mci0_clk>; |
| 1050 | clock-names = "mci_clk"; | |
| 9873137a LD |
1051 | status = "disabled"; |
| 1052 | }; | |
| 1053 | ||
| 1054 | mmc1: mmc@fffd0000 { | |
| 1055 | compatible = "atmel,hsmci"; | |
| 1056 | reg = <0xfffd0000 0x600>; | |
| 5e8b3bc3 | 1057 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; |
| 0645b93f | 1058 | pinctrl-names = "default"; |
| d4ae89c8 | 1059 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; |
| 05c1bc97 | 1060 | dma-names = "rxtx"; |
| 9873137a LD |
1061 | #address-cells = <1>; |
| 1062 | #size-cells = <0>; | |
| 6f368c30 AB |
1063 | clocks = <&mci1_clk>; |
| 1064 | clock-names = "mci_clk"; | |
| 9873137a | 1065 | status = "disabled"; |
| db5b0ae0 LT |
1066 | }; |
| 1067 | ||
| 7492e7ca FP |
1068 | watchdog@fffffd40 { |
| 1069 | compatible = "atmel,at91sam9260-wdt"; | |
| 1070 | reg = <0xfffffd40 0x10>; | |
| fe46aa67 BB |
1071 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 1072 | atmel,watchdog-type = "hardware"; | |
| 1073 | atmel,reset-type = "all"; | |
| 1074 | atmel,dbg-halt; | |
| 1075 | atmel,idle-halt; | |
| 7492e7ca | 1076 | status = "disabled"; |
| d50f88a0 RG |
1077 | }; |
| 1078 | ||
| 1079 | spi0: spi@fffa4000 { | |
| 1080 | #address-cells = <1>; | |
| 1081 | #size-cells = <0>; | |
| 1082 | compatible = "atmel,at91rm9200-spi"; | |
| 1083 | reg = <0xfffa4000 0x200>; | |
| 1084 | interrupts = <14 4 3>; | |
| a68b728f WY |
1085 | pinctrl-names = "default"; |
| 1086 | pinctrl-0 = <&pinctrl_spi0>; | |
| 6f368c30 AB |
1087 | clocks = <&spi0_clk>; |
| 1088 | clock-names = "spi_clk"; | |
| d50f88a0 RG |
1089 | status = "disabled"; |
| 1090 | }; | |
| 1091 | ||
| 1092 | spi1: spi@fffa8000 { | |
| 1093 | #address-cells = <1>; | |
| 1094 | #size-cells = <0>; | |
| 1095 | compatible = "atmel,at91rm9200-spi"; | |
| 1096 | reg = <0xfffa8000 0x200>; | |
| 1097 | interrupts = <15 4 3>; | |
| a68b728f WY |
1098 | pinctrl-names = "default"; |
| 1099 | pinctrl-0 = <&pinctrl_spi1>; | |
| 6f368c30 AB |
1100 | clocks = <&spi1_clk>; |
| 1101 | clock-names = "spi_clk"; | |
| d50f88a0 | 1102 | status = "disabled"; |
| 9873137a | 1103 | }; |
| 3cba498f JCPV |
1104 | |
| 1105 | usb2: gadget@fff78000 { | |
| 1106 | #address-cells = <1>; | |
| 1107 | #size-cells = <0>; | |
| 1108 | compatible = "atmel,at91sam9rl-udc"; | |
| 1109 | reg = <0x00600000 0x80000 | |
| 1110 | 0xfff78000 0x400>; | |
| 1111 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; | |
| 6f368c30 AB |
1112 | clocks = <&udphs_clk>, <&utmi>; |
| 1113 | clock-names = "pclk", "hclk"; | |
| 3cba498f JCPV |
1114 | status = "disabled"; |
| 1115 | ||
| 1116 | ep0 { | |
| 1117 | reg = <0>; | |
| 1118 | atmel,fifo-size = <64>; | |
| 1119 | atmel,nb-banks = <1>; | |
| 1120 | }; | |
| 1121 | ||
| 1122 | ep1 { | |
| 1123 | reg = <1>; | |
| 1124 | atmel,fifo-size = <1024>; | |
| 1125 | atmel,nb-banks = <2>; | |
| 1126 | atmel,can-dma; | |
| 1127 | atmel,can-isoc; | |
| 1128 | }; | |
| 1129 | ||
| 1130 | ep2 { | |
| 1131 | reg = <2>; | |
| 1132 | atmel,fifo-size = <1024>; | |
| 1133 | atmel,nb-banks = <2>; | |
| 1134 | atmel,can-dma; | |
| 1135 | atmel,can-isoc; | |
| 1136 | }; | |
| 1137 | ||
| 1138 | ep3 { | |
| 1139 | reg = <3>; | |
| 1140 | atmel,fifo-size = <1024>; | |
| 1141 | atmel,nb-banks = <3>; | |
| 1142 | atmel,can-dma; | |
| 1143 | }; | |
| 1144 | ||
| 1145 | ep4 { | |
| 1146 | reg = <4>; | |
| 1147 | atmel,fifo-size = <1024>; | |
| 1148 | atmel,nb-banks = <3>; | |
| 1149 | atmel,can-dma; | |
| 1150 | }; | |
| 1151 | ||
| 1152 | ep5 { | |
| 1153 | reg = <5>; | |
| 1154 | atmel,fifo-size = <1024>; | |
| 1155 | atmel,nb-banks = <3>; | |
| 1156 | atmel,can-dma; | |
| 1157 | atmel,can-isoc; | |
| 1158 | }; | |
| 1159 | ||
| 1160 | ep6 { | |
| 1161 | reg = <6>; | |
| 1162 | atmel,fifo-size = <1024>; | |
| 1163 | atmel,nb-banks = <3>; | |
| 1164 | atmel,can-dma; | |
| 1165 | atmel,can-isoc; | |
| 1166 | }; | |
| 1167 | }; | |
| 97735da4 BB |
1168 | |
| 1169 | sckc@fffffd50 { | |
| 1170 | compatible = "atmel,at91sam9x5-sckc"; | |
| 1171 | reg = <0xfffffd50 0x4>; | |
| 1172 | ||
| 1173 | slow_osc: slow_osc { | |
| 1174 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
| 1175 | #clock-cells = <0>; | |
| 1176 | atmel,startup-time-usec = <1200000>; | |
| 1177 | clocks = <&slow_xtal>; | |
| 1178 | }; | |
| 1179 | ||
| 1180 | slow_rc_osc: slow_rc_osc { | |
| 1181 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
| 1182 | #clock-cells = <0>; | |
| 1183 | atmel,startup-time-usec = <75>; | |
| 1184 | clock-frequency = <32768>; | |
| 1185 | clock-accuracy = <50000000>; | |
| 1186 | }; | |
| 1187 | ||
| 1188 | clk32k: slck { | |
| 1189 | compatible = "atmel,at91sam9x5-clk-slow"; | |
| 1190 | #clock-cells = <0>; | |
| 1191 | clocks = <&slow_rc_osc &slow_osc>; | |
| 1192 | }; | |
| 1193 | }; | |
| 49fe2ba3 | 1194 | }; |
| d6a01661 | 1195 | |
| ddee65b3 JCPV |
1196 | fb0: fb@0x00500000 { |
| 1197 | compatible = "atmel,at91sam9g45-lcdc"; | |
| 1198 | reg = <0x00500000 0x1000>; | |
| 1199 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
| 1200 | pinctrl-names = "default"; | |
| 1201 | pinctrl-0 = <&pinctrl_fb>; | |
| 6f368c30 AB |
1202 | clocks = <&lcd_clk>, <&lcd_clk>; |
| 1203 | clock-names = "hclk", "lcdc_clk"; | |
| ddee65b3 JCPV |
1204 | status = "disabled"; |
| 1205 | }; | |
| 1206 | ||
| d6a01661 JCPV |
1207 | nand0: nand@40000000 { |
| 1208 | compatible = "atmel,at91rm9200-nand"; | |
| 1209 | #address-cells = <1>; | |
| 1210 | #size-cells = <1>; | |
| 1211 | reg = <0x40000000 0x10000000 | |
| 1212 | 0xffffe200 0x200 | |
| 1213 | >; | |
| 1214 | atmel,nand-addr-offset = <21>; | |
| 1215 | atmel,nand-cmd-offset = <22>; | |
| e8b2da6e | 1216 | atmel,nand-has-dma; |
| 7a38d450 JCPV |
1217 | pinctrl-names = "default"; |
| 1218 | pinctrl-0 = <&pinctrl_nand>; | |
| 92f8629b JCPV |
1219 | gpios = <&pioC 8 GPIO_ACTIVE_HIGH |
| 1220 | &pioC 14 GPIO_ACTIVE_HIGH | |
| d6a01661 JCPV |
1221 | 0 |
| 1222 | >; | |
| 1223 | status = "disabled"; | |
| 1224 | }; | |
| 6a062459 JCPV |
1225 | |
| 1226 | usb0: ohci@00700000 { | |
| 1227 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
| 1228 | reg = <0x00700000 0x100000>; | |
| 5e8b3bc3 | 1229 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
| 6f368c30 AB |
1230 | //TODO |
| 1231 | clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; | |
| 1232 | clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; | |
| 6a062459 JCPV |
1233 | status = "disabled"; |
| 1234 | }; | |
| 62c5553a JCPV |
1235 | |
| 1236 | usb1: ehci@00800000 { | |
| 1237 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
| 1238 | reg = <0x00800000 0x100000>; | |
| 5e8b3bc3 | 1239 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
| 6f368c30 AB |
1240 | //TODO |
| 1241 | clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; | |
| 1242 | clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; | |
| 62c5553a JCPV |
1243 | status = "disabled"; |
| 1244 | }; | |
| 49fe2ba3 | 1245 | }; |
| 8f24bdaa JCPV |
1246 | |
| 1247 | i2c@0 { | |
| 1248 | compatible = "i2c-gpio"; | |
| 92f8629b JCPV |
1249 | gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ |
| 1250 | &pioA 21 GPIO_ACTIVE_HIGH /* scl */ | |
| 8f24bdaa JCPV |
1251 | >; |
| 1252 | i2c-gpio,sda-open-drain; | |
| 1253 | i2c-gpio,scl-open-drain; | |
| 1254 | i2c-gpio,delay-us = <5>; /* ~100 kHz */ | |
| 1255 | #address-cells = <1>; | |
| 1256 | #size-cells = <0>; | |
| 1257 | status = "disabled"; | |
| 1258 | }; | |
| 49fe2ba3 | 1259 | }; |