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ARM: dts: mxs: modify mx23/mx28 dts files to use pinctrl headers
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / at91sam9n12.dtsi
CommitLineData
cce783c6
HX		 1/*
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
6db64d29 10#include "skeleton.dtsi"
d4ae89c8 11#include <dt-bindings/dma/at91.h>
c9d0f317 12#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 13#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 14#include <dt-bindings/gpio/gpio.h>
cce783c6
HX		 15
16/ {
17 model = "Atmel AT91SAM9N12 SoC";
18 compatible = "atmel,at91sam9n12";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 tcb0 = &tcb0;
32 tcb1 = &tcb1;
05dcd361
LD		 33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
544ae6b2 35 ssc0 = &ssc0;
cce783c6
HX		 36 };
37 cpus {
e757a6ee
LP		 38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
cce783c6
HX		 44 };
45 };
46
47 memory {
48 reg = <0x20000000 0x10000000>;
49 };
50
51 ahb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 apb {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 ranges;
62
63 aic: interrupt-controller@fffff000 {
f8a073ee 64 #interrupt-cells = <3>;
cce783c6
HX		 65 compatible = "atmel,at91rm9200-aic";
66 interrupt-controller;
67 reg = <0xfffff000 0x200>;
029efdda 68 atmel,external-irqs = <31>;
cce783c6
HX		 69 };
70
71 ramc0: ramc@ffffe800 {
72 compatible = "atmel,at91sam9g45-ddramc";
73 reg = <0xffffe800 0x200>;
74 };
75
76 pmc: pmc@fffffc00 {
77 compatible = "atmel,at91rm9200-pmc";
78 reg = <0xfffffc00 0x100>;
79 };
80
81 rstc@fffffe00 {
82 compatible = "atmel,at91sam9g45-rstc";
83 reg = <0xfffffe00 0x10>;
84 };
85
86 pit: timer@fffffe30 {
87 compatible = "atmel,at91sam9260-pit";
88 reg = <0xfffffe30 0xf>;
5e8b3bc3 89 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
cce783c6
HX		 90 };
91
92 shdwc@fffffe10 {
93 compatible = "atmel,at91sam9x5-shdwc";
94 reg = <0xfffffe10 0x10>;
95 };
96
9873137a
LD		 97 mmc0: mmc@f0008000 {
98 compatible = "atmel,hsmci";
99 reg = <0xf0008000 0x600>;
5e8b3bc3 100 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 101 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 102 dma-names = "rxtx";
9873137a
LD		 103 #address-cells = <1>;
104 #size-cells = <0>;
105 status = "disabled";
106 };
107
cce783c6
HX		 108 tcb0: timer@f8008000 {
109 compatible = "atmel,at91sam9x5-tcb";
110 reg = <0xf8008000 0x100>;
5e8b3bc3 111 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
cce783c6
HX		 112 };
113
114 tcb1: timer@f800c000 {
115 compatible = "atmel,at91sam9x5-tcb";
116 reg = <0xf800c000 0x100>;
5e8b3bc3 117 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
cce783c6
HX		 118 };
119
120 dma: dma-controller@ffffec00 {
121 compatible = "atmel,at91sam9g45-dma";
122 reg = <0xffffec00 0x200>;
5e8b3bc3 123 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 124 #dma-cells = <2>;
cce783c6
HX		 125 };
126
e4541ff2
JCPV		 127 pinctrl@fffff400 {
128 #address-cells = <1>;
129 #size-cells = <1>;
5314ec8e 130 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2
JCPV		 131 ranges = <0xfffff400 0xfffff400 0x800>;
132
5314ec8e
JCPV		 133 atmel,mux-mask = <
134 /* A B C */
135 0xffffffff 0xffe07983 0x00000000 /* pioA */
136 0x00040000 0x00047e0f 0x00000000 /* pioB */
137 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
138 0x003fffff 0x003f8000 0x00000000 /* pioD */
139 >;
140
141 /* shared pinctrl settings */
ec6754a7
JCPV		 142 dbgu {
143 pinctrl_dbgu: dbgu-0 {
144 atmel,pins =
c9d0f317
JCPV		 145 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
146 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
ec6754a7
JCPV		 147 };
148 };
149
9e3129e9
JCPV		 150 usart0 {
151 pinctrl_usart0: usart0-0 {
ec6754a7 152 atmel,pins =
c9d0f317
JCPV		 153 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
154 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
ec6754a7
JCPV		 155 };
156
c58c0c5a 157 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 158 atmel,pins =
c9d0f317 159 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
c58c0c5a
JCPV		 160 };
161
162 pinctrl_usart0_cts: usart0_cts-0 {
163 atmel,pins =
c9d0f317 164 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
ec6754a7
JCPV		 165 };
166 };
167
9e3129e9
JCPV		 168 usart1 {
169 pinctrl_usart1: usart1-0 {
ec6754a7 170 atmel,pins =
c9d0f317
JCPV		 171 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
172 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
ec6754a7
JCPV		 173 };
174 };
175
9e3129e9
JCPV		 176 usart2 {
177 pinctrl_usart2: usart2-0 {
ec6754a7 178 atmel,pins =
c9d0f317
JCPV		 179 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
180 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
ec6754a7
JCPV		 181 };
182
c58c0c5a 183 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 184 atmel,pins =
c9d0f317 185 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
c58c0c5a
JCPV		 186 };
187
188 pinctrl_usart2_cts: usart2_cts-0 {
189 atmel,pins =
c9d0f317 190 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
ec6754a7
JCPV		 191 };
192 };
193
9e3129e9
JCPV		 194 usart3 {
195 pinctrl_usart3: usart3-0 {
ec6754a7 196 atmel,pins =
c9d0f317
JCPV		 197 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
198 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
ec6754a7
JCPV		 199 };
200
c58c0c5a
JCPV		 201 pinctrl_usart3_rts: usart3_rts-0 {
202 atmel,pins =
c9d0f317 203 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
c58c0c5a
JCPV		 204 };
205
206 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 207 atmel,pins =
c9d0f317 208 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
ec6754a7
JCPV		 209 };
210 };
211
9e3129e9
JCPV		 212 uart0 {
213 pinctrl_uart0: uart0-0 {
ec6754a7 214 atmel,pins =
c9d0f317
JCPV		 215 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
216 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
ec6754a7
JCPV		 217 };
218 };
219
9e3129e9
JCPV		 220 uart1 {
221 pinctrl_uart1: uart1-0 {
ec6754a7 222 atmel,pins =
c9d0f317
JCPV		 223 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
224 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
ec6754a7
JCPV		 225 };
226 };
5314ec8e 227
7a38d450
JCPV		 228 nand {
229 pinctrl_nand: nand-0 {
230 atmel,pins =
c9d0f317
JCPV		 231 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
232 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
7a38d450
JCPV		 233 };
234 };
235
d4fe9ac7
JCPV		 236 mmc0 {
237 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
238 atmel,pins =
c9d0f317
JCPV		 239 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
240 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
241 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
d4fe9ac7
JCPV		 242 };
243
244 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
245 atmel,pins =
c9d0f317
JCPV		 246 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
247 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
248 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7
JCPV		 249 };
250
251 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
252 atmel,pins =
c9d0f317
JCPV		 253 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
254 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
255 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
256 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
d4fe9ac7
JCPV		 257 };
258 };
259
544ae6b2
BS		 260 ssc0 {
261 pinctrl_ssc0_tx: ssc0_tx-0 {
262 atmel,pins =
c9d0f317
JCPV		 263 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
264 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
265 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
544ae6b2
BS		 266 };
267
268 pinctrl_ssc0_rx: ssc0_rx-0 {
269 atmel,pins =
c9d0f317
JCPV		 270 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
271 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
272 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
544ae6b2
BS		 273 };
274 };
275
a68b728f
WY		 276 spi0 {
277 pinctrl_spi0: spi0-0 {
278 atmel,pins =
c9d0f317
JCPV		 279 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
280 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
281 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
a68b728f
WY		 282 };
283 };
284
285 spi1 {
286 pinctrl_spi1: spi1-0 {
287 atmel,pins =
c9d0f317
JCPV		 288 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
289 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
290 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
a68b728f
WY		 291 };
292 };
293
1f84d27b 294 i2c0 {
295 pinctrl_i2c0: i2c0-0 {
296 atmel,pins =
297 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
298 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
299 };
300 };
301
302 i2c1 {
303 pinctrl_i2c1: i2c1-0 {
304 atmel,pins =
305 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
306 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
307 };
308 };
309
028633c2
BB		 310 tcb0 {
311 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
312 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
313 };
314
315 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
316 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
317 };
318
319 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
320 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
321 };
322
323 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
324 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326
327 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
328 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
329 };
330
331 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
332 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
333 };
334
335 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
336 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
337 };
338
339 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
340 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
341 };
342
343 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
344 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
345 };
346 };
347
348 tcb1 {
349 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
350 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
351 };
352
353 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
354 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
355 };
356
357 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
358 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
359 };
360
361 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
362 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
363 };
364
365 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
366 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
367 };
368
369 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
370 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
371 };
372
373 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
374 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
375 };
376
377 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
378 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
382 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
a68b728f
WY		 383 };
384 };
385
e4541ff2
JCPV		 386 pioA: gpio@fffff400 {
387 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
388 reg = <0xfffff400 0x200>;
5e8b3bc3 389 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 390 #gpio-cells = <2>;
391 gpio-controller;
392 interrupt-controller;
393 #interrupt-cells = <2>;
394 };
395
396 pioB: gpio@fffff600 {
397 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
398 reg = <0xfffff600 0x200>;
5e8b3bc3 399 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 400 #gpio-cells = <2>;
401 gpio-controller;
402 interrupt-controller;
403 #interrupt-cells = <2>;
404 };
405
406 pioC: gpio@fffff800 {
407 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
408 reg = <0xfffff800 0x200>;
5e8b3bc3 409 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 410 #gpio-cells = <2>;
411 gpio-controller;
412 interrupt-controller;
413 #interrupt-cells = <2>;
414 };
415
416 pioD: gpio@fffffa00 {
417 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
418 reg = <0xfffffa00 0x200>;
5e8b3bc3 419 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 420 #gpio-cells = <2>;
421 gpio-controller;
422 interrupt-controller;
423 #interrupt-cells = <2>;
424 };
cce783c6
HX		 425 };
426
427 dbgu: serial@fffff200 {
428 compatible = "atmel,at91sam9260-usart";
429 reg = <0xfffff200 0x200>;
5e8b3bc3 430 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_dbgu>;
cce783c6
HX		 433 status = "disabled";
434 };
435
544ae6b2
BS		 436 ssc0: ssc@f0010000 {
437 compatible = "atmel,at91sam9g45-ssc";
438 reg = <0xf0010000 0x4000>;
5e8b3bc3 439 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
442 status = "disabled";
443 };
444
cce783c6
HX		 445 usart0: serial@f801c000 {
446 compatible = "atmel,at91sam9260-usart";
447 reg = <0xf801c000 0x4000>;
5e8b3bc3 448 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 449 pinctrl-names = "default";
9e3129e9 450 pinctrl-0 = <&pinctrl_usart0>;
cce783c6
HX		 451 status = "disabled";
452 };
453
454 usart1: serial@f8020000 {
455 compatible = "atmel,at91sam9260-usart";
456 reg = <0xf8020000 0x4000>;
5e8b3bc3 457 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 458 pinctrl-names = "default";
9e3129e9 459 pinctrl-0 = <&pinctrl_usart1>;
cce783c6
HX		 460 status = "disabled";
461 };
462
463 usart2: serial@f8024000 {
464 compatible = "atmel,at91sam9260-usart";
465 reg = <0xf8024000 0x4000>;
5e8b3bc3 466 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 467 pinctrl-names = "default";
9e3129e9 468 pinctrl-0 = <&pinctrl_usart2>;
cce783c6
HX		 469 status = "disabled";
470 };
471
472 usart3: serial@f8028000 {
473 compatible = "atmel,at91sam9260-usart";
474 reg = <0xf8028000 0x4000>;
5e8b3bc3 475 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 476 pinctrl-names = "default";
9e3129e9 477 pinctrl-0 = <&pinctrl_usart3>;
cce783c6
HX		 478 status = "disabled";
479 };
05dcd361
LD		 480
481 i2c0: i2c@f8010000 {
482 compatible = "atmel,at91sam9x5-i2c";
483 reg = <0xf8010000 0x100>;
5e8b3bc3 484 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 485 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
486 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
d9a63a45 487 dma-names = "tx", "rx";
05dcd361
LD		 488 #address-cells = <1>;
489 #size-cells = <0>;
1f84d27b 490 pinctrl-names = "default";
491 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 492 status = "disabled";
493 };
494
495 i2c1: i2c@f8014000 {
496 compatible = "atmel,at91sam9x5-i2c";
497 reg = <0xf8014000 0x100>;
5e8b3bc3 498 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 499 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
500 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
d9a63a45 501 dma-names = "tx", "rx";
05dcd361
LD		 502 #address-cells = <1>;
503 #size-cells = <0>;
1f84d27b 504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 506 status = "disabled";
507 };
d50f88a0
RG		 508
509 spi0: spi@f0000000 {
510 #address-cells = <1>;
511 #size-cells = <0>;
512 compatible = "atmel,at91rm9200-spi";
513 reg = <0xf0000000 0x100>;
5e8b3bc3 514 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
c07b000f
NF		 515 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
516 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
517 dma-names = "tx", "rx";
a68b728f
WY		 518 pinctrl-names = "default";
519 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 520 status = "disabled";
521 };
522
523 spi1: spi@f0004000 {
524 #address-cells = <1>;
525 #size-cells = <0>;
526 compatible = "atmel,at91rm9200-spi";
527 reg = <0xf0004000 0x100>;
5e8b3bc3 528 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
c07b000f
NF		 529 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
530 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
531 dma-names = "tx", "rx";
a68b728f
WY		 532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 534 status = "disabled";
535 };
136d3556
WY		 536
537 watchdog@fffffe40 {
538 compatible = "atmel,at91sam9260-wdt";
539 reg = <0xfffffe40 0x10>;
540 status = "disabled";
541 };
cce783c6
HX		 542 };
543
544 nand0: nand@40000000 {
545 compatible = "atmel,at91rm9200-nand";
546 #address-cells = <1>;
547 #size-cells = <1>;
548 reg = < 0x40000000 0x10000000
549 0xffffe000 0x00000600
550 0xffffe600 0x00000200
c18c6b29 551 0x00108000 0x00018000
cce783c6 552 >;
c18c6b29 553 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
cce783c6
HX		 554 atmel,nand-addr-offset = <21>;
555 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 556 pinctrl-names = "default";
557 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 558 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
559 &pioD 4 GPIO_ACTIVE_HIGH
cce783c6
HX		 560 0
561 >;
562 status = "disabled";
563 };
564
565 usb0: ohci@00500000 {
566 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
567 reg = <0x00500000 0x00100000>;
5e8b3bc3 568 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
cce783c6
HX		 569 status = "disabled";
570 };
571 };
572
573 i2c@0 {
574 compatible = "i2c-gpio";
92f8629b
JCPV		 575 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
576 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
cce783c6
HX		 577 >;
578 i2c-gpio,sda-open-drain;
579 i2c-gpio,scl-open-drain;
580 i2c-gpio,delay-us = <2>; /* ~100 kHz */
581 #address-cells = <1>;
582 #size-cells = <0>;
583 status = "disabled";
584 };
585};
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