]>
Commit | Line | Data |
---|---|---|
7aff448f AB |
1 | /* |
2 | * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC | |
3 | * | |
4 | * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com> | |
5 | * | |
6 | * Licensed under GPLv2 or later. | |
7 | */ | |
8 | ||
9 | #include "skeleton.dtsi" | |
10 | #include <dt-bindings/pinctrl/at91.h> | |
35d35aae | 11 | #include <dt-bindings/clock/at91.h> |
7aff448f AB |
12 | #include <dt-bindings/interrupt-controller/irq.h> |
13 | #include <dt-bindings/gpio/gpio.h> | |
a4c1d6c7 | 14 | #include <dt-bindings/pwm/pwm.h> |
7aff448f AB |
15 | |
16 | / { | |
17 | model = "Atmel AT91SAM9RL family SoC"; | |
18 | compatible = "atmel,at91sam9rl", "atmel,at91sam9"; | |
19 | interrupt-parent = <&aic>; | |
20 | ||
21 | aliases { | |
22 | serial0 = &dbgu; | |
23 | serial1 = &usart0; | |
24 | serial2 = &usart1; | |
25 | serial3 = &usart2; | |
26 | serial4 = &usart3; | |
27 | gpio0 = &pioA; | |
28 | gpio1 = &pioB; | |
29 | gpio2 = &pioC; | |
30 | gpio3 = &pioD; | |
31 | tcb0 = &tcb0; | |
32 | i2c0 = &i2c0; | |
33 | i2c1 = &i2c1; | |
34 | ssc0 = &ssc0; | |
35 | ssc1 = &ssc1; | |
a4c1d6c7 | 36 | pwm0 = &pwm0; |
7aff448f AB |
37 | }; |
38 | ||
39 | cpus { | |
40 | #address-cells = <0>; | |
41 | #size-cells = <0>; | |
42 | ||
43 | cpu { | |
44 | compatible = "arm,arm926ej-s"; | |
45 | device_type = "cpu"; | |
46 | }; | |
47 | }; | |
48 | ||
49 | memory { | |
50 | reg = <0x20000000 0x04000000>; | |
51 | }; | |
52 | ||
2078da96 BB |
53 | slow_xtal: slow_xtal { |
54 | compatible = "fixed-clock"; | |
55 | #clock-cells = <0>; | |
56 | clock-frequency = <0>; | |
57 | }; | |
58 | ||
59 | main_xtal: main_xtal { | |
60 | compatible = "fixed-clock"; | |
61 | #clock-cells = <0>; | |
62 | clock-frequency = <0>; | |
63 | }; | |
64 | ||
a4c1d6c7 AB |
65 | clocks { |
66 | adc_op_clk: adc_op_clk{ | |
67 | compatible = "fixed-clock"; | |
68 | #clock-cells = <0>; | |
69 | clock-frequency = <1000000>; | |
70 | }; | |
71 | }; | |
72 | ||
7aff448f AB |
73 | ahb { |
74 | compatible = "simple-bus"; | |
75 | #address-cells = <1>; | |
76 | #size-cells = <1>; | |
77 | ranges; | |
78 | ||
a4c1d6c7 AB |
79 | fb0: fb@00500000 { |
80 | compatible = "atmel,at91sam9rl-lcdc"; | |
81 | reg = <0x00500000 0x1000>; | |
82 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
83 | pinctrl-names = "default"; | |
84 | pinctrl-0 = <&pinctrl_fb>; | |
85 | clocks = <&lcd_clk>, <&lcd_clk>; | |
86 | clock-names = "hclk", "lcdc_clk"; | |
87 | status = "disabled"; | |
88 | }; | |
89 | ||
7aff448f AB |
90 | nand0: nand@40000000 { |
91 | compatible = "atmel,at91rm9200-nand"; | |
92 | #address-cells = <1>; | |
93 | #size-cells = <1>; | |
94 | reg = <0x40000000 0x10000000>, | |
95 | <0xffffe800 0x200>; | |
96 | atmel,nand-addr-offset = <21>; | |
97 | atmel,nand-cmd-offset = <22>; | |
98 | pinctrl-names = "default"; | |
99 | pinctrl-0 = <&pinctrl_nand>; | |
100 | gpios = <&pioD 17 GPIO_ACTIVE_HIGH>, | |
101 | <&pioB 6 GPIO_ACTIVE_HIGH>, | |
102 | <0>; | |
103 | status = "disabled"; | |
104 | }; | |
105 | ||
106 | apb { | |
107 | compatible = "simple-bus"; | |
108 | #address-cells = <1>; | |
109 | #size-cells = <1>; | |
110 | ranges; | |
111 | ||
112 | tcb0: timer@fffa0000 { | |
113 | compatible = "atmel,at91rm9200-tcb"; | |
114 | reg = <0xfffa0000 0x100>; | |
115 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, | |
116 | <17 IRQ_TYPE_LEVEL_HIGH 0>, | |
117 | <18 IRQ_TYPE_LEVEL_HIGH 0>; | |
8dc5d8e8 AB |
118 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; |
119 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
7aff448f AB |
120 | }; |
121 | ||
122 | mmc0: mmc@fffa4000 { | |
123 | compatible = "atmel,hsmci"; | |
124 | reg = <0xfffa4000 0x600>; | |
125 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; | |
126 | #address-cells = <1>; | |
127 | #size-cells = <0>; | |
128 | pinctrl-names = "default"; | |
8dc5d8e8 AB |
129 | clocks = <&mci0_clk>; |
130 | clock-names = "mci_clk"; | |
7aff448f AB |
131 | status = "disabled"; |
132 | }; | |
133 | ||
134 | i2c0: i2c@fffa8000 { | |
135 | compatible = "atmel,at91sam9260-i2c"; | |
136 | reg = <0xfffa8000 0x100>; | |
137 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | |
138 | #address-cells = <1>; | |
139 | #size-cells = <0>; | |
8dc5d8e8 | 140 | clocks = <&twi0_clk>; |
7aff448f AB |
141 | status = "disabled"; |
142 | }; | |
143 | ||
144 | i2c1: i2c@fffac000 { | |
145 | compatible = "atmel,at91sam9260-i2c"; | |
146 | reg = <0xfffac000 0x100>; | |
147 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; | |
148 | #address-cells = <1>; | |
149 | #size-cells = <0>; | |
150 | status = "disabled"; | |
151 | }; | |
152 | ||
153 | usart0: serial@fffb0000 { | |
154 | compatible = "atmel,at91sam9260-usart"; | |
155 | reg = <0xfffb0000 0x200>; | |
156 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | |
157 | atmel,use-dma-rx; | |
158 | atmel,use-dma-tx; | |
159 | pinctrl-names = "default"; | |
160 | pinctrl-0 = <&pinctrl_usart0>; | |
8dc5d8e8 AB |
161 | clocks = <&usart0_clk>; |
162 | clock-names = "usart"; | |
7aff448f AB |
163 | status = "disabled"; |
164 | }; | |
165 | ||
166 | usart1: serial@fffb4000 { | |
167 | compatible = "atmel,at91sam9260-usart"; | |
168 | reg = <0xfffb4000 0x200>; | |
169 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | |
170 | atmel,use-dma-rx; | |
171 | atmel,use-dma-tx; | |
172 | pinctrl-names = "default"; | |
173 | pinctrl-0 = <&pinctrl_usart1>; | |
8dc5d8e8 AB |
174 | clocks = <&usart1_clk>; |
175 | clock-names = "usart"; | |
7aff448f AB |
176 | status = "disabled"; |
177 | }; | |
178 | ||
179 | usart2: serial@fffb8000 { | |
180 | compatible = "atmel,at91sam9260-usart"; | |
181 | reg = <0xfffb8000 0x200>; | |
182 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | |
183 | atmel,use-dma-rx; | |
184 | atmel,use-dma-tx; | |
185 | pinctrl-names = "default"; | |
186 | pinctrl-0 = <&pinctrl_usart2>; | |
8dc5d8e8 AB |
187 | clocks = <&usart2_clk>; |
188 | clock-names = "usart"; | |
7aff448f AB |
189 | status = "disabled"; |
190 | }; | |
191 | ||
192 | usart3: serial@fffbc000 { | |
193 | compatible = "atmel,at91sam9260-usart"; | |
194 | reg = <0xfffbc000 0x200>; | |
195 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; | |
196 | atmel,use-dma-rx; | |
197 | atmel,use-dma-tx; | |
198 | pinctrl-names = "default"; | |
199 | pinctrl-0 = <&pinctrl_usart3>; | |
8dc5d8e8 AB |
200 | clocks = <&usart3_clk>; |
201 | clock-names = "usart"; | |
7aff448f AB |
202 | status = "disabled"; |
203 | }; | |
204 | ||
205 | ssc0: ssc@fffc0000 { | |
206 | compatible = "atmel,at91rm9200-ssc"; | |
207 | reg = <0xfffc0000 0x4000>; | |
208 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
209 | pinctrl-names = "default"; | |
210 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
211 | status = "disabled"; | |
212 | }; | |
213 | ||
214 | ssc1: ssc@fffc4000 { | |
215 | compatible = "atmel,at91rm9200-ssc"; | |
216 | reg = <0xfffc4000 0x4000>; | |
217 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
218 | pinctrl-names = "default"; | |
219 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
220 | status = "disabled"; | |
221 | }; | |
222 | ||
a4c1d6c7 AB |
223 | pwm0: pwm@fffc8000 { |
224 | compatible = "atmel,at91sam9rl-pwm"; | |
225 | reg = <0xfffc8000 0x300>; | |
226 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
227 | #pwm-cells = <3>; | |
228 | clocks = <&pwm_clk>; | |
229 | clock-names = "pwm_clk"; | |
230 | status = "disabled"; | |
231 | }; | |
232 | ||
7aff448f AB |
233 | spi0: spi@fffcc000 { |
234 | #address-cells = <1>; | |
235 | #size-cells = <0>; | |
236 | compatible = "atmel,at91rm9200-spi"; | |
237 | reg = <0xfffcc000 0x200>; | |
238 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | |
239 | pinctrl-names = "default"; | |
240 | pinctrl-0 = <&pinctrl_spi0>; | |
8dc5d8e8 AB |
241 | clocks = <&spi0_clk>; |
242 | clock-names = "spi_clk"; | |
7aff448f AB |
243 | status = "disabled"; |
244 | }; | |
245 | ||
a4c1d6c7 AB |
246 | adc0: adc@fffd0000 { |
247 | #address-cells = <1>; | |
248 | #size-cells = <0>; | |
249 | compatible = "atmel,at91sam9rl-adc"; | |
250 | reg = <0xfffd0000 0x100>; | |
251 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; | |
252 | clocks = <&adc_clk>, <&adc_op_clk>; | |
253 | clock-names = "adc_clk", "adc_op_clk"; | |
254 | atmel,adc-use-external-triggers; | |
255 | atmel,adc-channels-used = <0x3f>; | |
256 | atmel,adc-vref = <3300>; | |
257 | atmel,adc-startup-time = <40>; | |
258 | atmel,adc-res = <8 10>; | |
259 | atmel,adc-res-names = "lowres", "highres"; | |
260 | atmel,adc-use-res = "highres"; | |
261 | ||
262 | trigger@0 { | |
263 | reg = <0>; | |
264 | trigger-name = "timer-counter-0"; | |
265 | trigger-value = <0x1>; | |
266 | }; | |
267 | trigger@1 { | |
268 | reg = <1>; | |
269 | trigger-name = "timer-counter-1"; | |
270 | trigger-value = <0x3>; | |
271 | }; | |
272 | ||
273 | trigger@2 { | |
274 | reg = <2>; | |
275 | trigger-name = "timer-counter-2"; | |
276 | trigger-value = <0x5>; | |
277 | }; | |
278 | ||
279 | trigger@3 { | |
280 | reg = <3>; | |
281 | trigger-name = "external"; | |
282 | trigger-value = <0x13>; | |
283 | trigger-external; | |
284 | }; | |
285 | }; | |
286 | ||
287 | usb0: gadget@fffd4000 { | |
288 | #address-cells = <1>; | |
289 | #size-cells = <0>; | |
290 | compatible = "atmel,at91sam9rl-udc"; | |
291 | reg = <0x00600000 0x100000>, | |
292 | <0xfffd4000 0x4000>; | |
293 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; | |
294 | clocks = <&udphs_clk>, <&utmi>; | |
295 | clock-names = "pclk", "hclk"; | |
296 | status = "disabled"; | |
297 | ||
298 | ep0 { | |
299 | reg = <0>; | |
300 | atmel,fifo-size = <64>; | |
301 | atmel,nb-banks = <1>; | |
302 | }; | |
303 | ||
304 | ep1 { | |
305 | reg = <1>; | |
306 | atmel,fifo-size = <1024>; | |
307 | atmel,nb-banks = <2>; | |
308 | atmel,can-dma; | |
309 | atmel,can-isoc; | |
310 | }; | |
311 | ||
312 | ep2 { | |
313 | reg = <2>; | |
314 | atmel,fifo-size = <1024>; | |
315 | atmel,nb-banks = <2>; | |
316 | atmel,can-dma; | |
317 | atmel,can-isoc; | |
318 | }; | |
319 | ||
320 | ep3 { | |
321 | reg = <3>; | |
322 | atmel,fifo-size = <1024>; | |
323 | atmel,nb-banks = <3>; | |
324 | atmel,can-dma; | |
325 | }; | |
326 | ||
327 | ep4 { | |
328 | reg = <4>; | |
329 | atmel,fifo-size = <1024>; | |
330 | atmel,nb-banks = <3>; | |
331 | atmel,can-dma; | |
332 | }; | |
333 | ||
334 | ep5 { | |
335 | reg = <5>; | |
336 | atmel,fifo-size = <1024>; | |
337 | atmel,nb-banks = <3>; | |
338 | atmel,can-dma; | |
339 | atmel,can-isoc; | |
340 | }; | |
341 | ||
342 | ep6 { | |
343 | reg = <6>; | |
344 | atmel,fifo-size = <1024>; | |
345 | atmel,nb-banks = <3>; | |
346 | atmel,can-dma; | |
347 | atmel,can-isoc; | |
348 | }; | |
349 | }; | |
350 | ||
7aff448f AB |
351 | ramc0: ramc@ffffea00 { |
352 | compatible = "atmel,at91sam9260-sdramc"; | |
353 | reg = <0xffffea00 0x200>; | |
354 | }; | |
355 | ||
356 | aic: interrupt-controller@fffff000 { | |
357 | #interrupt-cells = <3>; | |
358 | compatible = "atmel,at91rm9200-aic"; | |
359 | interrupt-controller; | |
360 | reg = <0xfffff000 0x200>; | |
361 | atmel,external-irqs = <31>; | |
362 | }; | |
363 | ||
364 | dbgu: serial@fffff200 { | |
365 | compatible = "atmel,at91sam9260-usart"; | |
366 | reg = <0xfffff200 0x200>; | |
367 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
368 | pinctrl-names = "default"; | |
369 | pinctrl-0 = <&pinctrl_dbgu>; | |
8dc5d8e8 AB |
370 | clocks = <&mck>; |
371 | clock-names = "usart"; | |
7aff448f AB |
372 | status = "disabled"; |
373 | }; | |
374 | ||
375 | pinctrl@fffff400 { | |
376 | #address-cells = <1>; | |
377 | #size-cells = <1>; | |
378 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
379 | ranges = <0xfffff400 0xfffff400 0x800>; | |
380 | ||
381 | atmel,mux-mask = | |
382 | /* A B */ | |
383 | <0xffffffff 0xe05c6738>, /* pioA */ | |
384 | <0xffffffff 0x0000c780>, /* pioB */ | |
385 | <0xffffffff 0xe3ffff0e>, /* pioC */ | |
386 | <0x003fffff 0x0001ff3c>; /* pioD */ | |
387 | ||
388 | /* shared pinctrl settings */ | |
a4c1d6c7 AB |
389 | adc0 { |
390 | pinctrl_adc0_ts: adc0_ts-0 { | |
391 | atmel,pins = | |
392 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
393 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
394 | <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
395 | <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
396 | }; | |
397 | ||
398 | pinctrl_adc0_ad0: adc0_ad0-0 { | |
399 | atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
400 | }; | |
401 | ||
402 | pinctrl_adc0_ad1: adc0_ad1-0 { | |
403 | atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
404 | }; | |
405 | ||
406 | pinctrl_adc0_ad2: adc0_ad2-0 { | |
407 | atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
408 | }; | |
409 | ||
410 | pinctrl_adc0_ad3: adc0_ad3-0 { | |
411 | atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
412 | }; | |
413 | ||
414 | pinctrl_adc0_ad4: adc0_ad4-0 { | |
415 | atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
416 | }; | |
417 | ||
418 | pinctrl_adc0_ad5: adc0_ad5-0 { | |
419 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
420 | }; | |
421 | ||
422 | pinctrl_adc0_adtrg: adc0_adtrg-0 { | |
423 | atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
424 | }; | |
425 | }; | |
426 | ||
7aff448f AB |
427 | dbgu { |
428 | pinctrl_dbgu: dbgu-0 { | |
429 | atmel,pins = | |
430 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
431 | <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
432 | }; | |
433 | }; | |
434 | ||
a4c1d6c7 AB |
435 | fb { |
436 | pinctrl_fb: fb-0 { | |
437 | atmel,pins = | |
438 | <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
439 | <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
440 | <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
441 | <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
442 | <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
443 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
444 | <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
445 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
446 | <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
447 | <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
448 | <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
449 | <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
450 | <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
451 | <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
452 | <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
453 | <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
454 | <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
455 | <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
456 | <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
457 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
458 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
459 | }; | |
460 | }; | |
461 | ||
7aff448f AB |
462 | i2c_gpio0 { |
463 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
464 | atmel,pins = | |
465 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
466 | <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
467 | }; | |
468 | }; | |
469 | ||
470 | i2c_gpio1 { | |
471 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | |
472 | atmel,pins = | |
473 | <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
474 | <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
475 | }; | |
476 | }; | |
477 | ||
478 | mmc0 { | |
479 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
480 | atmel,pins = | |
481 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
482 | }; | |
483 | ||
484 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
485 | atmel,pins = | |
486 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
487 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
488 | }; | |
489 | ||
490 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
491 | atmel,pins = | |
492 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
493 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
494 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
495 | }; | |
496 | }; | |
497 | ||
498 | nand { | |
499 | pinctrl_nand: nand-0 { | |
500 | atmel,pins = | |
501 | <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, | |
502 | <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | |
503 | }; | |
504 | ||
505 | pinctrl_nand0_ale_cle: nand_ale_cle-0 { | |
506 | atmel,pins = | |
507 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
508 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
509 | }; | |
510 | ||
511 | pinctrl_nand0_oe_we: nand_oe_we-0 { | |
512 | atmel,pins = | |
513 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
514 | <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
515 | }; | |
516 | ||
517 | pinctrl_nand0_cs: nand_cs-0 { | |
518 | atmel,pins = | |
519 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
520 | }; | |
521 | }; | |
522 | ||
a4c1d6c7 AB |
523 | pwm0 { |
524 | pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { | |
525 | atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
526 | }; | |
527 | ||
528 | pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { | |
529 | atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
530 | }; | |
531 | ||
532 | pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { | |
533 | atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
534 | }; | |
535 | ||
536 | pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { | |
537 | atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
538 | }; | |
539 | ||
540 | pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { | |
541 | atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
542 | }; | |
543 | ||
544 | pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { | |
545 | atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
546 | }; | |
547 | ||
548 | pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { | |
549 | atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
550 | }; | |
551 | ||
552 | pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { | |
553 | atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
554 | }; | |
555 | ||
556 | pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { | |
557 | atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
558 | }; | |
559 | ||
560 | pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { | |
561 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
562 | }; | |
563 | ||
564 | pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { | |
565 | atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
566 | }; | |
567 | }; | |
568 | ||
569 | spi0 { | |
570 | pinctrl_spi0: spi0-0 { | |
571 | atmel,pins = | |
572 | <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
573 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
574 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
575 | }; | |
576 | }; | |
577 | ||
7aff448f AB |
578 | ssc0 { |
579 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
580 | atmel,pins = | |
581 | <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
582 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
583 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
584 | }; | |
585 | ||
586 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
587 | atmel,pins = | |
588 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
589 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
590 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
591 | }; | |
592 | }; | |
593 | ||
594 | ssc1 { | |
595 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
596 | atmel,pins = | |
597 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
598 | <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
599 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
600 | }; | |
601 | ||
602 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
603 | atmel,pins = | |
604 | <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
605 | <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
606 | <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
607 | }; | |
608 | }; | |
609 | ||
7aff448f AB |
610 | tcb0 { |
611 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
612 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
613 | }; | |
614 | ||
615 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
616 | atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
617 | }; | |
618 | ||
619 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
620 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
621 | }; | |
622 | ||
623 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
624 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
625 | }; | |
626 | ||
627 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
628 | atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
629 | }; | |
630 | ||
631 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
632 | atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
633 | }; | |
634 | ||
635 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
636 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
637 | }; | |
638 | ||
639 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
640 | atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
641 | }; | |
642 | ||
643 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
644 | atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
645 | }; | |
646 | }; | |
647 | ||
648 | usart0 { | |
649 | pinctrl_usart0: usart0-0 { | |
650 | atmel,pins = | |
651 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
652 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
653 | }; | |
654 | ||
655 | pinctrl_usart0_rts: usart0_rts-0 { | |
656 | atmel,pins = | |
657 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
658 | }; | |
659 | ||
660 | pinctrl_usart0_cts: usart0_cts-0 { | |
661 | atmel,pins = | |
662 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
663 | }; | |
664 | ||
665 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | |
666 | atmel,pins = | |
667 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
668 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
669 | }; | |
670 | ||
671 | pinctrl_usart0_dcd: usart0_dcd-0 { | |
672 | atmel,pins = | |
673 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
674 | }; | |
675 | ||
676 | pinctrl_usart0_ri: usart0_ri-0 { | |
677 | atmel,pins = | |
678 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
679 | }; | |
680 | ||
681 | pinctrl_usart0_sck: usart0_sck-0 { | |
682 | atmel,pins = | |
683 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
684 | }; | |
685 | }; | |
686 | ||
687 | usart1 { | |
688 | pinctrl_usart1: usart1-0 { | |
689 | atmel,pins = | |
690 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
691 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
692 | }; | |
693 | ||
694 | pinctrl_usart1_rts: usart1_rts-0 { | |
695 | atmel,pins = | |
696 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
697 | }; | |
698 | ||
699 | pinctrl_usart1_cts: usart1_cts-0 { | |
700 | atmel,pins = | |
701 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
702 | }; | |
703 | ||
704 | pinctrl_usart1_sck: usart1_sck-0 { | |
705 | atmel,pins = | |
706 | <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
707 | }; | |
708 | }; | |
709 | ||
710 | usart2 { | |
711 | pinctrl_usart2: usart2-0 { | |
712 | atmel,pins = | |
713 | <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
714 | <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
715 | }; | |
716 | ||
717 | pinctrl_usart2_rts: usart2_rts-0 { | |
718 | atmel,pins = | |
719 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
720 | }; | |
721 | ||
722 | pinctrl_usart2_cts: usart2_cts-0 { | |
723 | atmel,pins = | |
724 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
725 | }; | |
726 | ||
727 | pinctrl_usart2_sck: usart2_sck-0 { | |
728 | atmel,pins = | |
729 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
730 | }; | |
731 | }; | |
732 | ||
733 | usart3 { | |
734 | pinctrl_usart3: usart3-0 { | |
735 | atmel,pins = | |
736 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
737 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
738 | }; | |
739 | ||
740 | pinctrl_usart3_rts: usart3_rts-0 { | |
741 | atmel,pins = | |
742 | <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
743 | }; | |
744 | ||
745 | pinctrl_usart3_cts: usart3_cts-0 { | |
746 | atmel,pins = | |
747 | <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
748 | }; | |
749 | ||
750 | pinctrl_usart3_sck: usart3_sck-0 { | |
751 | atmel,pins = | |
752 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
753 | }; | |
754 | }; | |
755 | ||
756 | pioA: gpio@fffff400 { | |
757 | compatible = "atmel,at91rm9200-gpio"; | |
758 | reg = <0xfffff400 0x200>; | |
759 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | |
760 | #gpio-cells = <2>; | |
761 | gpio-controller; | |
762 | interrupt-controller; | |
763 | #interrupt-cells = <2>; | |
8dc5d8e8 | 764 | clocks = <&pioA_clk>; |
7aff448f AB |
765 | }; |
766 | ||
767 | pioB: gpio@fffff600 { | |
768 | compatible = "atmel,at91rm9200-gpio"; | |
769 | reg = <0xfffff600 0x200>; | |
770 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | |
771 | #gpio-cells = <2>; | |
772 | gpio-controller; | |
773 | interrupt-controller; | |
774 | #interrupt-cells = <2>; | |
8dc5d8e8 | 775 | clocks = <&pioB_clk>; |
7aff448f AB |
776 | }; |
777 | ||
778 | pioC: gpio@fffff800 { | |
779 | compatible = "atmel,at91rm9200-gpio"; | |
780 | reg = <0xfffff800 0x200>; | |
781 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | |
782 | #gpio-cells = <2>; | |
783 | gpio-controller; | |
784 | interrupt-controller; | |
785 | #interrupt-cells = <2>; | |
8dc5d8e8 | 786 | clocks = <&pioC_clk>; |
7aff448f AB |
787 | }; |
788 | ||
789 | pioD: gpio@fffffa00 { | |
790 | compatible = "atmel,at91rm9200-gpio"; | |
791 | reg = <0xfffffa00 0x200>; | |
792 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; | |
793 | #gpio-cells = <2>; | |
794 | gpio-controller; | |
795 | interrupt-controller; | |
796 | #interrupt-cells = <2>; | |
8dc5d8e8 | 797 | clocks = <&pioD_clk>; |
7aff448f AB |
798 | }; |
799 | }; | |
800 | ||
801 | pmc: pmc@fffffc00 { | |
8dc5d8e8 | 802 | compatible = "atmel,at91sam9g45-pmc"; |
7aff448f | 803 | reg = <0xfffffc00 0x100>; |
8dc5d8e8 AB |
804 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
805 | interrupt-controller; | |
806 | #address-cells = <1>; | |
807 | #size-cells = <0>; | |
808 | #interrupt-cells = <1>; | |
809 | ||
8dc5d8e8 AB |
810 | main: mainck { |
811 | compatible = "atmel,at91rm9200-clk-main"; | |
812 | #clock-cells = <0>; | |
813 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
2078da96 | 814 | clocks = <&main_xtal>; |
8dc5d8e8 AB |
815 | }; |
816 | ||
817 | plla: pllack { | |
818 | compatible = "atmel,at91rm9200-clk-pll"; | |
819 | #clock-cells = <0>; | |
820 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
821 | clocks = <&main>; | |
822 | reg = <0>; | |
823 | atmel,clk-input-range = <1000000 32000000>; | |
201d7dd0 AB |
824 | #atmel,pll-clk-output-range-cells = <3>; |
825 | atmel,pll-clk-output-ranges = <80000000 200000000 0>, | |
826 | <190000000 240000000 2>; | |
8dc5d8e8 AB |
827 | }; |
828 | ||
829 | utmi: utmick { | |
830 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
831 | #clock-cells = <0>; | |
832 | interrupt-parent = <&pmc>; | |
833 | interrupts = <AT91_PMC_LOCKU>; | |
834 | clocks = <&main>; | |
835 | }; | |
836 | ||
837 | mck: masterck { | |
838 | compatible = "atmel,at91rm9200-clk-master"; | |
839 | #clock-cells = <0>; | |
840 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
841 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; | |
842 | atmel,clk-output-range = <0 94000000>; | |
201d7dd0 | 843 | atmel,clk-divisors = <1 2 4 0>; |
8dc5d8e8 AB |
844 | }; |
845 | ||
846 | prog: progck { | |
847 | compatible = "atmel,at91rm9200-clk-programmable"; | |
848 | #address-cells = <1>; | |
849 | #size-cells = <0>; | |
850 | interrupt-parent = <&pmc>; | |
851 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; | |
852 | ||
853 | prog0: prog0 { | |
854 | #clock-cells = <0>; | |
855 | reg = <0>; | |
856 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
857 | }; | |
858 | ||
859 | prog1: prog1 { | |
860 | #clock-cells = <0>; | |
861 | reg = <1>; | |
862 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
863 | }; | |
864 | }; | |
865 | ||
866 | systemck { | |
867 | compatible = "atmel,at91rm9200-clk-system"; | |
868 | #address-cells = <1>; | |
869 | #size-cells = <0>; | |
870 | ||
871 | pck0: pck0 { | |
872 | #clock-cells = <0>; | |
873 | reg = <8>; | |
874 | clocks = <&prog0>; | |
875 | }; | |
876 | ||
877 | pck1: pck1 { | |
878 | #clock-cells = <0>; | |
879 | reg = <9>; | |
880 | clocks = <&prog1>; | |
881 | }; | |
882 | ||
883 | }; | |
884 | ||
885 | periphck { | |
886 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
887 | #address-cells = <1>; | |
888 | #size-cells = <0>; | |
889 | clocks = <&mck>; | |
890 | ||
891 | pioA_clk: pioA_clk { | |
892 | #clock-cells = <0>; | |
893 | reg = <2>; | |
894 | }; | |
895 | ||
896 | pioB_clk: pioB_clk { | |
897 | #clock-cells = <0>; | |
898 | reg = <3>; | |
899 | }; | |
900 | ||
901 | pioC_clk: pioC_clk { | |
902 | #clock-cells = <0>; | |
903 | reg = <4>; | |
904 | }; | |
905 | ||
906 | pioD_clk: pioD_clk { | |
907 | #clock-cells = <0>; | |
908 | reg = <5>; | |
909 | }; | |
910 | ||
911 | usart0_clk: usart0_clk { | |
912 | #clock-cells = <0>; | |
913 | reg = <6>; | |
914 | }; | |
915 | ||
916 | usart1_clk: usart1_clk { | |
917 | #clock-cells = <0>; | |
918 | reg = <7>; | |
919 | }; | |
920 | ||
921 | usart2_clk: usart2_clk { | |
922 | #clock-cells = <0>; | |
923 | reg = <8>; | |
924 | }; | |
925 | ||
926 | usart3_clk: usart3_clk { | |
927 | #clock-cells = <0>; | |
928 | reg = <9>; | |
929 | }; | |
930 | ||
931 | mci0_clk: mci0_clk { | |
932 | #clock-cells = <0>; | |
933 | reg = <10>; | |
934 | }; | |
935 | ||
936 | twi0_clk: twi0_clk { | |
937 | #clock-cells = <0>; | |
938 | reg = <11>; | |
939 | }; | |
940 | ||
941 | twi1_clk: twi1_clk { | |
942 | #clock-cells = <0>; | |
943 | reg = <12>; | |
944 | }; | |
945 | ||
946 | spi0_clk: spi0_clk { | |
947 | #clock-cells = <0>; | |
948 | reg = <13>; | |
949 | }; | |
950 | ||
951 | ssc0_clk: ssc0_clk { | |
952 | #clock-cells = <0>; | |
953 | reg = <14>; | |
954 | }; | |
955 | ||
956 | ssc1_clk: ssc1_clk { | |
957 | #clock-cells = <0>; | |
958 | reg = <15>; | |
959 | }; | |
960 | ||
961 | tc0_clk: tc0_clk { | |
962 | #clock-cells = <0>; | |
963 | reg = <16>; | |
964 | }; | |
965 | ||
966 | tc1_clk: tc1_clk { | |
967 | #clock-cells = <0>; | |
968 | reg = <17>; | |
969 | }; | |
970 | ||
971 | tc2_clk: tc2_clk { | |
972 | #clock-cells = <0>; | |
973 | reg = <18>; | |
974 | }; | |
975 | ||
976 | pwm_clk: pwm_clk { | |
977 | #clock-cells = <0>; | |
978 | reg = <19>; | |
979 | }; | |
980 | ||
981 | adc_clk: adc_clk { | |
982 | #clock-cells = <0>; | |
983 | reg = <20>; | |
984 | }; | |
985 | ||
986 | dma0_clk: dma0_clk { | |
987 | #clock-cells = <0>; | |
988 | reg = <21>; | |
989 | }; | |
990 | ||
991 | udphs_clk: udphs_clk { | |
992 | #clock-cells = <0>; | |
993 | reg = <22>; | |
994 | }; | |
995 | ||
996 | lcd_clk: lcd_clk { | |
997 | #clock-cells = <0>; | |
998 | reg = <23>; | |
999 | }; | |
1000 | }; | |
7aff448f AB |
1001 | }; |
1002 | ||
1003 | rstc@fffffd00 { | |
1004 | compatible = "atmel,at91sam9260-rstc"; | |
1005 | reg = <0xfffffd00 0x10>; | |
1006 | }; | |
1007 | ||
1008 | shdwc@fffffd10 { | |
1009 | compatible = "atmel,at91sam9260-shdwc"; | |
1010 | reg = <0xfffffd10 0x10>; | |
1011 | }; | |
1012 | ||
1013 | pit: timer@fffffd30 { | |
1014 | compatible = "atmel,at91sam9260-pit"; | |
1015 | reg = <0xfffffd30 0xf>; | |
1016 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
8dc5d8e8 | 1017 | clocks = <&mck>; |
7aff448f AB |
1018 | }; |
1019 | ||
1020 | watchdog@fffffd40 { | |
1021 | compatible = "atmel,at91sam9260-wdt"; | |
1022 | reg = <0xfffffd40 0x10>; | |
1023 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1024 | status = "disabled"; | |
1025 | }; | |
2078da96 BB |
1026 | |
1027 | sckc@fffffd50 { | |
1028 | compatible = "atmel,at91sam9x5-sckc"; | |
1029 | reg = <0xfffffd50 0x4>; | |
1030 | ||
1031 | slow_osc: slow_osc { | |
1032 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
1033 | #clock-cells = <0>; | |
1034 | atmel,startup-time-usec = <1200000>; | |
1035 | clocks = <&slow_xtal>; | |
1036 | }; | |
1037 | ||
1038 | slow_rc_osc: slow_rc_osc { | |
1039 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
1040 | #clock-cells = <0>; | |
1041 | atmel,startup-time-usec = <75>; | |
1042 | clock-frequency = <32768>; | |
1043 | clock-accuracy = <50000000>; | |
1044 | }; | |
1045 | ||
1046 | clk32k: slck { | |
1047 | compatible = "atmel,at91sam9x5-clk-slow"; | |
1048 | #clock-cells = <0>; | |
1049 | clocks = <&slow_rc_osc &slow_osc>; | |
1050 | }; | |
1051 | }; | |
7aff448f AB |
1052 | }; |
1053 | }; | |
1054 | ||
1055 | i2c@0 { | |
1056 | compatible = "i2c-gpio"; | |
1057 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ | |
1058 | <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ | |
1059 | i2c-gpio,sda-open-drain; | |
1060 | i2c-gpio,scl-open-drain; | |
1061 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1062 | #address-cells = <1>; | |
1063 | #size-cells = <0>; | |
1064 | pinctrl-names = "default"; | |
1065 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
1066 | status = "disabled"; | |
1067 | }; | |
1068 | ||
1069 | i2c@1 { | |
1070 | compatible = "i2c-gpio"; | |
1071 | gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ | |
1072 | <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ | |
1073 | i2c-gpio,sda-open-drain; | |
1074 | i2c-gpio,scl-open-drain; | |
1075 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1076 | #address-cells = <1>; | |
1077 | #size-cells = <0>; | |
1078 | pinctrl-names = "default"; | |
1079 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | |
1080 | status = "disabled"; | |
1081 | }; | |
1082 | }; |