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467f1cf5 NF |
1 | /* |
2 | * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC | |
3 | * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, | |
4 | * AT91SAM9X25, AT91SAM9X35 SoC | |
5 | * | |
6 | * Copyright (C) 2012 Atmel, | |
7 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> | |
8 | * | |
9 | * Licensed under GPLv2 or later. | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | model = "Atmel AT91SAM9x5 family SoC"; | |
16 | compatible = "atmel,at91sam9x5"; | |
17 | interrupt-parent = <&aic>; | |
18 | ||
19 | aliases { | |
20 | serial0 = &dbgu; | |
21 | serial1 = &usart0; | |
22 | serial2 = &usart1; | |
23 | serial3 = &usart2; | |
24 | gpio0 = &pioA; | |
25 | gpio1 = &pioB; | |
26 | gpio2 = &pioC; | |
27 | gpio3 = &pioD; | |
28 | tcb0 = &tcb0; | |
29 | tcb1 = &tcb1; | |
30 | }; | |
31 | cpus { | |
32 | cpu@0 { | |
33 | compatible = "arm,arm926ejs"; | |
34 | }; | |
35 | }; | |
36 | ||
37 | memory@20000000 { | |
38 | reg = <0x20000000 0x10000000>; | |
39 | }; | |
40 | ||
41 | ahb { | |
42 | compatible = "simple-bus"; | |
43 | #address-cells = <1>; | |
44 | #size-cells = <1>; | |
45 | ranges; | |
46 | ||
47 | apb { | |
48 | compatible = "simple-bus"; | |
49 | #address-cells = <1>; | |
50 | #size-cells = <1>; | |
51 | ranges; | |
52 | ||
53 | aic: interrupt-controller@fffff000 { | |
54 | #interrupt-cells = <2>; | |
55 | compatible = "atmel,at91rm9200-aic"; | |
56 | interrupt-controller; | |
57 | interrupt-parent; | |
58 | reg = <0xfffff000 0x200>; | |
59 | }; | |
60 | ||
a7776ec6 JCPV |
61 | ramc0: ramc@ffffe800 { |
62 | compatible = "atmel,at91sam9g45-ddramc"; | |
63 | reg = <0xffffe800 0x200>; | |
64 | }; | |
65 | ||
eb5e76ff JCPV |
66 | pmc: pmc@fffffc00 { |
67 | compatible = "atmel,at91rm9200-pmc"; | |
68 | reg = <0xfffffc00 0x100>; | |
69 | }; | |
70 | ||
c8082d34 JCPV |
71 | rstc@fffffe00 { |
72 | compatible = "atmel,at91sam9g45-rstc"; | |
73 | reg = <0xfffffe00 0x10>; | |
74 | }; | |
75 | ||
82015c4e JCPV |
76 | shdwc@fffffe10 { |
77 | compatible = "atmel,at91sam9x5-shdwc"; | |
78 | reg = <0xfffffe10 0x10>; | |
79 | }; | |
80 | ||
467f1cf5 NF |
81 | pit: timer@fffffe30 { |
82 | compatible = "atmel,at91sam9260-pit"; | |
83 | reg = <0xfffffe30 0xf>; | |
84 | interrupts = <1 4>; | |
85 | }; | |
86 | ||
87 | tcb0: timer@f8008000 { | |
88 | compatible = "atmel,at91sam9x5-tcb"; | |
89 | reg = <0xf8008000 0x100>; | |
90 | interrupts = <17 4>; | |
91 | }; | |
92 | ||
93 | tcb1: timer@f800c000 { | |
94 | compatible = "atmel,at91sam9x5-tcb"; | |
95 | reg = <0xf800c000 0x100>; | |
96 | interrupts = <17 4>; | |
97 | }; | |
98 | ||
99 | dma0: dma-controller@ffffec00 { | |
100 | compatible = "atmel,at91sam9g45-dma"; | |
101 | reg = <0xffffec00 0x200>; | |
102 | interrupts = <20 4>; | |
103 | }; | |
104 | ||
105 | dma1: dma-controller@ffffee00 { | |
106 | compatible = "atmel,at91sam9g45-dma"; | |
107 | reg = <0xffffee00 0x200>; | |
108 | interrupts = <21 4>; | |
109 | }; | |
110 | ||
111 | pioA: gpio@fffff400 { | |
582d5fbd | 112 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
467f1cf5 NF |
113 | reg = <0xfffff400 0x100>; |
114 | interrupts = <2 4>; | |
115 | #gpio-cells = <2>; | |
116 | gpio-controller; | |
21f81872 | 117 | interrupt-controller; |
467f1cf5 NF |
118 | }; |
119 | ||
120 | pioB: gpio@fffff600 { | |
582d5fbd | 121 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
467f1cf5 NF |
122 | reg = <0xfffff600 0x100>; |
123 | interrupts = <2 4>; | |
124 | #gpio-cells = <2>; | |
125 | gpio-controller; | |
21f81872 | 126 | interrupt-controller; |
467f1cf5 NF |
127 | }; |
128 | ||
129 | pioC: gpio@fffff800 { | |
582d5fbd | 130 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
467f1cf5 NF |
131 | reg = <0xfffff800 0x100>; |
132 | interrupts = <3 4>; | |
133 | #gpio-cells = <2>; | |
134 | gpio-controller; | |
21f81872 | 135 | interrupt-controller; |
467f1cf5 NF |
136 | }; |
137 | ||
138 | pioD: gpio@fffffa00 { | |
582d5fbd | 139 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
467f1cf5 NF |
140 | reg = <0xfffffa00 0x100>; |
141 | interrupts = <3 4>; | |
142 | #gpio-cells = <2>; | |
143 | gpio-controller; | |
21f81872 | 144 | interrupt-controller; |
467f1cf5 NF |
145 | }; |
146 | ||
147 | dbgu: serial@fffff200 { | |
148 | compatible = "atmel,at91sam9260-usart"; | |
149 | reg = <0xfffff200 0x200>; | |
150 | interrupts = <1 4>; | |
151 | status = "disabled"; | |
152 | }; | |
153 | ||
154 | usart0: serial@f801c000 { | |
155 | compatible = "atmel,at91sam9260-usart"; | |
156 | reg = <0xf801c000 0x200>; | |
157 | interrupts = <5 4>; | |
158 | atmel,use-dma-rx; | |
159 | atmel,use-dma-tx; | |
160 | status = "disabled"; | |
161 | }; | |
162 | ||
163 | usart1: serial@f8020000 { | |
164 | compatible = "atmel,at91sam9260-usart"; | |
165 | reg = <0xf8020000 0x200>; | |
166 | interrupts = <6 4>; | |
167 | atmel,use-dma-rx; | |
168 | atmel,use-dma-tx; | |
169 | status = "disabled"; | |
170 | }; | |
171 | ||
172 | usart2: serial@f8024000 { | |
173 | compatible = "atmel,at91sam9260-usart"; | |
174 | reg = <0xf8024000 0x200>; | |
175 | interrupts = <7 4>; | |
176 | atmel,use-dma-rx; | |
177 | atmel,use-dma-tx; | |
178 | status = "disabled"; | |
179 | }; | |
180 | ||
181 | macb0: ethernet@f802c000 { | |
182 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
183 | reg = <0xf802c000 0x100>; | |
184 | interrupts = <24 4>; | |
185 | status = "disabled"; | |
186 | }; | |
187 | ||
188 | macb1: ethernet@f8030000 { | |
189 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
190 | reg = <0xf8030000 0x100>; | |
191 | interrupts = <27 4>; | |
192 | status = "disabled"; | |
193 | }; | |
194 | }; | |
86a89f4f JCPV |
195 | |
196 | nand0: nand@40000000 { | |
197 | compatible = "atmel,at91rm9200-nand"; | |
198 | #address-cells = <1>; | |
199 | #size-cells = <1>; | |
200 | reg = <0x40000000 0x10000000 | |
201 | >; | |
202 | atmel,nand-addr-offset = <21>; | |
203 | atmel,nand-cmd-offset = <22>; | |
204 | gpios = <&pioC 8 0 | |
205 | &pioC 14 0 | |
206 | 0 | |
207 | >; | |
208 | status = "disabled"; | |
209 | }; | |
6a062459 JCPV |
210 | |
211 | usb0: ohci@00600000 { | |
212 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
213 | reg = <0x00600000 0x100000>; | |
214 | interrupts = <22 4>; | |
215 | status = "disabled"; | |
216 | }; | |
62c5553a JCPV |
217 | |
218 | usb1: ehci@00700000 { | |
219 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
220 | reg = <0x00700000 0x100000>; | |
221 | interrupts = <22 4>; | |
222 | status = "disabled"; | |
223 | }; | |
467f1cf5 | 224 | }; |
10f71c28 JCPV |
225 | |
226 | i2c@0 { | |
227 | compatible = "i2c-gpio"; | |
228 | gpios = <&pioA 30 0 /* sda */ | |
229 | &pioA 31 0 /* scl */ | |
230 | >; | |
231 | i2c-gpio,sda-open-drain; | |
232 | i2c-gpio,scl-open-drain; | |
233 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
234 | #address-cells = <1>; | |
235 | #size-cells = <0>; | |
236 | status = "disabled"; | |
237 | }; | |
238 | ||
239 | i2c@1 { | |
240 | compatible = "i2c-gpio"; | |
241 | gpios = <&pioC 0 0 /* sda */ | |
242 | &pioC 1 0 /* scl */ | |
243 | >; | |
244 | i2c-gpio,sda-open-drain; | |
245 | i2c-gpio,scl-open-drain; | |
246 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
247 | #address-cells = <1>; | |
248 | #size-cells = <0>; | |
249 | status = "disabled"; | |
250 | }; | |
251 | ||
252 | i2c@2 { | |
253 | compatible = "i2c-gpio"; | |
254 | gpios = <&pioB 4 0 /* sda */ | |
255 | &pioB 5 0 /* scl */ | |
256 | >; | |
257 | i2c-gpio,sda-open-drain; | |
258 | i2c-gpio,scl-open-drain; | |
259 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
260 | #address-cells = <1>; | |
261 | #size-cells = <0>; | |
262 | status = "disabled"; | |
263 | }; | |
467f1cf5 | 264 | }; |