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Commit | Line | Data |
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467f1cf5 NF |
1 | /* |
2 | * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC | |
3 | * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, | |
4 | * AT91SAM9X25, AT91SAM9X35 SoC | |
5 | * | |
6 | * Copyright (C) 2012 Atmel, | |
7 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> | |
8 | * | |
9 | * Licensed under GPLv2 or later. | |
10 | */ | |
11 | ||
6db64d29 | 12 | #include "skeleton.dtsi" |
c9d0f317 | 13 | #include <dt-bindings/pinctrl/at91.h> |
5e8b3bc3 | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
92f8629b | 15 | #include <dt-bindings/gpio/gpio.h> |
467f1cf5 NF |
16 | |
17 | / { | |
18 | model = "Atmel AT91SAM9x5 family SoC"; | |
19 | compatible = "atmel,at91sam9x5"; | |
20 | interrupt-parent = <&aic>; | |
21 | ||
22 | aliases { | |
23 | serial0 = &dbgu; | |
24 | serial1 = &usart0; | |
25 | serial2 = &usart1; | |
26 | serial3 = &usart2; | |
27 | gpio0 = &pioA; | |
28 | gpio1 = &pioB; | |
29 | gpio2 = &pioC; | |
30 | gpio3 = &pioD; | |
31 | tcb0 = &tcb0; | |
32 | tcb1 = &tcb1; | |
05dcd361 LD |
33 | i2c0 = &i2c0; |
34 | i2c1 = &i2c1; | |
35 | i2c2 = &i2c2; | |
099343c6 | 36 | ssc0 = &ssc0; |
467f1cf5 NF |
37 | }; |
38 | cpus { | |
39 | cpu@0 { | |
40 | compatible = "arm,arm926ejs"; | |
41 | }; | |
42 | }; | |
43 | ||
dcce6ce8 | 44 | memory { |
467f1cf5 NF |
45 | reg = <0x20000000 0x10000000>; |
46 | }; | |
47 | ||
48 | ahb { | |
49 | compatible = "simple-bus"; | |
50 | #address-cells = <1>; | |
51 | #size-cells = <1>; | |
52 | ranges; | |
53 | ||
54 | apb { | |
55 | compatible = "simple-bus"; | |
56 | #address-cells = <1>; | |
57 | #size-cells = <1>; | |
58 | ranges; | |
59 | ||
60 | aic: interrupt-controller@fffff000 { | |
f8a073ee | 61 | #interrupt-cells = <3>; |
467f1cf5 NF |
62 | compatible = "atmel,at91rm9200-aic"; |
63 | interrupt-controller; | |
467f1cf5 | 64 | reg = <0xfffff000 0x200>; |
c6573943 | 65 | atmel,external-irqs = <31>; |
467f1cf5 NF |
66 | }; |
67 | ||
a7776ec6 JCPV |
68 | ramc0: ramc@ffffe800 { |
69 | compatible = "atmel,at91sam9g45-ddramc"; | |
70 | reg = <0xffffe800 0x200>; | |
71 | }; | |
72 | ||
eb5e76ff JCPV |
73 | pmc: pmc@fffffc00 { |
74 | compatible = "atmel,at91rm9200-pmc"; | |
75 | reg = <0xfffffc00 0x100>; | |
76 | }; | |
77 | ||
c8082d34 JCPV |
78 | rstc@fffffe00 { |
79 | compatible = "atmel,at91sam9g45-rstc"; | |
80 | reg = <0xfffffe00 0x10>; | |
81 | }; | |
82 | ||
82015c4e JCPV |
83 | shdwc@fffffe10 { |
84 | compatible = "atmel,at91sam9x5-shdwc"; | |
85 | reg = <0xfffffe10 0x10>; | |
86 | }; | |
87 | ||
467f1cf5 NF |
88 | pit: timer@fffffe30 { |
89 | compatible = "atmel,at91sam9260-pit"; | |
90 | reg = <0xfffffe30 0xf>; | |
5e8b3bc3 | 91 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
467f1cf5 NF |
92 | }; |
93 | ||
94 | tcb0: timer@f8008000 { | |
95 | compatible = "atmel,at91sam9x5-tcb"; | |
96 | reg = <0xf8008000 0x100>; | |
5e8b3bc3 | 97 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
467f1cf5 NF |
98 | }; |
99 | ||
100 | tcb1: timer@f800c000 { | |
101 | compatible = "atmel,at91sam9x5-tcb"; | |
102 | reg = <0xf800c000 0x100>; | |
5e8b3bc3 | 103 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
467f1cf5 NF |
104 | }; |
105 | ||
106 | dma0: dma-controller@ffffec00 { | |
107 | compatible = "atmel,at91sam9g45-dma"; | |
108 | reg = <0xffffec00 0x200>; | |
5e8b3bc3 | 109 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
980ce7d9 | 110 | #dma-cells = <2>; |
467f1cf5 NF |
111 | }; |
112 | ||
113 | dma1: dma-controller@ffffee00 { | |
114 | compatible = "atmel,at91sam9g45-dma"; | |
115 | reg = <0xffffee00 0x200>; | |
5e8b3bc3 | 116 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
980ce7d9 | 117 | #dma-cells = <2>; |
467f1cf5 NF |
118 | }; |
119 | ||
ec6754a7 | 120 | pinctrl@fffff400 { |
e4541ff2 JCPV |
121 | #address-cells = <1>; |
122 | #size-cells = <1>; | |
5314ec8e | 123 | compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
e4541ff2 JCPV |
124 | ranges = <0xfffff400 0xfffff400 0x800>; |
125 | ||
5314ec8e | 126 | /* shared pinctrl settings */ |
ec6754a7 JCPV |
127 | dbgu { |
128 | pinctrl_dbgu: dbgu-0 { | |
129 | atmel,pins = | |
c9d0f317 JCPV |
130 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ |
131 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */ | |
ec6754a7 JCPV |
132 | }; |
133 | }; | |
134 | ||
9e3129e9 JCPV |
135 | usart0 { |
136 | pinctrl_usart0: usart0-0 { | |
ec6754a7 | 137 | atmel,pins = |
c9d0f317 JCPV |
138 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */ |
139 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */ | |
ec6754a7 JCPV |
140 | }; |
141 | ||
c58c0c5a | 142 | pinctrl_usart0_rts: usart0_rts-0 { |
ec6754a7 | 143 | atmel,pins = |
c9d0f317 | 144 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ |
c58c0c5a JCPV |
145 | }; |
146 | ||
147 | pinctrl_usart0_cts: usart0_cts-0 { | |
148 | atmel,pins = | |
c9d0f317 | 149 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ |
ec6754a7 | 150 | }; |
1bab02ec RG |
151 | |
152 | pinctrl_usart0_sck: usart0_sck-0 { | |
153 | atmel,pins = | |
c9d0f317 | 154 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
1bab02ec | 155 | }; |
ec6754a7 JCPV |
156 | }; |
157 | ||
9e3129e9 JCPV |
158 | usart1 { |
159 | pinctrl_usart1: usart1-0 { | |
ec6754a7 | 160 | atmel,pins = |
c9d0f317 JCPV |
161 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */ |
162 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ | |
ec6754a7 JCPV |
163 | }; |
164 | ||
c58c0c5a JCPV |
165 | pinctrl_usart1_rts: usart1_rts-0 { |
166 | atmel,pins = | |
c9d0f317 | 167 | <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */ |
c58c0c5a JCPV |
168 | }; |
169 | ||
170 | pinctrl_usart1_cts: usart1_cts-0 { | |
ec6754a7 | 171 | atmel,pins = |
c9d0f317 | 172 | <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */ |
ec6754a7 | 173 | }; |
1bab02ec RG |
174 | |
175 | pinctrl_usart1_sck: usart1_sck-0 { | |
176 | atmel,pins = | |
c9d0f317 | 177 | <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */ |
1bab02ec | 178 | }; |
ec6754a7 JCPV |
179 | }; |
180 | ||
9e3129e9 JCPV |
181 | usart2 { |
182 | pinctrl_usart2: usart2-0 { | |
ec6754a7 | 183 | atmel,pins = |
c9d0f317 JCPV |
184 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
185 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ | |
ec6754a7 JCPV |
186 | }; |
187 | ||
c58c0c5a | 188 | pinctrl_uart2_rts: uart2_rts-0 { |
ec6754a7 | 189 | atmel,pins = |
c9d0f317 | 190 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
c58c0c5a JCPV |
191 | }; |
192 | ||
193 | pinctrl_uart2_cts: uart2_cts-0 { | |
194 | atmel,pins = | |
c9d0f317 | 195 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
ec6754a7 | 196 | }; |
1bab02ec RG |
197 | |
198 | pinctrl_usart2_sck: usart2_sck-0 { | |
199 | atmel,pins = | |
c9d0f317 | 200 | <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ |
1bab02ec | 201 | }; |
ec6754a7 JCPV |
202 | }; |
203 | ||
9e3129e9 | 204 | usart3 { |
65a0fe04 | 205 | pinctrl_usart3: usart3-0 { |
ec6754a7 | 206 | atmel,pins = |
c9d0f317 JCPV |
207 | <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ |
208 | AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ | |
ec6754a7 JCPV |
209 | }; |
210 | ||
c58c0c5a JCPV |
211 | pinctrl_usart3_rts: usart3_rts-0 { |
212 | atmel,pins = | |
c9d0f317 | 213 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ |
c58c0c5a JCPV |
214 | }; |
215 | ||
216 | pinctrl_usart3_cts: usart3_cts-0 { | |
ec6754a7 | 217 | atmel,pins = |
c9d0f317 | 218 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ |
ec6754a7 | 219 | }; |
1bab02ec RG |
220 | |
221 | pinctrl_usart3_sck: usart3_sck-0 { | |
222 | atmel,pins = | |
c9d0f317 | 223 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ |
1bab02ec | 224 | }; |
ec6754a7 JCPV |
225 | }; |
226 | ||
9e3129e9 JCPV |
227 | uart0 { |
228 | pinctrl_uart0: uart0-0 { | |
ec6754a7 | 229 | atmel,pins = |
c9d0f317 JCPV |
230 | <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */ |
231 | AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */ | |
ec6754a7 JCPV |
232 | }; |
233 | }; | |
234 | ||
9e3129e9 JCPV |
235 | uart1 { |
236 | pinctrl_uart1: uart1-0 { | |
ec6754a7 | 237 | atmel,pins = |
c9d0f317 JCPV |
238 | <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */ |
239 | AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */ | |
ec6754a7 JCPV |
240 | }; |
241 | }; | |
5314ec8e | 242 | |
7a38d450 JCPV |
243 | nand { |
244 | pinctrl_nand: nand-0 { | |
245 | atmel,pins = | |
c9d0f317 JCPV |
246 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */ |
247 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */ | |
248 | AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */ | |
249 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */ | |
250 | AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */ | |
251 | AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */ | |
252 | AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */ | |
253 | AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */ | |
254 | AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */ | |
255 | AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */ | |
256 | AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */ | |
257 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */ | |
258 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */ | |
259 | AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */ | |
7f06472f RG |
260 | }; |
261 | ||
262 | pinctrl_nand_16bits: nand_16bits-0 { | |
263 | atmel,pins = | |
c9d0f317 JCPV |
264 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */ |
265 | AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */ | |
266 | AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */ | |
267 | AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */ | |
268 | AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */ | |
269 | AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */ | |
270 | AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */ | |
271 | AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */ | |
7a38d450 JCPV |
272 | }; |
273 | }; | |
274 | ||
d9b4fe83 JCPV |
275 | macb0 { |
276 | pinctrl_macb0_rmii: macb0_rmii-0 { | |
277 | atmel,pins = | |
c9d0f317 JCPV |
278 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ |
279 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ | |
280 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ | |
281 | AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ | |
282 | AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ | |
283 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ | |
284 | AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ | |
285 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ | |
286 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ | |
287 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ | |
d9b4fe83 JCPV |
288 | }; |
289 | ||
290 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { | |
291 | atmel,pins = | |
c9d0f317 JCPV |
292 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ |
293 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ | |
294 | AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ | |
295 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ | |
296 | AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ | |
297 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ | |
298 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ | |
299 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ | |
d9b4fe83 JCPV |
300 | }; |
301 | }; | |
302 | ||
d4fe9ac7 JCPV |
303 | mmc0 { |
304 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | |
305 | atmel,pins = | |
c9d0f317 JCPV |
306 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
307 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ | |
308 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ | |
d4fe9ac7 JCPV |
309 | }; |
310 | ||
311 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
312 | atmel,pins = | |
c9d0f317 JCPV |
313 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ |
314 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ | |
315 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ | |
d4fe9ac7 JCPV |
316 | }; |
317 | }; | |
318 | ||
319 | mmc1 { | |
320 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | |
321 | atmel,pins = | |
c9d0f317 JCPV |
322 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */ |
323 | AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ | |
324 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */ | |
d4fe9ac7 JCPV |
325 | }; |
326 | ||
327 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
328 | atmel,pins = | |
c9d0f317 JCPV |
329 | <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */ |
330 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */ | |
331 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */ | |
d4fe9ac7 JCPV |
332 | }; |
333 | }; | |
334 | ||
544ae6b2 BS |
335 | ssc0 { |
336 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
337 | atmel,pins = | |
c9d0f317 JCPV |
338 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
339 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ | |
340 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ | |
544ae6b2 BS |
341 | }; |
342 | ||
343 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
344 | atmel,pins = | |
c9d0f317 JCPV |
345 | <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
346 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
347 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ | |
544ae6b2 BS |
348 | }; |
349 | }; | |
350 | ||
a68b728f WY |
351 | spi0 { |
352 | pinctrl_spi0: spi0-0 { | |
353 | atmel,pins = | |
c9d0f317 JCPV |
354 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ |
355 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ | |
356 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ | |
a68b728f WY |
357 | }; |
358 | }; | |
359 | ||
360 | spi1 { | |
361 | pinctrl_spi1: spi1-0 { | |
362 | atmel,pins = | |
c9d0f317 JCPV |
363 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ |
364 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ | |
365 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ | |
a68b728f WY |
366 | }; |
367 | }; | |
368 | ||
e9a72ee8 RG |
369 | i2c0 { |
370 | pinctrl_i2c0: i2c0-0 { | |
371 | atmel,pins = | |
c9d0f317 JCPV |
372 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */ |
373 | AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */ | |
e9a72ee8 RG |
374 | }; |
375 | }; | |
376 | ||
377 | i2c1 { | |
378 | pinctrl_i2c1: i2c1-0 { | |
379 | atmel,pins = | |
c9d0f317 JCPV |
380 | <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */ |
381 | AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */ | |
e9a72ee8 RG |
382 | }; |
383 | }; | |
384 | ||
385 | i2c2 { | |
386 | pinctrl_i2c2: i2c2-0 { | |
387 | atmel,pins = | |
c9d0f317 JCPV |
388 | <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */ |
389 | AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */ | |
e9a72ee8 RG |
390 | }; |
391 | }; | |
392 | ||
463c9c7b RG |
393 | i2c_gpio0 { |
394 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
395 | atmel,pins = | |
c9d0f317 JCPV |
396 | <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */ |
397 | AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */ | |
463c9c7b RG |
398 | }; |
399 | }; | |
400 | ||
401 | i2c_gpio1 { | |
402 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | |
403 | atmel,pins = | |
c9d0f317 JCPV |
404 | <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */ |
405 | AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */ | |
463c9c7b RG |
406 | }; |
407 | }; | |
408 | ||
409 | i2c_gpio2 { | |
410 | pinctrl_i2c_gpio2: i2c_gpio2-0 { | |
411 | atmel,pins = | |
c9d0f317 JCPV |
412 | <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */ |
413 | AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */ | |
463c9c7b RG |
414 | }; |
415 | }; | |
416 | ||
e4541ff2 JCPV |
417 | pioA: gpio@fffff400 { |
418 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
419 | reg = <0xfffff400 0x200>; | |
5e8b3bc3 | 420 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
421 | #gpio-cells = <2>; |
422 | gpio-controller; | |
423 | interrupt-controller; | |
424 | #interrupt-cells = <2>; | |
425 | }; | |
426 | ||
427 | pioB: gpio@fffff600 { | |
428 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
429 | reg = <0xfffff600 0x200>; | |
5e8b3bc3 | 430 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
431 | #gpio-cells = <2>; |
432 | gpio-controller; | |
fc33ff43 | 433 | #gpio-lines = <19>; |
e4541ff2 JCPV |
434 | interrupt-controller; |
435 | #interrupt-cells = <2>; | |
436 | }; | |
437 | ||
438 | pioC: gpio@fffff800 { | |
439 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
440 | reg = <0xfffff800 0x200>; | |
5e8b3bc3 | 441 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
442 | #gpio-cells = <2>; |
443 | gpio-controller; | |
444 | interrupt-controller; | |
445 | #interrupt-cells = <2>; | |
446 | }; | |
447 | ||
448 | pioD: gpio@fffffa00 { | |
449 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
450 | reg = <0xfffffa00 0x200>; | |
5e8b3bc3 | 451 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
452 | #gpio-cells = <2>; |
453 | gpio-controller; | |
fc33ff43 | 454 | #gpio-lines = <22>; |
e4541ff2 JCPV |
455 | interrupt-controller; |
456 | #interrupt-cells = <2>; | |
457 | }; | |
467f1cf5 NF |
458 | }; |
459 | ||
544ae6b2 BS |
460 | ssc0: ssc@f0010000 { |
461 | compatible = "atmel,at91sam9g45-ssc"; | |
462 | reg = <0xf0010000 0x4000>; | |
5e8b3bc3 | 463 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; |
544ae6b2 BS |
464 | pinctrl-names = "default"; |
465 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
466 | status = "disabled"; | |
467 | }; | |
468 | ||
9873137a LD |
469 | mmc0: mmc@f0008000 { |
470 | compatible = "atmel,hsmci"; | |
471 | reg = <0xf0008000 0x600>; | |
5e8b3bc3 | 472 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
05c1bc97 LD |
473 | dmas = <&dma0 1 0>; |
474 | dma-names = "rxtx"; | |
9873137a LD |
475 | #address-cells = <1>; |
476 | #size-cells = <0>; | |
477 | status = "disabled"; | |
478 | }; | |
479 | ||
480 | mmc1: mmc@f000c000 { | |
481 | compatible = "atmel,hsmci"; | |
482 | reg = <0xf000c000 0x600>; | |
5e8b3bc3 | 483 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
05c1bc97 LD |
484 | dmas = <&dma1 1 0>; |
485 | dma-names = "rxtx"; | |
9873137a LD |
486 | #address-cells = <1>; |
487 | #size-cells = <0>; | |
488 | status = "disabled"; | |
489 | }; | |
490 | ||
467f1cf5 NF |
491 | dbgu: serial@fffff200 { |
492 | compatible = "atmel,at91sam9260-usart"; | |
493 | reg = <0xfffff200 0x200>; | |
5e8b3bc3 | 494 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
ec6754a7 JCPV |
495 | pinctrl-names = "default"; |
496 | pinctrl-0 = <&pinctrl_dbgu>; | |
467f1cf5 NF |
497 | status = "disabled"; |
498 | }; | |
499 | ||
500 | usart0: serial@f801c000 { | |
501 | compatible = "atmel,at91sam9260-usart"; | |
502 | reg = <0xf801c000 0x200>; | |
5e8b3bc3 | 503 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 504 | pinctrl-names = "default"; |
9e3129e9 | 505 | pinctrl-0 = <&pinctrl_usart0>; |
467f1cf5 NF |
506 | status = "disabled"; |
507 | }; | |
508 | ||
509 | usart1: serial@f8020000 { | |
510 | compatible = "atmel,at91sam9260-usart"; | |
511 | reg = <0xf8020000 0x200>; | |
5e8b3bc3 | 512 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 513 | pinctrl-names = "default"; |
9e3129e9 | 514 | pinctrl-0 = <&pinctrl_usart1>; |
467f1cf5 NF |
515 | status = "disabled"; |
516 | }; | |
517 | ||
518 | usart2: serial@f8024000 { | |
519 | compatible = "atmel,at91sam9260-usart"; | |
520 | reg = <0xf8024000 0x200>; | |
5e8b3bc3 | 521 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 522 | pinctrl-names = "default"; |
9e3129e9 | 523 | pinctrl-0 = <&pinctrl_usart2>; |
467f1cf5 NF |
524 | status = "disabled"; |
525 | }; | |
526 | ||
527 | macb0: ethernet@f802c000 { | |
528 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
529 | reg = <0xf802c000 0x100>; | |
5e8b3bc3 | 530 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; |
d9b4fe83 JCPV |
531 | pinctrl-names = "default"; |
532 | pinctrl-0 = <&pinctrl_macb0_rmii>; | |
467f1cf5 NF |
533 | status = "disabled"; |
534 | }; | |
535 | ||
536 | macb1: ethernet@f8030000 { | |
537 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
538 | reg = <0xf8030000 0x100>; | |
5e8b3bc3 | 539 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; |
467f1cf5 NF |
540 | status = "disabled"; |
541 | }; | |
d029f371 | 542 | |
05dcd361 LD |
543 | i2c0: i2c@f8010000 { |
544 | compatible = "atmel,at91sam9x5-i2c"; | |
545 | reg = <0xf8010000 0x100>; | |
5e8b3bc3 | 546 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; |
d9a63a45 LD |
547 | dmas = <&dma0 1 7>, |
548 | <&dma0 1 8>; | |
549 | dma-names = "tx", "rx"; | |
05dcd361 LD |
550 | #address-cells = <1>; |
551 | #size-cells = <0>; | |
e9a72ee8 RG |
552 | pinctrl-names = "default"; |
553 | pinctrl-0 = <&pinctrl_i2c0>; | |
05dcd361 LD |
554 | status = "disabled"; |
555 | }; | |
556 | ||
557 | i2c1: i2c@f8014000 { | |
558 | compatible = "atmel,at91sam9x5-i2c"; | |
559 | reg = <0xf8014000 0x100>; | |
5e8b3bc3 | 560 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; |
d9a63a45 LD |
561 | dmas = <&dma1 1 5>, |
562 | <&dma1 1 6>; | |
563 | dma-names = "tx", "rx"; | |
05dcd361 LD |
564 | #address-cells = <1>; |
565 | #size-cells = <0>; | |
e9a72ee8 RG |
566 | pinctrl-names = "default"; |
567 | pinctrl-0 = <&pinctrl_i2c1>; | |
05dcd361 LD |
568 | status = "disabled"; |
569 | }; | |
570 | ||
571 | i2c2: i2c@f8018000 { | |
572 | compatible = "atmel,at91sam9x5-i2c"; | |
573 | reg = <0xf8018000 0x100>; | |
5e8b3bc3 | 574 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
d9a63a45 LD |
575 | dmas = <&dma0 1 9>, |
576 | <&dma0 1 10>; | |
577 | dma-names = "tx", "rx"; | |
05dcd361 LD |
578 | #address-cells = <1>; |
579 | #size-cells = <0>; | |
e9a72ee8 RG |
580 | pinctrl-names = "default"; |
581 | pinctrl-0 = <&pinctrl_i2c2>; | |
05dcd361 LD |
582 | status = "disabled"; |
583 | }; | |
584 | ||
d029f371 MR |
585 | adc0: adc@f804c000 { |
586 | compatible = "atmel,at91sam9260-adc"; | |
587 | reg = <0xf804c000 0x100>; | |
5e8b3bc3 | 588 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; |
d029f371 MR |
589 | atmel,adc-use-external; |
590 | atmel,adc-channels-used = <0xffff>; | |
591 | atmel,adc-vref = <3300>; | |
592 | atmel,adc-num-channels = <12>; | |
593 | atmel,adc-startup-time = <40>; | |
594 | atmel,adc-channel-base = <0x50>; | |
595 | atmel,adc-drdy-mask = <0x1000000>; | |
596 | atmel,adc-status-register = <0x30>; | |
597 | atmel,adc-trigger-register = <0xc0>; | |
4b50da65 LD |
598 | atmel,adc-res = <8 10>; |
599 | atmel,adc-res-names = "lowres", "highres"; | |
600 | atmel,adc-use-res = "highres"; | |
d029f371 MR |
601 | |
602 | trigger@0 { | |
603 | trigger-name = "external-rising"; | |
604 | trigger-value = <0x1>; | |
605 | trigger-external; | |
606 | }; | |
607 | ||
608 | trigger@1 { | |
609 | trigger-name = "external-falling"; | |
610 | trigger-value = <0x2>; | |
611 | trigger-external; | |
612 | }; | |
613 | ||
614 | trigger@2 { | |
615 | trigger-name = "external-any"; | |
616 | trigger-value = <0x3>; | |
617 | trigger-external; | |
618 | }; | |
619 | ||
620 | trigger@3 { | |
621 | trigger-name = "continuous"; | |
622 | trigger-value = <0x6>; | |
623 | }; | |
624 | }; | |
d50f88a0 RG |
625 | |
626 | spi0: spi@f0000000 { | |
627 | #address-cells = <1>; | |
628 | #size-cells = <0>; | |
629 | compatible = "atmel,at91rm9200-spi"; | |
630 | reg = <0xf0000000 0x100>; | |
5e8b3bc3 | 631 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
a68b728f WY |
632 | pinctrl-names = "default"; |
633 | pinctrl-0 = <&pinctrl_spi0>; | |
d50f88a0 RG |
634 | status = "disabled"; |
635 | }; | |
636 | ||
637 | spi1: spi@f0004000 { | |
638 | #address-cells = <1>; | |
639 | #size-cells = <0>; | |
640 | compatible = "atmel,at91rm9200-spi"; | |
641 | reg = <0xf0004000 0x100>; | |
5e8b3bc3 | 642 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; |
a68b728f WY |
643 | pinctrl-names = "default"; |
644 | pinctrl-0 = <&pinctrl_spi1>; | |
d50f88a0 RG |
645 | status = "disabled"; |
646 | }; | |
dfab34aa | 647 | |
b909c6c9 | 648 | rtc@fffffeb0 { |
23fb05c6 | 649 | compatible = "atmel,at91sam9x5-rtc"; |
b909c6c9 | 650 | reg = <0xfffffeb0 0x40>; |
5e8b3bc3 | 651 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
b909c6c9 NF |
652 | status = "disabled"; |
653 | }; | |
467f1cf5 | 654 | }; |
86a89f4f JCPV |
655 | |
656 | nand0: nand@40000000 { | |
657 | compatible = "atmel,at91rm9200-nand"; | |
658 | #address-cells = <1>; | |
659 | #size-cells = <1>; | |
660 | reg = <0x40000000 0x10000000 | |
5314bc2d JW |
661 | 0xffffe000 0x600 /* PMECC Registers */ |
662 | 0xffffe600 0x200 /* PMECC Error Location Registers */ | |
663 | 0x00108000 0x18000 /* PMECC looup table in ROM code */ | |
86a89f4f | 664 | >; |
5314bc2d | 665 | atmel,pmecc-lookup-table-offset = <0x0 0x8000>; |
86a89f4f JCPV |
666 | atmel,nand-addr-offset = <21>; |
667 | atmel,nand-cmd-offset = <22>; | |
7a38d450 JCPV |
668 | pinctrl-names = "default"; |
669 | pinctrl-0 = <&pinctrl_nand>; | |
92f8629b JCPV |
670 | gpios = <&pioD 5 GPIO_ACTIVE_HIGH |
671 | &pioD 4 GPIO_ACTIVE_HIGH | |
86a89f4f JCPV |
672 | 0 |
673 | >; | |
674 | status = "disabled"; | |
675 | }; | |
6a062459 JCPV |
676 | |
677 | usb0: ohci@00600000 { | |
678 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
679 | reg = <0x00600000 0x100000>; | |
5e8b3bc3 | 680 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
6a062459 JCPV |
681 | status = "disabled"; |
682 | }; | |
62c5553a JCPV |
683 | |
684 | usb1: ehci@00700000 { | |
685 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
686 | reg = <0x00700000 0x100000>; | |
5e8b3bc3 | 687 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
62c5553a JCPV |
688 | status = "disabled"; |
689 | }; | |
467f1cf5 | 690 | }; |
10f71c28 JCPV |
691 | |
692 | i2c@0 { | |
693 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
694 | gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ |
695 | &pioA 31 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
696 | >; |
697 | i2c-gpio,sda-open-drain; | |
698 | i2c-gpio,scl-open-drain; | |
699 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
700 | #address-cells = <1>; | |
701 | #size-cells = <0>; | |
463c9c7b RG |
702 | pinctrl-names = "default"; |
703 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
10f71c28 JCPV |
704 | status = "disabled"; |
705 | }; | |
706 | ||
707 | i2c@1 { | |
708 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
709 | gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */ |
710 | &pioC 1 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
711 | >; |
712 | i2c-gpio,sda-open-drain; | |
713 | i2c-gpio,scl-open-drain; | |
714 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
715 | #address-cells = <1>; | |
716 | #size-cells = <0>; | |
463c9c7b RG |
717 | pinctrl-names = "default"; |
718 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | |
10f71c28 JCPV |
719 | status = "disabled"; |
720 | }; | |
721 | ||
722 | i2c@2 { | |
723 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
724 | gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ |
725 | &pioB 5 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
726 | >; |
727 | i2c-gpio,sda-open-drain; | |
728 | i2c-gpio,scl-open-drain; | |
729 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
730 | #address-cells = <1>; | |
731 | #size-cells = <0>; | |
463c9c7b RG |
732 | pinctrl-names = "default"; |
733 | pinctrl-0 = <&pinctrl_i2c_gpio2>; | |
10f71c28 JCPV |
734 | status = "disabled"; |
735 | }; | |
467f1cf5 | 736 | }; |