[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / at91sam9x5.dtsi

/*
 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
 *                   AT91SAM9X25, AT91SAM9X35 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9x5 family SoC";
	compatible = "atmel,at91sam9x5";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
				interrupts = <21 4 0>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph A with pullup */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<0 0 0x1 0x1	/* PA0 periph A with pullup */
							 0 1 0x1 0x0>;	/* PA1 periph A */
					};

					pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
						atmel,pins =
							<0 2 0x1 0x0	/* PA2 periph A */
							 0 3 0x1 0x0>;	/* PA3 periph A */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<0 5 0x1 0x1	/* PA5 periph A with pullup */
							 0 6 0x1 0x0>;	/* PA6 periph A */
					};

					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
						atmel,pins =
							<3 27 0x3 0x0	/* PC27 periph C */
							 3 28 0x3 0x0>;	/* PC28 periph C */
					};
				};

				uart2 {
					pinctrl_uart2: uart2-0 {
						atmel,pins =
							<0 7 0x1 0x1	/* PA7 periph A with pullup */
							 0 8 0x1 0x0>;	/* PA8 periph A */
					};

					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
						atmel,pins =
							<0 0 0x2 0x0	/* PB0 periph B */
							 0 1 0x2 0x0>;	/* PB1 periph B */
					};
				};

				uart3 {
					pinctrl_uart3: uart3-0 {
						atmel,pins =
							<3 23 0x2 0x1	/* PC22 periph B with pullup */
							 3 23 0x2 0x0>;	/* PC23 periph B */
					};

					pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
						atmel,pins =
							<3 24 0x2 0x0	/* PC24 periph B */
							 3 25 0x2 0x0>;	/* PC25 periph B */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<3 8 0x3 0x0	/* PC8 periph C */
							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<3 16 0x3 0x0	/* PC16 periph C */
							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<3 4 0x0 0x1	/* PD5 gpio RDY pin pull_up */
							 3 5 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
					};
				};

				macb0 {
					pinctrl_macb0_rmii: macb0_rmii-0 {
						atmel,pins =
							<1 0 0x1 0x0	/* PB0 periph A */
							 1 1 0x1 0x0	/* PB1 periph A */
							 1 2 0x1 0x0	/* PB2 periph A */
							 1 3 0x1 0x0	/* PB3 periph A */
							 1 4 0x1 0x0	/* PB4 periph A */
							 1 5 0x1 0x0	/* PB5 periph A */
							 1 6 0x1 0x0	/* PB6 periph A */
							 1 7 0x1 0x0	/* PB7 periph A */
							 1 9 0x1 0x0	/* PB9 periph A */
							 1 10 0x1 0x0>;	/* PB10 periph A */
					};

					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
						atmel,pins =
							<1 8 0x1 0x0	/* PA8 periph A */
							 1 11 0x1 0x0	/* PA11 periph A */
							 1 12 0x1 0x0	/* PA12 periph A */
							 1 13 0x1 0x0	/* PA13 periph A */
							 1 14 0x1 0x0	/* PA14 periph A */
							 1 15 0x1 0x0	/* PA15 periph A */
							 1 16 0x1 0x0	/* PA16 periph A */
							 1 17 0x1 0x0>;	/* PA17 periph A */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <19>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <22>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart2>;
				status = "disabled";
			};

			macb0: ethernet@f802c000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf802c000 0x100>;
				interrupts = <24 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii>;
				status = "disabled";
			};

			macb1: ethernet@f8030000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf8030000 0x100>;
				interrupts = <27 4 3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c2: i2c@f8018000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8018000 0x100>;
				interrupts = <11 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			adc0: adc@f804c000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xf804c000 0x100>;
				interrupts = <19 4 0>;
				atmel,adc-use-external;
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <12>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x50>;
				atmel,adc-drdy-mask = <0x1000000>;
				atmel,adc-status-register = <0x30>;
				atmel,adc-trigger-register = <0xc0>;

				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};

		usb1: ehci@00700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@1 {
		compatible = "i2c-gpio";
		gpios = <&pioC 0 0 /* sda */
			 &pioC 1 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@2 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
467f1cf5 NF	1	/*
	2	* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
	3	* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
	4	* AT91SAM9X25, AT91SAM9X35 SoC
	5	*
	6	* Copyright (C) 2012 Atmel,
	7	* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9x5 family SoC";
	16	compatible = "atmel,at91sam9x5";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	gpio0 = &pioA;
	25	gpio1 = &pioB;
	26	gpio2 = &pioC;
	27	gpio3 = &pioD;
	28	tcb0 = &tcb0;
	29	tcb1 = &tcb1;
05dcd361 LD	30	i2c0 = &i2c0;
	31	i2c1 = &i2c1;
	32	i2c2 = &i2c2;
467f1cf5 NF	33	};
	34	cpus {
	35	cpu@0 {
	36	compatible = "arm,arm926ejs";
	37	};
	38	};
	39
dcce6ce8	40	memory {
467f1cf5 NF	41	reg = <0x20000000 0x10000000>;
	42	};
	43
	44	ahb {
	45	compatible = "simple-bus";
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48	ranges;
	49
	50	apb {
	51	compatible = "simple-bus";
	52	#address-cells = <1>;
	53	#size-cells = <1>;
	54	ranges;
	55
	56	aic: interrupt-controller@fffff000 {
f8a073ee	57	#interrupt-cells = <3>;
467f1cf5 NF	58	compatible = "atmel,at91rm9200-aic";
467f1cf5 NF	59	interrupt-controller;
467f1cf5	60	reg = <0xfffff000 0x200>;
c6573943	61	atmel,external-irqs = <31>;
467f1cf5 NF	62	};
467f1cf5 NF	63
a7776ec6 JCPV	64	ramc0: ramc@ffffe800 {
	65	compatible = "atmel,at91sam9g45-ddramc";
	66	reg = <0xffffe800 0x200>;
	67	};
	68
eb5e76ff JCPV	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
c8082d34 JCPV	74	rstc@fffffe00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffe00 0x10>;
	77	};
	78
82015c4e JCPV	79	shdwc@fffffe10 {
	80	compatible = "atmel,at91sam9x5-shdwc";
	81	reg = <0xfffffe10 0x10>;
	82	};
	83
467f1cf5 NF	84	pit: timer@fffffe30 {
	85	compatible = "atmel,at91sam9260-pit";
	86	reg = <0xfffffe30 0xf>;
f8a073ee	87	interrupts = <1 4 7>;
467f1cf5 NF	88	};
	89
	90	tcb0: timer@f8008000 {
	91	compatible = "atmel,at91sam9x5-tcb";
	92	reg = <0xf8008000 0x100>;
f8a073ee	93	interrupts = <17 4 0>;
467f1cf5 NF	94	};
	95
	96	tcb1: timer@f800c000 {
	97	compatible = "atmel,at91sam9x5-tcb";
	98	reg = <0xf800c000 0x100>;
f8a073ee	99	interrupts = <17 4 0>;
467f1cf5 NF	100	};
	101
	102	dma0: dma-controller@ffffec00 {
	103	compatible = "atmel,at91sam9g45-dma";
	104	reg = <0xffffec00 0x200>;
f8a073ee	105	interrupts = <20 4 0>;
467f1cf5 NF	106	};
	107
	108	dma1: dma-controller@ffffee00 {
	109	compatible = "atmel,at91sam9g45-dma";
	110	reg = <0xffffee00 0x200>;
f8a073ee	111	interrupts = <21 4 0>;
467f1cf5 NF	112	};
467f1cf5 NF	113
ec6754a7	114	pinctrl@fffff400 {
e4541ff2 JCPV	115	#address-cells = <1>;
e4541ff2 JCPV	116	#size-cells = <1>;
5314ec8e	117	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	118	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	119
5314ec8e	120	/* shared pinctrl settings */
ec6754a7 JCPV	121	dbgu {
	122	pinctrl_dbgu: dbgu-0 {
	123	atmel,pins =
	124	<0 9 0x1 0x0 /* PA9 periph A */
	125	0 10 0x1 0x1>; /* PA10 periph A with pullup */
	126	};
	127	};
	128
	129	uart0 {
	130	pinctrl_uart0: uart0-0 {
	131	atmel,pins =
	132	<0 0 0x1 0x1 /* PA0 periph A with pullup */
	133	0 1 0x1 0x0>; /* PA1 periph A */
	134	};
	135
	136	pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
	137	atmel,pins =
	138	<0 2 0x1 0x0 /* PA2 periph A */
	139	0 3 0x1 0x0>; /* PA3 periph A */
	140	};
	141	};
	142
	143	uart1 {
	144	pinctrl_uart1: uart1-0 {
	145	atmel,pins =
	146	<0 5 0x1 0x1 /* PA5 periph A with pullup */
	147	0 6 0x1 0x0>; /* PA6 periph A */
	148	};
	149
	150	pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
	151	atmel,pins =
	152	<3 27 0x3 0x0 /* PC27 periph C */
	153	3 28 0x3 0x0>; /* PC28 periph C */
	154	};
	155	};
	156
	157	uart2 {
	158	pinctrl_uart2: uart2-0 {
	159	atmel,pins =
	160	<0 7 0x1 0x1 /* PA7 periph A with pullup */
	161	0 8 0x1 0x0>; /* PA8 periph A */
	162	};
	163
	164	pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
	165	atmel,pins =
	166	<0 0 0x2 0x0 /* PB0 periph B */
	167	0 1 0x2 0x0>; /* PB1 periph B */
	168	};
	169	};
	170
	171	uart3 {
	172	pinctrl_uart3: uart3-0 {
	173	atmel,pins =
	174	<3 23 0x2 0x1 /* PC22 periph B with pullup */
	175	3 23 0x2 0x0>; /* PC23 periph B */
	176	};
	177
	178	pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
	179	atmel,pins =
	180	<3 24 0x2 0x0 /* PC24 periph B */
	181	3 25 0x2 0x0>; /* PC25 periph B */
	182	};
	183	};
	184
185	usart0 {
186	pinctrl_usart0: usart0-0 {
187	atmel,pins =
188	<3 8 0x3 0x0 /* PC8 periph C */
189	3 9 0x3 0x1>; /* PC9 periph C with pullup */
190	};
191	};
192
193	usart1 {
194	pinctrl_usart1: usart1-0 {
195	atmel,pins =
196	<3 16 0x3 0x0 /* PC16 periph C */
197	3 17 0x3 0x1>; /* PC17 periph C with pullup */
198	};
199	};
5314ec8e	200
7a38d450 JCPV	201	nand {
	202	pinctrl_nand: nand-0 {
	203	atmel,pins =
	204	<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
	205	3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	206	};
	207	};
	208
d9b4fe83 JCPV	209	macb0 {
	210	pinctrl_macb0_rmii: macb0_rmii-0 {
	211	atmel,pins =
	212	<1 0 0x1 0x0 /* PB0 periph A */
	213	1 1 0x1 0x0 /* PB1 periph A */
	214	1 2 0x1 0x0 /* PB2 periph A */
	215	1 3 0x1 0x0 /* PB3 periph A */
	216	1 4 0x1 0x0 /* PB4 periph A */
	217	1 5 0x1 0x0 /* PB5 periph A */
	218	1 6 0x1 0x0 /* PB6 periph A */
	219	1 7 0x1 0x0 /* PB7 periph A */
	220	1 9 0x1 0x0 /* PB9 periph A */
	221	1 10 0x1 0x0>; /* PB10 periph A */
	222	};
	223
	224	pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
	225	atmel,pins =
	226	<1 8 0x1 0x0 /* PA8 periph A */
	227	1 11 0x1 0x0 /* PA11 periph A */
	228	1 12 0x1 0x0 /* PA12 periph A */
	229	1 13 0x1 0x0 /* PA13 periph A */
	230	1 14 0x1 0x0 /* PA14 periph A */
	231	1 15 0x1 0x0 /* PA15 periph A */
	232	1 16 0x1 0x0 /* PA16 periph A */
	233	1 17 0x1 0x0>; /* PA17 periph A */
	234	};
	235	};
	236
e4541ff2 JCPV	237	pioA: gpio@fffff400 {
	238	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	239	reg = <0xfffff400 0x200>;
	240	interrupts = <2 4 1>;
	241	#gpio-cells = <2>;
	242	gpio-controller;
	243	interrupt-controller;
	244	#interrupt-cells = <2>;
	245	};
	246
	247	pioB: gpio@fffff600 {
	248	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	249	reg = <0xfffff600 0x200>;
	250	interrupts = <2 4 1>;
	251	#gpio-cells = <2>;
	252	gpio-controller;
fc33ff43	253	#gpio-lines = <19>;
e4541ff2 JCPV	254	interrupt-controller;
	255	#interrupt-cells = <2>;
	256	};
	257
	258	pioC: gpio@fffff800 {
	259	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	260	reg = <0xfffff800 0x200>;
	261	interrupts = <3 4 1>;
	262	#gpio-cells = <2>;
	263	gpio-controller;
	264	interrupt-controller;
	265	#interrupt-cells = <2>;
	266	};
	267
	268	pioD: gpio@fffffa00 {
	269	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	270	reg = <0xfffffa00 0x200>;
	271	interrupts = <3 4 1>;
	272	#gpio-cells = <2>;
	273	gpio-controller;
fc33ff43	274	#gpio-lines = <22>;
e4541ff2 JCPV	275	interrupt-controller;
	276	#interrupt-cells = <2>;
	277	};
467f1cf5 NF	278	};
	279
	280	dbgu: serial@fffff200 {
	281	compatible = "atmel,at91sam9260-usart";
	282	reg = <0xfffff200 0x200>;
f8a073ee	283	interrupts = <1 4 7>;
ec6754a7 JCPV	284	pinctrl-names = "default";
ec6754a7 JCPV	285	pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5 NF	286	status = "disabled";
	287	};
	288
	289	usart0: serial@f801c000 {
	290	compatible = "atmel,at91sam9260-usart";
	291	reg = <0xf801c000 0x200>;
f8a073ee	292	interrupts = <5 4 5>;
467f1cf5 NF	293	atmel,use-dma-rx;
467f1cf5 NF	294	atmel,use-dma-tx;
ec6754a7 JCPV	295	pinctrl-names = "default";
ec6754a7 JCPV	296	pinctrl-0 = <&pinctrl_uart0>;
467f1cf5 NF	297	status = "disabled";
	298	};
	299
	300	usart1: serial@f8020000 {
	301	compatible = "atmel,at91sam9260-usart";
	302	reg = <0xf8020000 0x200>;
f8a073ee	303	interrupts = <6 4 5>;
467f1cf5 NF	304	atmel,use-dma-rx;
467f1cf5 NF	305	atmel,use-dma-tx;
ec6754a7 JCPV	306	pinctrl-names = "default";
ec6754a7 JCPV	307	pinctrl-0 = <&pinctrl_uart1>;
467f1cf5 NF	308	status = "disabled";
	309	};
	310
	311	usart2: serial@f8024000 {
	312	compatible = "atmel,at91sam9260-usart";
	313	reg = <0xf8024000 0x200>;
f8a073ee	314	interrupts = <7 4 5>;
467f1cf5 NF	315	atmel,use-dma-rx;
467f1cf5 NF	316	atmel,use-dma-tx;
ec6754a7 JCPV	317	pinctrl-names = "default";
ec6754a7 JCPV	318	pinctrl-0 = <&pinctrl_uart2>;
467f1cf5 NF	319	status = "disabled";
	320	};
	321
	322	macb0: ethernet@f802c000 {
	323	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	324	reg = <0xf802c000 0x100>;
f8a073ee	325	interrupts = <24 4 3>;
d9b4fe83 JCPV	326	pinctrl-names = "default";
d9b4fe83 JCPV	327	pinctrl-0 = <&pinctrl_macb0_rmii>;
467f1cf5 NF	328	status = "disabled";
	329	};
	330
	331	macb1: ethernet@f8030000 {
	332	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	333	reg = <0xf8030000 0x100>;
f8a073ee	334	interrupts = <27 4 3>;
467f1cf5 NF	335	status = "disabled";
467f1cf5 NF	336	};
d029f371	337
05dcd361 LD	338	i2c0: i2c@f8010000 {
	339	compatible = "atmel,at91sam9x5-i2c";
	340	reg = <0xf8010000 0x100>;
	341	interrupts = <9 4 6>;
	342	#address-cells = <1>;
	343	#size-cells = <0>;
	344	status = "disabled";
	345	};
	346
	347	i2c1: i2c@f8014000 {
	348	compatible = "atmel,at91sam9x5-i2c";
	349	reg = <0xf8014000 0x100>;
	350	interrupts = <10 4 6>;
	351	#address-cells = <1>;
	352	#size-cells = <0>;
	353	status = "disabled";
	354	};
	355
	356	i2c2: i2c@f8018000 {
	357	compatible = "atmel,at91sam9x5-i2c";
	358	reg = <0xf8018000 0x100>;
	359	interrupts = <11 4 6>;
	360	#address-cells = <1>;
	361	#size-cells = <0>;
	362	status = "disabled";
	363	};
	364
d029f371 MR	365	adc0: adc@f804c000 {
	366	compatible = "atmel,at91sam9260-adc";
	367	reg = <0xf804c000 0x100>;
f8a073ee	368	interrupts = <19 4 0>;
d029f371 MR	369	atmel,adc-use-external;
	370	atmel,adc-channels-used = <0xffff>;
	371	atmel,adc-vref = <3300>;
	372	atmel,adc-num-channels = <12>;
	373	atmel,adc-startup-time = <40>;
	374	atmel,adc-channel-base = <0x50>;
	375	atmel,adc-drdy-mask = <0x1000000>;
	376	atmel,adc-status-register = <0x30>;
	377	atmel,adc-trigger-register = <0xc0>;
	378
	379	trigger@0 {
	380	trigger-name = "external-rising";
	381	trigger-value = <0x1>;
	382	trigger-external;
	383	};
	384
	385	trigger@1 {
	386	trigger-name = "external-falling";
	387	trigger-value = <0x2>;
	388	trigger-external;
	389	};
	390
	391	trigger@2 {
	392	trigger-name = "external-any";
	393	trigger-value = <0x3>;
	394	trigger-external;
	395	};
	396
	397	trigger@3 {
	398	trigger-name = "continuous";
	399	trigger-value = <0x6>;
	400	};
	401	};
467f1cf5	402	};
86a89f4f JCPV	403
	404	nand0: nand@40000000 {
	405	compatible = "atmel,at91rm9200-nand";
	406	#address-cells = <1>;
	407	#size-cells = <1>;
	408	reg = <0x40000000 0x10000000
	409	>;
	410	atmel,nand-addr-offset = <21>;
	411	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	412	pinctrl-names = "default";
7a38d450 JCPV	413	pinctrl-0 = <&pinctrl_nand>;
4352808c NF	414	gpios = <&pioD 5 0
4352808c NF	415	&pioD 4 0
86a89f4f JCPV	416	0
	417	>;
	418	status = "disabled";
	419	};
6a062459 JCPV	420
	421	usb0: ohci@00600000 {
	422	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	423	reg = <0x00600000 0x100000>;
f8a073ee	424	interrupts = <22 4 2>;
6a062459 JCPV	425	status = "disabled";
6a062459 JCPV	426	};
62c5553a JCPV	427
	428	usb1: ehci@00700000 {
	429	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	430	reg = <0x00700000 0x100000>;
f8a073ee	431	interrupts = <22 4 2>;
62c5553a JCPV	432	status = "disabled";
62c5553a JCPV	433	};
467f1cf5	434	};
10f71c28 JCPV	435
	436	i2c@0 {
	437	compatible = "i2c-gpio";
	438	gpios = <&pioA 30 0 /* sda */
	439	&pioA 31 0 /* scl */
	440	>;
	441	i2c-gpio,sda-open-drain;
	442	i2c-gpio,scl-open-drain;
	443	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	444	#address-cells = <1>;
	445	#size-cells = <0>;
	446	status = "disabled";
	447	};
	448
	449	i2c@1 {
	450	compatible = "i2c-gpio";
	451	gpios = <&pioC 0 0 /* sda */
	452	&pioC 1 0 /* scl */
	453	>;
	454	i2c-gpio,sda-open-drain;
	455	i2c-gpio,scl-open-drain;
	456	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	457	#address-cells = <1>;
	458	#size-cells = <0>;
	459	status = "disabled";
	460	};
	461
	462	i2c@2 {
	463	compatible = "i2c-gpio";
	464	gpios = <&pioB 4 0 /* sda */
	465	&pioB 5 0 /* scl */
	466	>;
	467	i2c-gpio,sda-open-drain;
	468	i2c-gpio,scl-open-drain;
	469	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	470	#address-cells = <1>;
	471	#size-cells = <0>;
	472	status = "disabled";
	473	};
467f1cf5	474	};