[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / axm55xx.dtsi

/*
 * arch/arm/boot/dts/axm55xx.dtsi
 *
 * Copyright (C) 2013 LSI
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/lsi,axm5516-clks.h>

#include "skeleton64.dtsi"

/ {
	interrupt-parent = <&gic>;

	aliases {
		serial0	  = &serial0;
		serial1   = &serial1;
		serial2	  = &serial2;
		serial3	  = &serial3;
		timer	  = &timer0;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		clk_ref0: clk_ref0 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
		};

		clk_ref1: clk_ref1 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
		};

		clk_ref2: clk_ref2 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
		};

		clks: clock-controller@2010020000 {
			compatible = "lsi,axm5516-clks";
			#clock-cells = <1>;
			reg = <0x20 0x10020000 0 0x20000>;
		};
	};

	gic: interrupt-controller@2001001000 {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x20 0x01001000 0 0x1000>,
		      <0x20 0x01002000 0 0x1000>,
		      <0x20 0x01004000 0 0x2000>,
		      <0x20 0x01006000 0 0x2000>;
		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
				IRQ_TYPE_LEVEL_HIGH)>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts =
			<GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};


	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
	};

	soc {
		compatible = "simple-bus";
		device_type = "soc";
		#address-cells = <2>;
		#size-cells = <2>;
		interrupt-parent = <&gic>;
		ranges;

		syscon: syscon@2010030000 {
			compatible = "lsi,axxia-syscon", "syscon";
			reg = <0x20 0x10030000 0 0x2000>;
		};

		amba {
			compatible = "arm,amba-bus";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;

			serial0: uart@2010080000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x20 0x10080000 0 0x1000>;
				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};

			serial1: uart@2010081000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x20 0x10081000 0 0x1000>;
				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};

			serial2: uart@2010082000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x20 0x10082000 0 0x1000>;
				interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};

			serial3: uart@2010083000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x20 0x10083000 0 0x1000>;
				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};

			timer0: timer@2010091000 {
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x20 0x10091000 0 0x1000>;
				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "okay";
			};

			gpio0: gpio@2010092000 {
				#gpio-cells = <2>;
				compatible = "arm,pl061", "arm,primecell";
				gpio-controller;
				reg = <0x20 0x10092000 0x00 0x1000>;
				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};

			gpio1: gpio@2010093000 {
				#gpio-cells = <2>;
				compatible = "arm,pl061", "arm,primecell";
				gpio-controller;
				reg = <0x20 0x10093000 0x00 0x1000>;
				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks AXXIA_CLK_PER>;
				clock-names = "apb_pclk";
				status = "disabled";
			};
		};
	};
};

/*
  Local Variables:
  mode: C
  End:
*/
Commit	Line	Data
8cee8af2 AB	1	/*
	2	* arch/arm/boot/dts/axm55xx.dtsi
	3	*
	4	* Copyright (C) 2013 LSI
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <dt-bindings/interrupt-controller/arm-gic.h>
	13	#include <dt-bindings/clock/lsi,axm5516-clks.h>
	14
	15	#include "skeleton64.dtsi"
	16
	17	/ {
	18	interrupt-parent = <&gic>;
	19
	20	aliases {
	21	serial0 = &serial0;
	22	serial1 = &serial1;
	23	serial2 = &serial2;
	24	serial3 = &serial3;
	25	timer = &timer0;
	26	};
	27
	28	clocks {
	29	compatible = "simple-bus";
	30	#address-cells = <2>;
	31	#size-cells = <2>;
	32	ranges;
	33
	34	clk_ref0: clk_ref0 {
	35	compatible = "fixed-clock";
	36	#clock-cells = <0>;
	37	clock-frequency = <125000000>;
	38	};
	39
	40	clk_ref1: clk_ref1 {
	41	compatible = "fixed-clock";
	42	#clock-cells = <0>;
	43	clock-frequency = <125000000>;
	44	};
	45
	46	clk_ref2: clk_ref2 {
	47	compatible = "fixed-clock";
	48	#clock-cells = <0>;
	49	clock-frequency = <125000000>;
	50	};
	51
	52	clks: clock-controller@2010020000 {
	53	compatible = "lsi,axm5516-clks";
	54	#clock-cells = <1>;
	55	reg = <0x20 0x10020000 0 0x20000>;
	56	};
	57	};
	58
	59	gic: interrupt-controller@2001001000 {
	60	compatible = "arm,cortex-a15-gic";
	61	#interrupt-cells = <3>;
	62	#address-cells = <0>;
	63	interrupt-controller;
	64	reg = <0x20 0x01001000 0 0x1000>,
65	<0x20 0x01002000 0 0x1000>,
66	<0x20 0x01004000 0 0x2000>,
67	<0x20 0x01006000 0 0x2000>;
68	interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) \|
69	IRQ_TYPE_LEVEL_HIGH)>;
70	};
71
72	timer {
73	compatible = "arm,armv7-timer";
74	interrupts =
75	<GIC_PPI 13
76	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
77	<GIC_PPI 14
78	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
79	<GIC_PPI 11
80	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
81	<GIC_PPI 10
82	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
83	};
84
85
86	pmu {
87	compatible = "arm,cortex-a15-pmu";
88	interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
89	};
90
91	soc {
92	compatible = "simple-bus";
93	device_type = "soc";
94	#address-cells = <2>;
95	#size-cells = <2>;
96	interrupt-parent = <&gic>;
97	ranges;
98
99	syscon: syscon@2010030000 {
100	compatible = "lsi,axxia-syscon", "syscon";
101	reg = <0x20 0x10030000 0 0x2000>;
102	};
103
104	amba {
105	compatible = "arm,amba-bus";
106	#address-cells = <2>;
107	#size-cells = <2>;
108	ranges;
109
110	serial0: uart@2010080000 {
111	compatible = "arm,pl011", "arm,primecell";
112	reg = <0x20 0x10080000 0 0x1000>;
113	interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
114	clocks = <&clks AXXIA_CLK_PER>;
115	clock-names = "apb_pclk";
116	status = "disabled";
117	};
118
119	serial1: uart@2010081000 {
120	compatible = "arm,pl011", "arm,primecell";
121	reg = <0x20 0x10081000 0 0x1000>;
122	interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
123	clocks = <&clks AXXIA_CLK_PER>;
124	clock-names = "apb_pclk";
125	status = "disabled";
126	};
127
128	serial2: uart@2010082000 {
129	compatible = "arm,pl011", "arm,primecell";
130	reg = <0x20 0x10082000 0 0x1000>;
131	interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
132	clocks = <&clks AXXIA_CLK_PER>;
133	clock-names = "apb_pclk";
134	status = "disabled";
135	};
136
137	serial3: uart@2010083000 {
138	compatible = "arm,pl011", "arm,primecell";
139	reg = <0x20 0x10083000 0 0x1000>;
140	interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
141	clocks = <&clks AXXIA_CLK_PER>;
142	clock-names = "apb_pclk";
143	status = "disabled";
144	};
145
146	timer0: timer@2010091000 {
147	compatible = "arm,sp804", "arm,primecell";
148	reg = <0x20 0x10091000 0 0x1000>;
149	interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
150	<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
151	<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
152	<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
153	<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
154	<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
155	<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
156	<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
157	<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
158	clocks = <&clks AXXIA_CLK_PER>;
159	clock-names = "apb_pclk";
160	status = "okay";
161	};
162
163	gpio0: gpio@2010092000 {
164	#gpio-cells = <2>;
165	compatible = "arm,pl061", "arm,primecell";
166	gpio-controller;
167	reg = <0x20 0x10092000 0x00 0x1000>;
168	interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
169	<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
170	<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
171	<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
172	<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
173	<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
174	<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
175	<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
176	clocks = <&clks AXXIA_CLK_PER>;
177	clock-names = "apb_pclk";
178	status = "disabled";
179	};
180
181	gpio1: gpio@2010093000 {
182	#gpio-cells = <2>;
183	compatible = "arm,pl061", "arm,primecell";
184	gpio-controller;
185	reg = <0x20 0x10093000 0x00 0x1000>;
186	interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
187	clocks = <&clks AXXIA_CLK_PER>;
188	clock-names = "apb_pclk";
189	status = "disabled";
190	};
191	};
192	};
193	};
194
195	/*
196	Local Variables:
197	mode: C
198	End:
199	*/