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7b2e987d JM |
1 | /* |
2 | * BSD LICENSE | |
3 | * | |
4 | * Copyright(c) 2015 Broadcom Corporation. All rights reserved. | |
5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | |
9 | * | |
10 | * * Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | |
12 | * * Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in | |
14 | * the documentation and/or other materials provided with the | |
15 | * distribution. | |
16 | * * Neither the name of Broadcom Corporation nor the names of its | |
17 | * contributors may be used to endorse or promote products derived | |
18 | * from this software without specific prior written permission. | |
19 | * | |
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
21 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
22 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
23 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
24 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
25 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
26 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | |
32 | ||
33 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
34 | #include <dt-bindings/interrupt-controller/irq.h> | |
da3f9742 | 35 | #include <dt-bindings/clock/bcm-nsp.h> |
7b2e987d JM |
36 | |
37 | #include "skeleton.dtsi" | |
38 | ||
39 | / { | |
40 | compatible = "brcm,nsp"; | |
41 | model = "Broadcom Northstar Plus SoC"; | |
42 | interrupt-parent = <&gic>; | |
43 | ||
944725fc KH |
44 | cpus { |
45 | #address-cells = <1>; | |
46 | #size-cells = <0>; | |
47 | ||
9d57f60c | 48 | cpu0: cpu@0 { |
944725fc KH |
49 | device_type = "cpu"; |
50 | compatible = "arm,cortex-a9"; | |
51 | next-level-cache = <&L2>; | |
52 | reg = <0x0>; | |
53 | }; | |
54 | ||
9d57f60c | 55 | cpu1: cpu@1 { |
944725fc KH |
56 | device_type = "cpu"; |
57 | compatible = "arm,cortex-a9"; | |
58 | next-level-cache = <&L2>; | |
59 | enable-method = "brcm,bcm-nsp-smp"; | |
f7f20cba | 60 | secondary-boot-reg = <0xffff0fec>; |
944725fc KH |
61 | reg = <0x1>; |
62 | }; | |
63 | }; | |
64 | ||
9d57f60c JM |
65 | pmu { |
66 | compatible = "arm,cortex-a9-pmu"; | |
67 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH | |
68 | GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
69 | interrupt-affinity = <&cpu0>, <&cpu1>; | |
70 | }; | |
71 | ||
7b2e987d JM |
72 | mpcore { |
73 | compatible = "simple-bus"; | |
da3f9742 | 74 | ranges = <0x00000000 0x19000000 0x00023000>; |
7b2e987d JM |
75 | #address-cells = <1>; |
76 | #size-cells = <1>; | |
77 | ||
da3f9742 JM |
78 | a9pll: arm_clk@00000 { |
79 | #clock-cells = <0>; | |
80 | compatible = "brcm,nsp-armpll"; | |
81 | clocks = <&osc>; | |
82 | reg = <0x00000 0x1000>; | |
83 | }; | |
84 | ||
85 | timer@20200 { | |
7b2e987d | 86 | compatible = "arm,cortex-a9-global-timer"; |
da3f9742 | 87 | reg = <0x20200 0x100>; |
7b2e987d JM |
88 | interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; |
89 | clocks = <&periph_clk>; | |
90 | }; | |
1a9d53ca | 91 | |
da3f9742 | 92 | twd-timer@20600 { |
1a9d53ca | 93 | compatible = "arm,cortex-a9-twd-timer"; |
da3f9742 | 94 | reg = <0x20600 0x20>; |
1a9d53ca JM |
95 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | |
96 | IRQ_TYPE_LEVEL_HIGH)>; | |
97 | clocks = <&periph_clk>; | |
98 | }; | |
99 | ||
da3f9742 | 100 | twd-watchdog@20620 { |
1a9d53ca | 101 | compatible = "arm,cortex-a9-twd-wdt"; |
da3f9742 | 102 | reg = <0x20620 0x20>; |
1a9d53ca JM |
103 | interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | |
104 | IRQ_TYPE_LEVEL_HIGH)>; | |
105 | clocks = <&periph_clk>; | |
106 | }; | |
7ba8cd8b | 107 | |
da3f9742 | 108 | gic: interrupt-controller@21000 { |
7ba8cd8b JM |
109 | compatible = "arm,cortex-a9-gic"; |
110 | #interrupt-cells = <3>; | |
111 | #address-cells = <0>; | |
112 | interrupt-controller; | |
da3f9742 JM |
113 | reg = <0x21000 0x1000>, |
114 | <0x20100 0x100>; | |
7ba8cd8b JM |
115 | }; |
116 | ||
117 | L2: l2-cache { | |
118 | compatible = "arm,pl310-cache"; | |
da3f9742 | 119 | reg = <0x22000 0x1000>; |
7ba8cd8b JM |
120 | cache-unified; |
121 | cache-level = <2>; | |
122 | }; | |
7b2e987d JM |
123 | }; |
124 | ||
125 | clocks { | |
126 | #address-cells = <1>; | |
127 | #size-cells = <1>; | |
128 | ranges; | |
129 | ||
da3f9742 JM |
130 | osc: oscillator { |
131 | #clock-cells = <0>; | |
7b2e987d | 132 | compatible = "fixed-clock"; |
da3f9742 JM |
133 | clock-frequency = <25000000>; |
134 | }; | |
135 | ||
136 | iprocmed: iprocmed { | |
137 | #clock-cells = <0>; | |
138 | compatible = "fixed-factor-clock"; | |
139 | clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; | |
140 | clock-div = <2>; | |
141 | clock-mult = <1>; | |
142 | }; | |
143 | ||
144 | iprocslow: iprocslow { | |
145 | #clock-cells = <0>; | |
146 | compatible = "fixed-factor-clock"; | |
147 | clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>; | |
148 | clock-div = <4>; | |
149 | clock-mult = <1>; | |
150 | }; | |
151 | ||
152 | periph_clk: periph_clk { | |
7b2e987d | 153 | #clock-cells = <0>; |
da3f9742 JM |
154 | compatible = "fixed-factor-clock"; |
155 | clocks = <&a9pll>; | |
156 | clock-div = <2>; | |
157 | clock-mult = <1>; | |
7b2e987d JM |
158 | }; |
159 | }; | |
160 | ||
161 | axi { | |
162 | compatible = "simple-bus"; | |
6771e01f | 163 | ranges = <0x00000000 0x18000000 0x0011c40c>; |
7b2e987d JM |
164 | #address-cells = <1>; |
165 | #size-cells = <1>; | |
166 | ||
018e4feb YRDR |
167 | gpioa: gpio@0020 { |
168 | compatible = "brcm,nsp-gpio-a"; | |
169 | reg = <0x0020 0x70>, | |
170 | <0x3f1c4 0x1c>; | |
171 | #gpio-cells = <2>; | |
172 | gpio-controller; | |
173 | ngpios = <32>; | |
174 | interrupt-controller; | |
175 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
176 | gpio-ranges = <&pinctrl 0 0 32>; | |
177 | }; | |
178 | ||
7ba8cd8b | 179 | uart0: serial@0300 { |
7b2e987d JM |
180 | compatible = "ns16550a"; |
181 | reg = <0x0300 0x100>; | |
182 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
da3f9742 | 183 | clocks = <&osc>; |
7b2e987d JM |
184 | status = "disabled"; |
185 | }; | |
186 | ||
7ba8cd8b | 187 | uart1: serial@0400 { |
7b2e987d JM |
188 | compatible = "ns16550a"; |
189 | reg = <0x0400 0x100>; | |
190 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
da3f9742 | 191 | clocks = <&osc>; |
7b2e987d JM |
192 | status = "disabled"; |
193 | }; | |
1dbcfb22 | 194 | |
5fa1026a JM |
195 | dma@20000 { |
196 | compatible = "arm,pl330", "arm,primecell"; | |
197 | reg = <0x20000 0x1000>; | |
198 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
199 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
200 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
201 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
202 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
203 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
204 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
205 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
206 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
207 | clocks = <&iprocslow>; | |
208 | clock-names = "apb_pclk"; | |
209 | #dma-cells = <1>; | |
210 | }; | |
211 | ||
13d04f20 JM |
212 | amac0: ethernet@22000 { |
213 | compatible = "brcm,nsp-amac"; | |
214 | reg = <0x022000 0x1000>, | |
215 | <0x110000 0x1000>; | |
216 | reg-names = "amac_base", "idm_base"; | |
217 | interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; | |
218 | status = "disabled"; | |
219 | }; | |
220 | ||
221 | amac1: ethernet@23000 { | |
222 | compatible = "brcm,nsp-amac"; | |
223 | reg = <0x023000 0x1000>, | |
224 | <0x111000 0x1000>; | |
225 | reg-names = "amac_base", "idm_base"; | |
226 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
227 | status = "disabled"; | |
228 | }; | |
229 | ||
7ba8cd8b | 230 | nand: nand@26000 { |
41254754 JM |
231 | compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; |
232 | reg = <0x026000 0x600>, | |
233 | <0x11b408 0x600>, | |
234 | <0x026f00 0x20>; | |
235 | reg-names = "nand", "iproc-idm", "iproc-ext"; | |
236 | interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; | |
237 | ||
238 | #address-cells = <1>; | |
239 | #size-cells = <0>; | |
240 | ||
241 | brcm,nand-has-wp; | |
242 | }; | |
0f9f27a3 | 243 | |
1480986d YRDR |
244 | gpiob: gpio@30000 { |
245 | compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio"; | |
246 | reg = <0x30000 0x50>; | |
247 | #gpio-cells = <2>; | |
248 | gpio-controller; | |
249 | ngpios = <4>; | |
250 | interrupt-controller; | |
251 | interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
252 | }; | |
253 | ||
4a590fbf YRDR |
254 | pwm: pwm@31000 { |
255 | compatible = "brcm,iproc-pwm"; | |
256 | reg = <0x31000 0x28>; | |
257 | clocks = <&osc>; | |
258 | #pwm-cells = <3>; | |
259 | status = "disabled"; | |
260 | }; | |
261 | ||
33a36a5b YRDR |
262 | rng: rng@33000 { |
263 | compatible = "brcm,bcm-nsp-rng"; | |
264 | reg = <0x33000 0x14>; | |
265 | }; | |
266 | ||
329f98c1 KD |
267 | qspi: qspi@27200 { |
268 | compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; | |
269 | reg = <0x027200 0x184>, | |
270 | <0x027000 0x124>, | |
271 | <0x11c408 0x004>, | |
272 | <0x0273a0 0x01c>; | |
273 | reg-names = "mspi", "bspi", "intr_regs", | |
274 | "intr_status_reg"; | |
275 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, | |
276 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
277 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
278 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, | |
279 | <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, | |
280 | <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, | |
281 | <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; | |
282 | interrupt-names = "spi_lr_fullness_reached", | |
283 | "spi_lr_session_aborted", | |
284 | "spi_lr_impatient", | |
285 | "spi_lr_session_done", | |
286 | "spi_lr_overhead", | |
287 | "mspi_done", | |
288 | "mspi_halted"; | |
289 | clocks = <&iprocmed>; | |
290 | clock-names = "iprocmed"; | |
291 | num-cs = <2>; | |
292 | #address-cells = <1>; | |
293 | #size-cells = <0>; | |
294 | }; | |
295 | ||
a0efb0d2 JM |
296 | ccbtimer0: timer@34000 { |
297 | compatible = "arm,sp804"; | |
298 | reg = <0x34000 0x1000>; | |
299 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, | |
300 | <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; | |
301 | clocks = <&iprocslow>; | |
302 | clock-names = "apb_pclk"; | |
303 | }; | |
304 | ||
305 | ccbtimer1: timer@35000 { | |
306 | compatible = "arm,sp804"; | |
307 | reg = <0x35000 0x1000>; | |
308 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, | |
309 | <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; | |
310 | clocks = <&iprocslow>; | |
311 | clock-names = "apb_pclk"; | |
312 | }; | |
313 | ||
bf2289be FF |
314 | srab: srab@36000 { |
315 | compatible = "brcm,nsp-srab"; | |
316 | reg = <0x36000 0x1000>; | |
317 | #address-cells = <1>; | |
318 | #size-cells = <0>; | |
319 | ||
320 | status = "disabled"; | |
321 | ||
322 | /* ports are defined in board DTS */ | |
323 | }; | |
324 | ||
0f9f27a3 JM |
325 | i2c0: i2c@38000 { |
326 | compatible = "brcm,iproc-i2c"; | |
327 | reg = <0x38000 0x50>; | |
328 | #address-cells = <1>; | |
329 | #size-cells = <0>; | |
330 | interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>; | |
331 | clock-frequency = <100000>; | |
332 | }; | |
da3f9742 | 333 | |
7c3fe8a1 JM |
334 | watchdog@39000 { |
335 | compatible = "arm,sp805", "arm,primecell"; | |
336 | reg = <0x39000 0x1000>; | |
337 | interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; | |
338 | clocks = <&iprocslow>, <&iprocslow>; | |
339 | clock-names = "wdogclk", "apb_pclk"; | |
340 | }; | |
341 | ||
da3f9742 JM |
342 | lcpll0: lcpll0@3f100 { |
343 | #clock-cells = <1>; | |
344 | compatible = "brcm,nsp-lcpll0"; | |
345 | reg = <0x3f100 0x14>; | |
346 | clocks = <&osc>; | |
347 | clock-output-names = "lcpll0", "pcie_phy", "sdio", | |
348 | "ddr_phy"; | |
349 | }; | |
350 | ||
351 | genpll: genpll@3f140 { | |
352 | #clock-cells = <1>; | |
353 | compatible = "brcm,nsp-genpll"; | |
354 | reg = <0x3f140 0x24>; | |
355 | clocks = <&osc>; | |
356 | clock-output-names = "genpll", "phy", "ethernetclk", | |
357 | "usbclk", "iprocfast", "sata1", | |
358 | "sata2"; | |
359 | }; | |
ea2d8975 YRDR |
360 | |
361 | pinctrl: pinctrl@3f1c0 { | |
362 | compatible = "brcm,nsp-pinmux"; | |
363 | reg = <0x3f1c0 0x04>, | |
364 | <0x30028 0x04>, | |
365 | <0x3f408 0x04>; | |
366 | }; | |
8dbcad02 YRDR |
367 | |
368 | sata_phy: sata_phy@40100 { | |
369 | compatible = "brcm,iproc-nsp-sata-phy"; | |
370 | reg = <0x40100 0x340>; | |
371 | reg-names = "phy"; | |
372 | #address-cells = <1>; | |
373 | #size-cells = <0>; | |
374 | ||
375 | sata_phy0: sata-phy@0 { | |
376 | reg = <0>; | |
377 | #phy-cells = <0>; | |
378 | status = "disabled"; | |
379 | }; | |
380 | ||
381 | sata_phy1: sata-phy@1 { | |
382 | reg = <1>; | |
383 | #phy-cells = <0>; | |
384 | status = "disabled"; | |
385 | }; | |
386 | }; | |
387 | ||
388 | sata: ahci@41000 { | |
389 | compatible = "brcm,bcm-nsp-ahci"; | |
390 | reg-names = "ahci", "top-ctrl"; | |
391 | reg = <0x41000 0x1000>, <0x40020 0x1c>; | |
392 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
393 | #address-cells = <1>; | |
394 | #size-cells = <0>; | |
395 | status = "disabled"; | |
396 | ||
397 | sata0: sata-port@0 { | |
398 | reg = <0>; | |
399 | phys = <&sata_phy0>; | |
400 | phy-names = "sata-phy"; | |
401 | }; | |
402 | ||
403 | sata1: sata-port@1 { | |
404 | reg = <1>; | |
405 | phys = <&sata_phy1>; | |
406 | phy-names = "sata-phy"; | |
407 | }; | |
408 | }; | |
7b2e987d | 409 | }; |
52219902 JM |
410 | |
411 | pcie0: pcie@18012000 { | |
412 | compatible = "brcm,iproc-pcie"; | |
413 | reg = <0x18012000 0x1000>; | |
414 | ||
415 | #interrupt-cells = <1>; | |
416 | interrupt-map-mask = <0 0 0 0>; | |
417 | interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>; | |
418 | ||
419 | linux,pci-domain = <0>; | |
420 | ||
421 | bus-range = <0x00 0xff>; | |
422 | ||
423 | #address-cells = <3>; | |
424 | #size-cells = <2>; | |
425 | device_type = "pci"; | |
426 | ||
427 | /* Note: The HW does not support I/O resources. So, | |
428 | * only the memory resource range is being specified. | |
429 | */ | |
430 | ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>; | |
431 | ||
432 | status = "disabled"; | |
d71eb941 JM |
433 | |
434 | msi-parent = <&msi0>; | |
435 | msi0: msi@18012000 { | |
436 | compatible = "brcm,iproc-msi"; | |
437 | msi-controller; | |
438 | interrupt-parent = <&gic>; | |
439 | interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>, | |
440 | <GIC_SPI 128 IRQ_TYPE_NONE>, | |
441 | <GIC_SPI 129 IRQ_TYPE_NONE>, | |
442 | <GIC_SPI 130 IRQ_TYPE_NONE>; | |
443 | brcm,pcie-msi-inten; | |
444 | }; | |
52219902 JM |
445 | }; |
446 | ||
447 | pcie1: pcie@18013000 { | |
448 | compatible = "brcm,iproc-pcie"; | |
449 | reg = <0x18013000 0x1000>; | |
450 | ||
451 | #interrupt-cells = <1>; | |
452 | interrupt-map-mask = <0 0 0 0>; | |
453 | interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>; | |
454 | ||
455 | linux,pci-domain = <1>; | |
456 | ||
457 | bus-range = <0x00 0xff>; | |
458 | ||
459 | #address-cells = <3>; | |
460 | #size-cells = <2>; | |
461 | device_type = "pci"; | |
462 | ||
463 | /* Note: The HW does not support I/O resources. So, | |
464 | * only the memory resource range is being specified. | |
465 | */ | |
466 | ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>; | |
467 | ||
468 | status = "disabled"; | |
d71eb941 JM |
469 | |
470 | msi-parent = <&msi1>; | |
471 | msi1: msi@18013000 { | |
472 | compatible = "brcm,iproc-msi"; | |
473 | msi-controller; | |
474 | interrupt-parent = <&gic>; | |
475 | interrupts = <GIC_SPI 133 IRQ_TYPE_NONE>, | |
476 | <GIC_SPI 134 IRQ_TYPE_NONE>, | |
477 | <GIC_SPI 135 IRQ_TYPE_NONE>, | |
478 | <GIC_SPI 136 IRQ_TYPE_NONE>; | |
479 | brcm,pcie-msi-inten; | |
480 | }; | |
52219902 JM |
481 | }; |
482 | ||
483 | pcie2: pcie@18014000 { | |
484 | compatible = "brcm,iproc-pcie"; | |
485 | reg = <0x18014000 0x1000>; | |
486 | ||
487 | #interrupt-cells = <1>; | |
488 | interrupt-map-mask = <0 0 0 0>; | |
489 | interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>; | |
490 | ||
491 | linux,pci-domain = <2>; | |
492 | ||
493 | bus-range = <0x00 0xff>; | |
494 | ||
495 | #address-cells = <3>; | |
496 | #size-cells = <2>; | |
497 | device_type = "pci"; | |
498 | ||
499 | /* Note: The HW does not support I/O resources. So, | |
500 | * only the memory resource range is being specified. | |
501 | */ | |
502 | ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>; | |
503 | ||
504 | status = "disabled"; | |
d71eb941 JM |
505 | |
506 | msi-parent = <&msi2>; | |
507 | msi2: msi@18014000 { | |
508 | compatible = "brcm,iproc-msi"; | |
509 | msi-controller; | |
510 | interrupt-parent = <&gic>; | |
511 | interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>, | |
512 | <GIC_SPI 140 IRQ_TYPE_NONE>, | |
513 | <GIC_SPI 141 IRQ_TYPE_NONE>, | |
514 | <GIC_SPI 142 IRQ_TYPE_NONE>; | |
515 | brcm,pcie-msi-inten; | |
516 | }; | |
52219902 | 517 | }; |
7b2e987d | 518 | }; |