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Commit | Line | Data |
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76aa7591 | 1 | #include "bcm283x.dtsi" |
9d56c22a EA |
2 | |
3 | / { | |
4f24450c | 4 | compatible = "brcm,bcm2837"; |
9d56c22a EA |
5 | |
6 | soc { | |
7 | ranges = <0x7e000000 0x3f000000 0x1000000>, | |
8 | <0x40000000 0x40000000 0x00001000>; | |
9 | dma-ranges = <0xc0000000 0x00000000 0x3f000000>; | |
10 | ||
11 | local_intc: local_intc { | |
12 | compatible = "brcm,bcm2836-l1-intc"; | |
13 | reg = <0x40000000 0x100>; | |
14 | interrupt-controller; | |
b12f5d0f | 15 | #interrupt-cells = <2>; |
9d56c22a EA |
16 | interrupt-parent = <&local_intc>; |
17 | }; | |
18 | }; | |
19 | ||
20 | timer { | |
21 | compatible = "arm,armv7-timer"; | |
22 | interrupt-parent = <&local_intc>; | |
b12f5d0f SW |
23 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI |
24 | <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI | |
25 | <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI | |
26 | <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI | |
9d56c22a EA |
27 | always-on; |
28 | }; | |
29 | ||
30 | cpus: cpus { | |
31 | #address-cells = <1>; | |
32 | #size-cells = <0>; | |
f29c2568 | 33 | enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit |
9d56c22a EA |
34 | |
35 | cpu0: cpu@0 { | |
36 | device_type = "cpu"; | |
37 | compatible = "arm,cortex-a53"; | |
38 | reg = <0>; | |
39 | enable-method = "spin-table"; | |
40 | cpu-release-addr = <0x0 0x000000d8>; | |
41 | }; | |
42 | ||
43 | cpu1: cpu@1 { | |
44 | device_type = "cpu"; | |
45 | compatible = "arm,cortex-a53"; | |
46 | reg = <1>; | |
47 | enable-method = "spin-table"; | |
48 | cpu-release-addr = <0x0 0x000000e0>; | |
49 | }; | |
50 | ||
51 | cpu2: cpu@2 { | |
52 | device_type = "cpu"; | |
53 | compatible = "arm,cortex-a53"; | |
54 | reg = <2>; | |
55 | enable-method = "spin-table"; | |
56 | cpu-release-addr = <0x0 0x000000e8>; | |
57 | }; | |
58 | ||
59 | cpu3: cpu@3 { | |
60 | device_type = "cpu"; | |
61 | compatible = "arm,cortex-a53"; | |
62 | reg = <3>; | |
63 | enable-method = "spin-table"; | |
64 | cpu-release-addr = <0x0 0x000000f0>; | |
65 | }; | |
66 | }; | |
67 | }; | |
68 | ||
69 | /* Make the BCM2835-style global interrupt controller be a child of the | |
70 | * CPU-local interrupt controller. | |
71 | */ | |
72 | &intc { | |
73 | compatible = "brcm,bcm2836-armctrl-ic"; | |
74 | reg = <0x7e00b200 0x200>; | |
75 | interrupt-parent = <&local_intc>; | |
b12f5d0f | 76 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; |
9d56c22a | 77 | }; |
ce2a6ca5 | 78 | |
4ae6f954 SW |
79 | &cpu_thermal { |
80 | coefficients = <(-538) 412000>; | |
81 | }; | |
82 | ||
ce2a6ca5 MS |
83 | /* enable thermal sensor with the correct compatible property set */ |
84 | &thermal { | |
85 | compatible = "brcm,bcm2837-thermal"; | |
86 | status = "okay"; | |
87 | }; |