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79187a8e MC |
1 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
2 | ||
3 | #include "skeleton.dtsi" | |
4 | ||
5 | / { | |
6 | #address-cells = <2>; | |
7 | #size-cells = <2>; | |
8 | model = "Broadcom STB (bcm7445)"; | |
9 | compatible = "brcm,bcm7445", "brcm,brcmstb"; | |
10 | interrupt-parent = <&gic>; | |
11 | ||
12 | chosen { | |
13 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
14 | }; | |
15 | ||
16 | cpus { | |
17 | #address-cells = <1>; | |
18 | #size-cells = <0>; | |
19 | ||
20 | cpu@0 { | |
21 | compatible = "brcm,brahma-b15"; | |
22 | device_type = "cpu"; | |
23 | enable-method = "brcm,brahma-b15"; | |
24 | reg = <0>; | |
25 | }; | |
26 | ||
27 | cpu@1 { | |
28 | compatible = "brcm,brahma-b15"; | |
29 | device_type = "cpu"; | |
30 | enable-method = "brcm,brahma-b15"; | |
31 | reg = <1>; | |
32 | }; | |
33 | ||
34 | cpu@2 { | |
35 | compatible = "brcm,brahma-b15"; | |
36 | device_type = "cpu"; | |
37 | enable-method = "brcm,brahma-b15"; | |
38 | reg = <2>; | |
39 | }; | |
40 | ||
41 | cpu@3 { | |
42 | compatible = "brcm,brahma-b15"; | |
43 | device_type = "cpu"; | |
44 | enable-method = "brcm,brahma-b15"; | |
45 | reg = <3>; | |
46 | }; | |
47 | }; | |
48 | ||
49 | gic: interrupt-controller@ffd00000 { | |
50 | compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic"; | |
51 | reg = <0x00 0xffd01000 0x00 0x1000>, | |
52 | <0x00 0xffd02000 0x00 0x2000>, | |
53 | <0x00 0xffd04000 0x00 0x2000>, | |
54 | <0x00 0xffd06000 0x00 0x2000>; | |
55 | interrupt-controller; | |
56 | #interrupt-cells = <3>; | |
57 | }; | |
58 | ||
59 | timer { | |
60 | compatible = "arm,armv7-timer"; | |
61 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, | |
62 | <GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, | |
63 | <GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, | |
64 | <GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>; | |
65 | }; | |
66 | ||
67 | rdb { | |
68 | #address-cells = <1>; | |
69 | #size-cells = <1>; | |
70 | compatible = "simple-bus"; | |
71 | ranges = <0 0x00 0xf0000000 0x1000000>; | |
72 | ||
73 | serial@40ab00 { | |
74 | compatible = "ns16550a"; | |
75 | reg = <0x40ab00 0x20>; | |
76 | reg-shift = <2>; | |
77 | reg-io-width = <4>; | |
78 | interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
e36fcd13 | 79 | clock-frequency = <81000000>; |
79187a8e MC |
80 | }; |
81 | ||
82 | sun_top_ctrl: syscon@404000 { | |
83 | compatible = "brcm,bcm7445-sun-top-ctrl", | |
84 | "syscon"; | |
85 | reg = <0x404000 0x51c>; | |
86 | }; | |
87 | ||
88 | hif_cpubiuctrl: syscon@3e2400 { | |
89 | compatible = "brcm,bcm7445-hif-cpubiuctrl", | |
90 | "syscon"; | |
91 | reg = <0x3e2400 0x5b4>; | |
92 | }; | |
93 | ||
94 | hif_continuation: syscon@452000 { | |
95 | compatible = "brcm,bcm7445-hif-continuation", | |
96 | "syscon"; | |
97 | reg = <0x452000 0x100>; | |
98 | }; | |
0c02acec | 99 | |
6054ef25 | 100 | irq0_intc: interrupt-controller@40a780 { |
0c02acec BN |
101 | compatible = "brcm,bcm7120-l2-intc"; |
102 | interrupt-parent = <&gic>; | |
103 | #interrupt-cells = <1>; | |
104 | reg = <0x40a780 0x8>; | |
105 | interrupt-controller; | |
106 | interrupts = <GIC_SPI 0x45 0x0>, | |
107 | <GIC_SPI 0x43 0x0>; | |
108 | brcm,int-map-mask = <0x25c>, <0x7000000>; | |
109 | brcm,int-fwd-mask = <0x70000>; | |
110 | }; | |
79187a8e MC |
111 | }; |
112 | ||
113 | smpboot { | |
114 | compatible = "brcm,brcmstb-smpboot"; | |
115 | syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>; | |
116 | syscon-cont = <&hif_continuation>; | |
117 | }; | |
118 | ||
119 | reboot { | |
120 | compatible = "brcm,brcmstb-reboot"; | |
121 | syscon = <&sun_top_ctrl 0x304 0x308>; | |
122 | }; | |
123 | }; |