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5d0769f0 AB |
1 | /* |
2 | * Copyright 2012 Linaro Ltd | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | soc-u9500 { | |
16 | #address-cells = <1>; | |
17 | #size-cells = <1>; | |
7e0ce270 | 18 | compatible = "stericsson,db8500"; |
dab6487e | 19 | interrupt-parent = <&intc>; |
5d0769f0 | 20 | ranges; |
7e0ce270 | 21 | |
dab6487e LJ |
22 | intc: interrupt-controller@a0411000 { |
23 | compatible = "arm,cortex-a9-gic"; | |
24 | #interrupt-cells = <3>; | |
25 | #address-cells = <1>; | |
26 | interrupt-controller; | |
dab6487e LJ |
27 | reg = <0xa0411000 0x1000>, |
28 | <0xa0410100 0x100>; | |
29 | }; | |
30 | ||
f1949ea0 LJ |
31 | L2: l2-cache { |
32 | compatible = "arm,pl310-cache"; | |
33 | reg = <0xa0412000 0x1000>; | |
34 | interrupts = <0 13 4>; | |
35 | cache-unified; | |
36 | cache-level = <2>; | |
37 | }; | |
38 | ||
7e0ce270 LJ |
39 | pmu { |
40 | compatible = "arm,cortex-a9-pmu"; | |
41 | interrupts = <0 7 0x4>; | |
42 | }; | |
43 | ||
71de5c46 LJ |
44 | timer@a0410600 { |
45 | compatible = "arm,cortex-a9-twd-timer"; | |
46 | reg = <0xa0410600 0x20>; | |
47 | interrupts = <1 13 0x304>; | |
48 | }; | |
49 | ||
7e0ce270 LJ |
50 | rtc@80154000 { |
51 | compatible = "stericsson,db8500-rtc"; | |
52 | reg = <0x80154000 0x1000>; | |
53 | interrupts = <0 18 0x4>; | |
54 | }; | |
55 | ||
56 | gpio0: gpio@8012e000 { | |
57 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 58 | "st,nomadik-gpio"; |
7e0ce270 LJ |
59 | reg = <0x8012e000 0x80>; |
60 | interrupts = <0 119 0x4>; | |
93b5698a LJ |
61 | interrupt-controller; |
62 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
63 | supports-sleepmode; |
64 | gpio-controller; | |
c0b133bd LJ |
65 | #gpio-cells = <2>; |
66 | gpio-bank = <0>; | |
7e0ce270 LJ |
67 | }; |
68 | ||
69 | gpio1: gpio@8012e080 { | |
70 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 71 | "st,nomadik-gpio"; |
7e0ce270 LJ |
72 | reg = <0x8012e080 0x80>; |
73 | interrupts = <0 120 0x4>; | |
93b5698a LJ |
74 | interrupt-controller; |
75 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
76 | supports-sleepmode; |
77 | gpio-controller; | |
c0b133bd LJ |
78 | #gpio-cells = <2>; |
79 | gpio-bank = <1>; | |
7e0ce270 LJ |
80 | }; |
81 | ||
82 | gpio2: gpio@8000e000 { | |
83 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 84 | "st,nomadik-gpio"; |
7e0ce270 LJ |
85 | reg = <0x8000e000 0x80>; |
86 | interrupts = <0 121 0x4>; | |
93b5698a LJ |
87 | interrupt-controller; |
88 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
89 | supports-sleepmode; |
90 | gpio-controller; | |
c0b133bd LJ |
91 | #gpio-cells = <2>; |
92 | gpio-bank = <2>; | |
7e0ce270 LJ |
93 | }; |
94 | ||
95 | gpio3: gpio@8000e080 { | |
96 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 97 | "st,nomadik-gpio"; |
7e0ce270 LJ |
98 | reg = <0x8000e080 0x80>; |
99 | interrupts = <0 122 0x4>; | |
93b5698a LJ |
100 | interrupt-controller; |
101 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
102 | supports-sleepmode; |
103 | gpio-controller; | |
c0b133bd LJ |
104 | #gpio-cells = <2>; |
105 | gpio-bank = <3>; | |
7e0ce270 LJ |
106 | }; |
107 | ||
108 | gpio4: gpio@8000e100 { | |
109 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 110 | "st,nomadik-gpio"; |
7e0ce270 LJ |
111 | reg = <0x8000e100 0x80>; |
112 | interrupts = <0 123 0x4>; | |
93b5698a LJ |
113 | interrupt-controller; |
114 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
115 | supports-sleepmode; |
116 | gpio-controller; | |
c0b133bd LJ |
117 | #gpio-cells = <2>; |
118 | gpio-bank = <4>; | |
7e0ce270 LJ |
119 | }; |
120 | ||
121 | gpio5: gpio@8000e180 { | |
122 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 123 | "st,nomadik-gpio"; |
7e0ce270 LJ |
124 | reg = <0x8000e180 0x80>; |
125 | interrupts = <0 124 0x4>; | |
93b5698a LJ |
126 | interrupt-controller; |
127 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
128 | supports-sleepmode; |
129 | gpio-controller; | |
c0b133bd LJ |
130 | #gpio-cells = <2>; |
131 | gpio-bank = <5>; | |
7e0ce270 LJ |
132 | }; |
133 | ||
134 | gpio6: gpio@8011e000 { | |
135 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 136 | "st,nomadik-gpio"; |
7e0ce270 LJ |
137 | reg = <0x8011e000 0x80>; |
138 | interrupts = <0 125 0x4>; | |
93b5698a LJ |
139 | interrupt-controller; |
140 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
141 | supports-sleepmode; |
142 | gpio-controller; | |
c0b133bd LJ |
143 | #gpio-cells = <2>; |
144 | gpio-bank = <6>; | |
7e0ce270 LJ |
145 | }; |
146 | ||
147 | gpio7: gpio@8011e080 { | |
148 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 149 | "st,nomadik-gpio"; |
7e0ce270 LJ |
150 | reg = <0x8011e080 0x80>; |
151 | interrupts = <0 126 0x4>; | |
93b5698a LJ |
152 | interrupt-controller; |
153 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
154 | supports-sleepmode; |
155 | gpio-controller; | |
c0b133bd LJ |
156 | #gpio-cells = <2>; |
157 | gpio-bank = <7>; | |
7e0ce270 LJ |
158 | }; |
159 | ||
160 | gpio8: gpio@a03fe000 { | |
161 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 162 | "st,nomadik-gpio"; |
7e0ce270 LJ |
163 | reg = <0xa03fe000 0x80>; |
164 | interrupts = <0 127 0x4>; | |
93b5698a LJ |
165 | interrupt-controller; |
166 | #interrupt-cells = <2>; | |
7e0ce270 LJ |
167 | supports-sleepmode; |
168 | gpio-controller; | |
c0b133bd LJ |
169 | #gpio-cells = <2>; |
170 | gpio-bank = <8>; | |
7e0ce270 LJ |
171 | }; |
172 | ||
173 | usb@a03e0000 { | |
174 | compatible = "stericsson,db8500-musb", | |
175 | "mentor,musb"; | |
176 | reg = <0xa03e0000 0x10000>; | |
177 | interrupts = <0 23 0x4>; | |
178 | }; | |
179 | ||
180 | dma-controller@801C0000 { | |
181 | compatible = "stericsson,db8500-dma40", | |
182 | "stericsson,dma40"; | |
183 | reg = <0x801C0000 0x1000 0x40010000 0x800>; | |
184 | interrupts = <0 25 0x4>; | |
185 | }; | |
186 | ||
187 | prcmu@80157000 { | |
188 | compatible = "stericsson,db8500-prcmu"; | |
189 | reg = <0x80157000 0x1000>; | |
ccf74f76 | 190 | interrupts = <0 47 0x4>; |
7e0ce270 | 191 | #address-cells = <1>; |
3de3d749 LJ |
192 | #size-cells = <1>; |
193 | ranges; | |
194 | ||
ccf74f76 | 195 | prcmu-timer-4@80157450 { |
3de3d749 LJ |
196 | compatible = "stericsson,db8500-prcmu-timer-4"; |
197 | reg = <0x80157450 0xC>; | |
198 | }; | |
7e0ce270 | 199 | |
e5999f28 LJ |
200 | db8500-prcmu-regulators { |
201 | compatible = "stericsson,db8500-prcmu-regulator"; | |
202 | ||
203 | // DB8500_REGULATOR_VAPE | |
204 | db8500_vape_reg: db8500_vape { | |
205 | regulator-name = "db8500-vape"; | |
206 | regulator-always-on; | |
207 | }; | |
208 | ||
209 | // DB8500_REGULATOR_VARM | |
210 | db8500_varm_reg: db8500_varm { | |
211 | regulator-name = "db8500-varm"; | |
212 | }; | |
213 | ||
214 | // DB8500_REGULATOR_VMODEM | |
215 | db8500_vmodem_reg: db8500_vmodem { | |
216 | regulator-name = "db8500-vmodem"; | |
217 | }; | |
218 | ||
219 | // DB8500_REGULATOR_VPLL | |
220 | db8500_vpll_reg: db8500_vpll { | |
221 | regulator-name = "db8500-vpll"; | |
222 | }; | |
223 | ||
224 | // DB8500_REGULATOR_VSMPS1 | |
225 | db8500_vsmps1_reg: db8500_vsmps1 { | |
226 | regulator-name = "db8500-vsmps1"; | |
227 | }; | |
228 | ||
229 | // DB8500_REGULATOR_VSMPS2 | |
230 | db8500_vsmps2_reg: db8500_vsmps2 { | |
231 | regulator-name = "db8500-vsmps2"; | |
232 | }; | |
233 | ||
234 | // DB8500_REGULATOR_VSMPS3 | |
235 | db8500_vsmps3_reg: db8500_vsmps3 { | |
236 | regulator-name = "db8500-vsmps3"; | |
237 | }; | |
238 | ||
239 | // DB8500_REGULATOR_VRF1 | |
240 | db8500_vrf1_reg: db8500_vrf1 { | |
241 | regulator-name = "db8500-vrf1"; | |
242 | }; | |
243 | ||
244 | // DB8500_REGULATOR_SWITCH_SVAMMDSP | |
245 | db8500_sva_mmdsp_reg: db8500_sva_mmdsp { | |
246 | regulator-name = "db8500-sva-mmdsp"; | |
247 | }; | |
248 | ||
249 | // DB8500_REGULATOR_SWITCH_SVAMMDSPRET | |
250 | db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { | |
251 | regulator-name = "db8500-sva-mmdsp-ret"; | |
252 | }; | |
253 | ||
254 | // DB8500_REGULATOR_SWITCH_SVAPIPE | |
255 | db8500_sva_pipe_reg: db8500_sva_pipe { | |
256 | regulator-name = "db8500_sva_pipe"; | |
257 | }; | |
258 | ||
259 | // DB8500_REGULATOR_SWITCH_SIAMMDSP | |
260 | db8500_sia_mmdsp_reg: db8500_sia_mmdsp { | |
261 | regulator-name = "db8500_sia_mmdsp"; | |
262 | }; | |
263 | ||
264 | // DB8500_REGULATOR_SWITCH_SIAMMDSPRET | |
265 | db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { | |
266 | regulator-name = "db8500-sia-mmdsp-ret"; | |
267 | }; | |
268 | ||
269 | // DB8500_REGULATOR_SWITCH_SIAPIPE | |
270 | db8500_sia_pipe_reg: db8500_sia_pipe { | |
271 | regulator-name = "db8500-sia-pipe"; | |
272 | }; | |
273 | ||
274 | // DB8500_REGULATOR_SWITCH_SGA | |
275 | db8500_sga_reg: db8500_sga { | |
276 | regulator-name = "db8500-sga"; | |
277 | vin-supply = <&db8500_vape_reg>; | |
278 | }; | |
279 | ||
280 | // DB8500_REGULATOR_SWITCH_B2R2_MCDE | |
281 | db8500_b2r2_mcde_reg: db8500_b2r2_mcde { | |
282 | regulator-name = "db8500-b2r2-mcde"; | |
283 | vin-supply = <&db8500_vape_reg>; | |
284 | }; | |
285 | ||
286 | // DB8500_REGULATOR_SWITCH_ESRAM12 | |
287 | db8500_esram12_reg: db8500_esram12 { | |
288 | regulator-name = "db8500-esram12"; | |
289 | }; | |
290 | ||
291 | // DB8500_REGULATOR_SWITCH_ESRAM12RET | |
292 | db8500_esram12_ret_reg: db8500_esram12_ret { | |
293 | regulator-name = "db8500-esram12-ret"; | |
294 | }; | |
295 | ||
296 | // DB8500_REGULATOR_SWITCH_ESRAM34 | |
297 | db8500_esram34_reg: db8500_esram34 { | |
298 | regulator-name = "db8500-esram34"; | |
299 | }; | |
300 | ||
301 | // DB8500_REGULATOR_SWITCH_ESRAM34RET | |
302 | db8500_esram34_ret_reg: db8500_esram34_ret { | |
303 | regulator-name = "db8500-esram34-ret"; | |
304 | }; | |
305 | }; | |
306 | ||
7e0ce270 LJ |
307 | ab8500@5 { |
308 | compatible = "stericsson,ab8500"; | |
309 | reg = <5>; /* mailbox 5 is i2c */ | |
310 | interrupts = <0 40 0x4>; | |
311 | }; | |
312 | }; | |
313 | ||
314 | i2c@80004000 { | |
785834a1 | 315 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
316 | reg = <0x80004000 0x1000>; |
317 | interrupts = <0 21 0x4>; | |
318 | #address-cells = <1>; | |
319 | #size-cells = <0>; | |
320 | }; | |
321 | ||
322 | i2c@80122000 { | |
785834a1 | 323 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
324 | reg = <0x80122000 0x1000>; |
325 | interrupts = <0 22 0x4>; | |
326 | #address-cells = <1>; | |
327 | #size-cells = <0>; | |
328 | }; | |
329 | ||
330 | i2c@80128000 { | |
785834a1 | 331 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
332 | reg = <0x80128000 0x1000>; |
333 | interrupts = <0 55 0x4>; | |
334 | #address-cells = <1>; | |
335 | #size-cells = <0>; | |
336 | }; | |
337 | ||
338 | i2c@80110000 { | |
785834a1 | 339 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
340 | reg = <0x80110000 0x1000>; |
341 | interrupts = <0 12 0x4>; | |
342 | #address-cells = <1>; | |
343 | #size-cells = <0>; | |
344 | }; | |
345 | ||
346 | i2c@8012a000 { | |
785834a1 | 347 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
348 | reg = <0x8012a000 0x1000>; |
349 | interrupts = <0 51 0x4>; | |
350 | #address-cells = <1>; | |
351 | #size-cells = <0>; | |
352 | }; | |
353 | ||
354 | ssp@80002000 { | |
355 | compatible = "arm,pl022", "arm,primecell"; | |
356 | reg = <80002000 0x1000>; | |
357 | interrupts = <0 14 0x4>; | |
358 | #address-cells = <1>; | |
359 | #size-cells = <0>; | |
360 | status = "disabled"; | |
15daf691 LJ |
361 | |
362 | // Add one of these for each child device | |
93b5698a LJ |
363 | cs-gpios = <&gpio0 31 0x4 &gpio4 14 0x4 &gpio4 16 0x4 |
364 | &gpio6 22 0x4 &gpio7 0 0x4>; | |
15daf691 | 365 | |
7e0ce270 LJ |
366 | }; |
367 | ||
368 | uart@80120000 { | |
369 | compatible = "arm,pl011", "arm,primecell"; | |
370 | reg = <0x80120000 0x1000>; | |
371 | interrupts = <0 11 0x4>; | |
372 | status = "disabled"; | |
373 | }; | |
374 | uart@80121000 { | |
375 | compatible = "arm,pl011", "arm,primecell"; | |
376 | reg = <0x80121000 0x1000>; | |
377 | interrupts = <0 19 0x4>; | |
378 | status = "disabled"; | |
379 | }; | |
380 | uart@80007000 { | |
381 | compatible = "arm,pl011", "arm,primecell"; | |
382 | reg = <0x80007000 0x1000>; | |
383 | interrupts = <0 26 0x4>; | |
384 | status = "disabled"; | |
385 | }; | |
386 | ||
387 | sdi@80126000 { | |
388 | compatible = "arm,pl18x", "arm,primecell"; | |
389 | reg = <0x80126000 0x1000>; | |
390 | interrupts = <0 60 0x4>; | |
391 | status = "disabled"; | |
392 | }; | |
393 | sdi@80118000 { | |
394 | compatible = "arm,pl18x", "arm,primecell"; | |
395 | reg = <0x80118000 0x1000>; | |
396 | interrupts = <0 50 0x4>; | |
397 | status = "disabled"; | |
398 | }; | |
399 | sdi@80005000 { | |
400 | compatible = "arm,pl18x", "arm,primecell"; | |
401 | reg = <0x80005000 0x1000>; | |
402 | interrupts = <0 41 0x4>; | |
403 | status = "disabled"; | |
404 | }; | |
405 | sdi@80119000 { | |
406 | compatible = "arm,pl18x", "arm,primecell"; | |
407 | reg = <0x80119000 0x1000>; | |
408 | interrupts = <0 59 0x4>; | |
409 | status = "disabled"; | |
410 | }; | |
411 | sdi@80114000 { | |
412 | compatible = "arm,pl18x", "arm,primecell"; | |
413 | reg = <0x80114000 0x1000>; | |
414 | interrupts = <0 99 0x4>; | |
415 | status = "disabled"; | |
416 | }; | |
417 | sdi@80008000 { | |
418 | compatible = "arm,pl18x", "arm,primecell"; | |
419 | reg = <0x80114000 0x1000>; | |
420 | interrupts = <0 100 0x4>; | |
421 | status = "disabled"; | |
422 | }; | |
bf76e062 LJ |
423 | |
424 | external-bus@50000000 { | |
425 | compatible = "simple-bus"; | |
426 | reg = <0x50000000 0x4000000>; | |
427 | #address-cells = <1>; | |
428 | #size-cells = <1>; | |
429 | ranges = <0 0x50000000 0x4000000>; | |
430 | status = "disabled"; | |
431 | }; | |
5d0769f0 AB |
432 | }; |
433 | }; |