[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / dm814x.dtsi

/*
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/dm814x.h>

/ {
	compatible = "ti,dm814";
	interrupt-parent = <&intc>;
	#address-cells = <1>;
	#size-cells = <1>;
	chosen { };

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				reg = <0x47401400 0x400
				       0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
		};

		/*
		 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
		 * It shows the module target agent registers though, so the
		 * actual device is typically 0x1000 before the target agent
		 * except in cases where the module is larger than 0x1000.
		 */
		l4ls: l4ls@48000000 {
			compatible = "ti,dm814-l4ls", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48000000 0x2000000>;

			i2c1: i2c@28000 {
				compatible = "ti,omap4-i2c";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "i2c1";
				reg = <0x28000 0x1000>;
				interrupts = <70>;
			};

			elm: elm@80000 {
				compatible = "ti,814-elm";
				ti,hwmods = "elm";
				reg = <0x80000 0x2000>;
				interrupts = <4>;
			};

			gpio1: gpio@32000 {
				compatible = "ti,omap4-gpio";
				ti,hwmods = "gpio1";
				ti,gpio-always-on;
				reg = <0x32000 0x2000>;
				interrupts = <96>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@4c000 {
				compatible = "ti,omap4-gpio";
				ti,hwmods = "gpio2";
				ti,gpio-always-on;
				reg = <0x4c000 0x2000>;
				interrupts = <98>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			i2c2: i2c@2a000 {
				compatible = "ti,omap4-i2c";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "i2c2";
				reg = <0x2a000 0x1000>;
				interrupts = <71>;
			};

			mcspi1: spi@30000 {
				compatible = "ti,omap4-mcspi";
				reg = <0x30000 0x1000>;
				#address-cells = <1>;
				#size-cells = <0>;
				interrupts = <65>;
				ti,spi-num-cs = <4>;
				ti,hwmods = "mcspi1";
				dmas = <&edma 16 0 &edma 17 0
					&edma 18 0 &edma 19 0>;
				dma-names = "tx0", "rx0", "tx1", "rx1";
			};

			timer1: timer@2e000 {
				compatible = "ti,dm814-timer";
				reg = <0x2e000 0x2000>;
				interrupts = <67>;
				ti,hwmods = "timer1";
				ti,timer-alwon;
			};

			uart1: uart@20000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart1";
				reg = <0x20000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <72>;
				dmas = <&edma 26 0 &edma 27 0>;
				dma-names = "tx", "rx";
			};

			uart2: uart@22000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart2";
				reg = <0x22000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <73>;
				dmas = <&edma 28 0 &edma 29 0>;
				dma-names = "tx", "rx";
			};

			uart3: uart@24000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart3";
				reg = <0x24000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <74>;
				dmas = <&edma 30 0 &edma 31 0>;
				dma-names = "tx", "rx";
			};

			timer2: timer@40000 {
				compatible = "ti,dm814-timer";
				reg = <0x40000 0x2000>;
				interrupts = <68>;
				ti,hwmods = "timer2";
			};

			timer3: timer@42000 {
				compatible = "ti,dm814-timer";
				reg = <0x42000 0x2000>;
				interrupts = <69>;
				ti,hwmods = "timer3";
			};

			mmc1: mmc@60000 {
				compatible = "ti,omap4-hsmmc";
				ti,hwmods = "mmc1";
				dmas = <&edma 24 0
					&edma 25 0>;
				dma-names = "tx", "rx";
				interrupts = <64>;
				interrupt-parent = <&intc>;
				reg = <0x60000 0x1000>;
			};

			rtc: rtc@c0000 {
				compatible = "ti,am3352-rtc", "ti,da830-rtc";
				reg = <0xc0000 0x1000>;
				interrupts = <75 76>;
				ti,hwmods = "rtc";
			};

			mmc2: mmc@1d8000 {
				compatible = "ti,omap4-hsmmc";
				ti,hwmods = "mmc2";
				dmas = <&edma 2 0
					&edma 3 0>;
				dma-names = "tx", "rx";
				interrupts = <28>;
				interrupt-parent = <&intc>;
				reg = <0x1d8000 0x1000>;
			};

			control: control@140000 {
				compatible = "ti,dm814-scm", "simple-bus";
				reg = <0x140000 0x20000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x140000 0x20000>;

				scm_conf: scm_conf@0 {
					compatible = "syscon", "simple-bus";
					reg = <0x0 0x800>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0 0x800>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};

					scm_clockdomains: clockdomains {
					};
				};

				usb_ctrl_mod: control@620 {
					compatible = "ti,am335x-usb-ctrl-module";
					reg = <0x620 0x10
						0x648 0x4>;
					reg-names = "phy_ctrl", "wakeup";
				};

				edma_xbar: dma-router@f90 {
					compatible = "ti,am335x-edma-crossbar";
					reg = <0xf90 0x40>;
					#dma-cells = <3>;
					dma-requests = <32>;
					dma-masters = <&edma>;
				};

				/*
				 * Note that silicon revision 2.1 and older
				 * require input enabled (bit 18 set) for all
				 * 3.3V I/Os to avoid cumulative hardware damage.
				 * For more info, see errata advisory 2.1.87.
				 * We leave bit 18 out of function-mask and rely
				 * on the bootloader for it.
				 */
				pincntl: pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x438>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x307ff>;
				};

				usb1_phy: usb-phy@1b00 {
					compatible = "ti,am335x-usb-phy";
					reg = <0x1b00 0x100>;
					reg-names = "phy";
					ti,ctrl_mod = <&usb_ctrl_mod>;
				};
			};

			prcm: prcm@180000 {
				compatible = "ti,dm814-prcm", "simple-bus";
				reg = <0x180000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x180000 0x2000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			/* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
			pllss: pllss@1c5000 {
				compatible = "ti,dm814-pllss", "simple-bus";
				reg = <0x1c5000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1c5000 0x1000>;

				pllss_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				pllss_clockdomains: clockdomains {
				};
			};

			wdt1: wdt@1c7000 {
				compatible = "ti,omap3-wdt";
				ti,hwmods = "wd_timer";
				reg = <0x1c7000 0x1000>;
				interrupts = <91>;
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,dm814-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		/* Board must configure evtmux with edma_xbar for EDMA */
		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			interrupts = <29>;
			interrupt-parent = <&intc>;
			reg = <0x47810000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg =	<0x49000000 0x10000>;
			reg-names = "edma3_cc";
			interrupts = <12 13 14>;
			interrupt-names = "edma3_ccint", "edma3_mperr",
					  "edma3_ccerrint";
			dma-requests = <64>;
			#dma-cells = <2>;

			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
				   <&edma_tptc2 3>, <&edma_tptc3 0>;

			ti,edma-memcpy-channels = <20 21>;
		};

		edma_tptc0: tptc@49800000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg =	<0x49800000 0x100000>;
			interrupts = <112>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc1: tptc@49900000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg =	<0x49900000 0x100000>;
			interrupts = <113>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc2: tptc@49a00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc2";
			reg =	<0x49a00000 0x100000>;
			interrupts = <114>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc3: tptc@49b00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc3";
			reg =	<0x49b00000 0x100000>;
			interrupts = <115>;
			interrupt-names = "edma3_tcerrint";
		};

		/* See TRM "Table 1-318. L4HS Instance Summary" */
		l4hs: l4hs@4a000000 {
			compatible = "ti,dm814-l4hs", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4a000000 0x1b4040>;
		};

		/* REVISIT: Move to live under l4hs once driver is fixed */
		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a100900 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;
			syscon = <&scm_conf>;

			davinci_mdio: mdio@4a100800 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a100800 0x100>;
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@48140650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x48140650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
		};
	};
};

#include "dm814x-clocks.dtsi"
Commit	Line	Data
f3d953ea TL	1	/*
	2	* This file is licensed under the terms of the GNU General Public License
	3	* version 2. This program is licensed "as is" without any warranty of any
	4	* kind, whether express or implied.
	5	*/
	6
	7	#include <dt-bindings/gpio/gpio.h>
b4d6df2a	8	#include <dt-bindings/pinctrl/dm814x.h>
f3d953ea	9
f3d953ea TL	10	/ {
	11	compatible = "ti,dm814";
	12	interrupt-parent = <&intc>;
76155b37 JMC	13	#address-cells = <1>;
76155b37 JMC	14	#size-cells = <1>;
9536fd30	15	chosen { };
f3d953ea TL	16
	17	aliases {
	18	i2c0 = &i2c1;
	19	i2c1 = &i2c2;
	20	serial0 = &uart1;
	21	serial1 = &uart2;
	22	serial2 = &uart3;
	23	ethernet0 = &cpsw_emac0;
	24	ethernet1 = &cpsw_emac1;
89639d9f TL	25	usb0 = &usb0;
	26	usb1 = &usb1;
	27	phy0 = &usb0_phy;
	28	phy1 = &usb1_phy;
f3d953ea TL	29	};
	30
	31	cpus {
	32	#address-cells = <1>;
	33	#size-cells = <0>;
	34	cpu@0 {
	35	compatible = "arm,cortex-a8";
	36	device_type = "cpu";
	37	reg = <0>;
	38	};
	39	};
	40
	41	pmu {
	42	compatible = "arm,cortex-a8-pmu";
	43	interrupts = <3>;
	44	};
	45
	46	/*
	47	* The soc node represents the soc top level view. It is used for IPs
	48	* that are not memory mapped in the MPU view or for the MPU itself.
	49	*/
	50	soc {
	51	compatible = "ti,omap-infra";
	52	mpu {
	53	compatible = "ti,omap3-mpu";
	54	ti,hwmods = "mpu";
	55	};
	56	};
	57
	58	ocp {
	59	compatible = "simple-bus";
	60	#address-cells = <1>;
	61	#size-cells = <1>;
	62	ranges;
	63	ti,hwmods = "l3_main";
	64
89639d9f TL	65	usb: usb@47400000 {
	66	compatible = "ti,am33xx-usb";
	67	reg = <0x47400000 0x1000>;
	68	ranges;
	69	#address-cells = <1>;
	70	#size-cells = <1>;
	71	ti,hwmods = "usb_otg_hs";
	72
	73	usb0_phy: usb-phy@47401300 {
	74	compatible = "ti,am335x-usb-phy";
	75	reg = <0x47401300 0x100>;
	76	reg-names = "phy";
	77	ti,ctrl_mod = <&usb_ctrl_mod>;
	78	};
	79
	80	usb0: usb@47401000 {
	81	compatible = "ti,musb-am33xx";
	82	reg = <0x47401400 0x400
	83	0x47401000 0x200>;
	84	reg-names = "mc", "control";
	85
	86	interrupts = <18>;
	87	interrupt-names = "mc";
	88	dr_mode = "otg";
	89	mentor,multipoint = <1>;
	90	mentor,num-eps = <16>;
	91	mentor,ram-bits = <12>;
	92	mentor,power = <500>;
	93	phys = <&usb0_phy>;
	94
	95	dmas = <&cppi41dma 0 0 &cppi41dma 1 0
	96	&cppi41dma 2 0 &cppi41dma 3 0
	97	&cppi41dma 4 0 &cppi41dma 5 0
	98	&cppi41dma 6 0 &cppi41dma 7 0
	99	&cppi41dma 8 0 &cppi41dma 9 0
	100	&cppi41dma 10 0 &cppi41dma 11 0
	101	&cppi41dma 12 0 &cppi41dma 13 0
	102	&cppi41dma 14 0 &cppi41dma 0 1
	103	&cppi41dma 1 1 &cppi41dma 2 1
	104	&cppi41dma 3 1 &cppi41dma 4 1
	105	&cppi41dma 5 1 &cppi41dma 6 1
	106	&cppi41dma 7 1 &cppi41dma 8 1
	107	&cppi41dma 9 1 &cppi41dma 10 1
	108	&cppi41dma 11 1 &cppi41dma 12 1
	109	&cppi41dma 13 1 &cppi41dma 14 1>;
	110	dma-names =
	111	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	112	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	113	"rx14", "rx15",
	114	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	115	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	116	"tx14", "tx15";
	117	};
	118
	119	usb1: usb@47401800 {
	120	compatible = "ti,musb-am33xx";
	121	reg = <0x47401c00 0x400
	122	0x47401800 0x200>;
	123	reg-names = "mc", "control";
	124	interrupts = <19>;
	125	interrupt-names = "mc";
	126	dr_mode = "otg";
	127	mentor,multipoint = <1>;
	128	mentor,num-eps = <16>;
129	mentor,ram-bits = <12>;
130	mentor,power = <500>;
131	phys = <&usb1_phy>;
132
133	dmas = <&cppi41dma 15 0 &cppi41dma 16 0
134	&cppi41dma 17 0 &cppi41dma 18 0
135	&cppi41dma 19 0 &cppi41dma 20 0
136	&cppi41dma 21 0 &cppi41dma 22 0
137	&cppi41dma 23 0 &cppi41dma 24 0
138	&cppi41dma 25 0 &cppi41dma 26 0
139	&cppi41dma 27 0 &cppi41dma 28 0
140	&cppi41dma 29 0 &cppi41dma 15 1
141	&cppi41dma 16 1 &cppi41dma 17 1
142	&cppi41dma 18 1 &cppi41dma 19 1
143	&cppi41dma 20 1 &cppi41dma 21 1
144	&cppi41dma 22 1 &cppi41dma 23 1
145	&cppi41dma 24 1 &cppi41dma 25 1
146	&cppi41dma 26 1 &cppi41dma 27 1
147	&cppi41dma 28 1 &cppi41dma 29 1>;
148	dma-names =
149	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
150	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
151	"rx14", "rx15",
152	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
153	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
154	"tx14", "tx15";
155	};
156
157	cppi41dma: dma-controller@47402000 {
158	compatible = "ti,am3359-cppi41";
159	reg = <0x47400000 0x1000
160	0x47402000 0x1000
161	0x47403000 0x1000
162	0x47404000 0x4000>;
163	reg-names = "glue", "controller", "scheduler", "queuemgr";
164	interrupts = <17>;
165	interrupt-names = "glue";
166	#dma-cells = <2>;
167	#dma-channels = <30>;
168	#dma-requests = <256>;
169	};
170	};
171
f3d953ea	172	/*
3a91b061 TL	173	* See TRM "Table 1-317. L4LS Instance Summary" for hints.
	174	* It shows the module target agent registers though, so the
	175	* actual device is typically 0x1000 before the target agent
	176	* except in cases where the module is larger than 0x1000.
f3d953ea TL	177	*/
	178	l4ls: l4ls@48000000 {
	179	compatible = "ti,dm814-l4ls", "simple-bus";
	180	#address-cells = <1>;
	181	#size-cells = <1>;
	182	ranges = <0 0x48000000 0x2000000>;
	183
	184	i2c1: i2c@28000 {
	185	compatible = "ti,omap4-i2c";
	186	#address-cells = <1>;
	187	#size-cells = <0>;
	188	ti,hwmods = "i2c1";
	189	reg = <0x28000 0x1000>;
	190	interrupts = <70>;
	191	};
	192
	193	elm: elm@80000 {
	194	compatible = "ti,814-elm";
	195	ti,hwmods = "elm";
	196	reg = <0x80000 0x2000>;
	197	interrupts = <4>;
	198	};
	199
	200	gpio1: gpio@32000 {
	201	compatible = "ti,omap4-gpio";
	202	ti,hwmods = "gpio1";
	203	ti,gpio-always-on;
	204	reg = <0x32000 0x2000>;
	205	interrupts = <96>;
	206	gpio-controller;
	207	#gpio-cells = <2>;
	208	interrupt-controller;
	209	#interrupt-cells = <2>;
	210	};
	211
	212	gpio2: gpio@4c000 {
	213	compatible = "ti,omap4-gpio";
	214	ti,hwmods = "gpio2";
	215	ti,gpio-always-on;
	216	reg = <0x4c000 0x2000>;
	217	interrupts = <98>;
	218	gpio-controller;
	219	#gpio-cells = <2>;
	220	interrupt-controller;
	221	#interrupt-cells = <2>;
	222	};
	223
	224	i2c2: i2c@2a000 {
	225	compatible = "ti,omap4-i2c";
	226	#address-cells = <1>;
	227	#size-cells = <0>;
	228	ti,hwmods = "i2c2";
	229	reg = <0x2a000 0x1000>;
	230	interrupts = <71>;
	231	};
	232
	233	mcspi1: spi@30000 {
	234	compatible = "ti,omap4-mcspi";
	235	reg = <0x30000 0x1000>;
	236	#address-cells = <1>;
	237	#size-cells = <0>;
	238	interrupts = <65>;
	239	ti,spi-num-cs = <4>;
	240	ti,hwmods = "mcspi1";
9a640422 TL	241	dmas = <&edma 16 0 &edma 17 0
9a640422 TL	242	&edma 18 0 &edma 19 0>;
f3d953ea TL	243	dma-names = "tx0", "rx0", "tx1", "rx1";
	244	};
	245
	246	timer1: timer@2e000 {
	247	compatible = "ti,dm814-timer";
	248	reg = <0x2e000 0x2000>;
	249	interrupts = <67>;
	250	ti,hwmods = "timer1";
	251	ti,timer-alwon;
	252	};
	253
	254	uart1: uart@20000 {
f62280ef	255	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	256	ti,hwmods = "uart1";
	257	reg = <0x20000 0x2000>;
	258	clock-frequency = <48000000>;
	259	interrupts = <72>;
9a640422	260	dmas = <&edma 26 0 &edma 27 0>;
f3d953ea TL	261	dma-names = "tx", "rx";
	262	};
	263
	264	uart2: uart@22000 {
f62280ef	265	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	266	ti,hwmods = "uart2";
	267	reg = <0x22000 0x2000>;
	268	clock-frequency = <48000000>;
	269	interrupts = <73>;
9a640422	270	dmas = <&edma 28 0 &edma 29 0>;
f3d953ea TL	271	dma-names = "tx", "rx";
	272	};
	273
	274	uart3: uart@24000 {
f62280ef	275	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	276	ti,hwmods = "uart3";
	277	reg = <0x24000 0x2000>;
	278	clock-frequency = <48000000>;
	279	interrupts = <74>;
9a640422	280	dmas = <&edma 30 0 &edma 31 0>;
f3d953ea TL	281	dma-names = "tx", "rx";
	282	};
	283
	284	timer2: timer@40000 {
	285	compatible = "ti,dm814-timer";
	286	reg = <0x40000 0x2000>;
	287	interrupts = <68>;
	288	ti,hwmods = "timer2";
	289	};
	290
	291	timer3: timer@42000 {
	292	compatible = "ti,dm814-timer";
	293	reg = <0x42000 0x2000>;
	294	interrupts = <69>;
	295	ti,hwmods = "timer3";
	296	};
	297
609e5574 TL	298	mmc1: mmc@60000 {
	299	compatible = "ti,omap4-hsmmc";
	300	ti,hwmods = "mmc1";
	301	dmas = <&edma 24 0
	302	&edma 25 0>;
	303	dma-names = "tx", "rx";
	304	interrupts = <64>;
	305	interrupt-parent = <&intc>;
	306	reg = <0x60000 0x1000>;
	307	};
	308
f22b0b4f TL	309	rtc: rtc@c0000 {
	310	compatible = "ti,am3352-rtc", "ti,da830-rtc";
	311	reg = <0xc0000 0x1000>;
	312	interrupts = <75 76>;
	313	ti,hwmods = "rtc";
	314	};
	315
609e5574 TL	316	mmc2: mmc@1d8000 {
	317	compatible = "ti,omap4-hsmmc";
	318	ti,hwmods = "mmc2";
	319	dmas = <&edma 2 0
	320	&edma 3 0>;
	321	dma-names = "tx", "rx";
	322	interrupts = <28>;
	323	interrupt-parent = <&intc>;
	324	reg = <0x1d8000 0x1000>;
	325	};
	326
87ee15ec	327	control: control@140000 {
f3d953ea	328	compatible = "ti,dm814-scm", "simple-bus";
3a91b061	329	reg = <0x140000 0x20000>;
f3d953ea TL	330	#address-cells = <1>;
f3d953ea TL	331	#size-cells = <1>;
3a91b061	332	ranges = <0 0x140000 0x20000>;
f3d953ea TL	333
f3d953ea TL	334	scm_conf: scm_conf@0 {
1aa09df0	335	compatible = "syscon", "simple-bus";
f3d953ea TL	336	reg = <0x0 0x800>;
	337	#address-cells = <1>;
	338	#size-cells = <1>;
1aa09df0	339	ranges = <0 0 0x800>;
f3d953ea TL	340
	341	scm_clocks: clocks {
	342	#address-cells = <1>;
	343	#size-cells = <0>;
	344	};
	345
	346	scm_clockdomains: clockdomains {
	347	};
	348	};
	349
89639d9f TL	350	usb_ctrl_mod: control@620 {
	351	compatible = "ti,am335x-usb-ctrl-module";
	352	reg = <0x620 0x10
	353	0x648 0x4>;
	354	reg-names = "phy_ctrl", "wakeup";
	355	};
	356
9a640422 TL	357	edma_xbar: dma-router@f90 {
	358	compatible = "ti,am335x-edma-crossbar";
	359	reg = <0xf90 0x40>;
	360	#dma-cells = <3>;
	361	dma-requests = <32>;
	362	dma-masters = <&edma>;
	363	};
	364
9621557f TL	365	/*
	366	* Note that silicon revision 2.1 and older
	367	* require input enabled (bit 18 set) for all
	368	* 3.3V I/Os to avoid cumulative hardware damage.
	369	* For more info, see errata advisory 2.1.87.
	370	* We leave bit 18 out of function-mask and rely
	371	* on the bootloader for it.
	372	*/
f3d953ea TL	373	pincntl: pinmux@800 {
f3d953ea TL	374	compatible = "pinctrl-single";
9621557f	375	reg = <0x800 0x438>;
f3d953ea TL	376	#address-cells = <1>;
f3d953ea TL	377	#size-cells = <0>;
be76fd31	378	#pinctrl-cells = <1>;
f3d953ea	379	pinctrl-single,register-width = <32>;
9621557f	380	pinctrl-single,function-mask = <0x307ff>;
f3d953ea	381	};
89639d9f TL	382
	383	usb1_phy: usb-phy@1b00 {
	384	compatible = "ti,am335x-usb-phy";
	385	reg = <0x1b00 0x100>;
	386	reg-names = "phy";
	387	ti,ctrl_mod = <&usb_ctrl_mod>;
	388	};
f3d953ea TL	389	};
	390
	391	prcm: prcm@180000 {
	392	compatible = "ti,dm814-prcm", "simple-bus";
7f8f0b11 TL	393	reg = <0x180000 0x2000>;
	394	#address-cells = <1>;
	395	#size-cells = <1>;
	396	ranges = <0 0x180000 0x2000>;
f3d953ea TL	397
	398	prcm_clocks: clocks {
	399	#address-cells = <1>;
	400	#size-cells = <0>;
	401	};
	402
	403	prcm_clockdomains: clockdomains {
	404	};
	405	};
	406
7f8f0b11	407	/* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
f3d953ea TL	408	pllss: pllss@1c5000 {
f3d953ea TL	409	compatible = "ti,dm814-pllss", "simple-bus";
7f8f0b11 TL	410	reg = <0x1c5000 0x1000>;
	411	#address-cells = <1>;
	412	#size-cells = <1>;
	413	ranges = <0 0x1c5000 0x1000>;
f3d953ea TL	414
	415	pllss_clocks: clocks {
	416	#address-cells = <1>;
	417	#size-cells = <0>;
	418	};
	419
	420	pllss_clockdomains: clockdomains {
	421	};
	422	};
	423
	424	wdt1: wdt@1c7000 {
	425	compatible = "ti,omap3-wdt";
	426	ti,hwmods = "wd_timer";
	427	reg = <0x1c7000 0x1000>;
	428	interrupts = <91>;
	429	};
	430	};
	431
	432	intc: interrupt-controller@48200000 {
	433	compatible = "ti,dm814-intc";
	434	interrupt-controller;
	435	#interrupt-cells = <1>;
	436	reg = <0x48200000 0x1000>;
	437	};
	438
609e5574 TL	439	/* Board must configure evtmux with edma_xbar for EDMA */
	440	mmc3: mmc@47810000 {
	441	compatible = "ti,omap4-hsmmc";
	442	ti,hwmods = "mmc3";
	443	interrupts = <29>;
	444	interrupt-parent = <&intc>;
	445	reg = <0x47810000 0x1000>;
	446	};
	447
f3d953ea	448	edma: edma@49000000 {
9a640422 TL	449	compatible = "ti,edma3-tpcc";
	450	ti,hwmods = "tpcc";
	451	reg = <0x49000000 0x10000>;
	452	reg-names = "edma3_cc";
f3d953ea	453	interrupts = <12 13 14>;
a5206553	454	interrupt-names = "edma3_ccint", "edma3_mperr",
9a640422 TL	455	"edma3_ccerrint";
	456	dma-requests = <64>;
	457	#dma-cells = <2>;
	458
	459	ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
	460	<&edma_tptc2 3>, <&edma_tptc3 0>;
	461
	462	ti,edma-memcpy-channels = <20 21>;
	463	};
	464
	465	edma_tptc0: tptc@49800000 {
	466	compatible = "ti,edma3-tptc";
	467	ti,hwmods = "tptc0";
	468	reg = <0x49800000 0x100000>;
	469	interrupts = <112>;
	470	interrupt-names = "edma3_tcerrint";
	471	};
	472
	473	edma_tptc1: tptc@49900000 {
	474	compatible = "ti,edma3-tptc";
	475	ti,hwmods = "tptc1";
	476	reg = <0x49900000 0x100000>;
	477	interrupts = <113>;
	478	interrupt-names = "edma3_tcerrint";
	479	};
	480
	481	edma_tptc2: tptc@49a00000 {
	482	compatible = "ti,edma3-tptc";
	483	ti,hwmods = "tptc2";
	484	reg = <0x49a00000 0x100000>;
	485	interrupts = <114>;
	486	interrupt-names = "edma3_tcerrint";
	487	};
	488
	489	edma_tptc3: tptc@49b00000 {
	490	compatible = "ti,edma3-tptc";
	491	ti,hwmods = "tptc3";
	492	reg = <0x49b00000 0x100000>;
	493	interrupts = <115>;
	494	interrupt-names = "edma3_tcerrint";
f3d953ea TL	495	};
	496
	497	/* See TRM "Table 1-318. L4HS Instance Summary" */
	498	l4hs: l4hs@4a000000 {
	499	compatible = "ti,dm814-l4hs", "simple-bus";
	500	#address-cells = <1>;
	501	#size-cells = <1>;
	502	ranges = <0 0x4a000000 0x1b4040>;
	503	};
	504
	505	/* REVISIT: Move to live under l4hs once driver is fixed */
	506	mac: ethernet@4a100000 {
	507	compatible = "ti,cpsw";
	508	ti,hwmods = "cpgmac0";
	509	clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
	510	clock-names = "fck", "cpts";
	511	cpdma_channels = <8>;
	512	ale_entries = <1024>;
	513	bd_ram_size = <0x2000>;
f3d953ea TL	514	mac_control = <0x20>;
	515	slaves = <2>;
	516	active_slave = <0>;
	517	cpts_clock_mult = <0x80000000>;
	518	cpts_clock_shift = <29>;
	519	reg = <0x4a100000 0x800
	520	0x4a100900 0x100>;
	521	#address-cells = <1>;
	522	#size-cells = <1>;
	523	interrupt-parent = <&intc>;
	524	/*
	525	* c0_rx_thresh_pend
	526	* c0_rx_pend
	527	* c0_tx_pend
	528	* c0_misc_pend
	529	*/
	530	interrupts = <40 41 42 43>;
	531	ranges;
	532	syscon = <&scm_conf>;
	533
	534	davinci_mdio: mdio@4a100800 {
	535	compatible = "ti,davinci_mdio";
	536	#address-cells = <1>;
	537	#size-cells = <0>;
	538	ti,hwmods = "davinci_mdio";
	539	bus_freq = <1000000>;
	540	reg = <0x4a100800 0x100>;
	541	};
	542
	543	cpsw_emac0: slave@4a100200 {
	544	/* Filled in by U-Boot */
	545	mac-address = [ 00 00 00 00 00 00 ];
	546	};
	547
	548	cpsw_emac1: slave@4a100300 {
	549	/* Filled in by U-Boot */
	550	mac-address = [ 00 00 00 00 00 00 ];
	551	};
	552
87ee15ec	553	phy_sel: cpsw-phy-sel@48140650 {
f3d953ea	554	compatible = "ti,am3352-cpsw-phy-sel";
87ee15ec	555	reg= <0x48140650 0x4>;
f3d953ea TL	556	reg-names = "gmii-sel";
	557	};
	558	};
003fb0ae TL	559
	560	gpmc: gpmc@50000000 {
	561	compatible = "ti,am3352-gpmc";
	562	ti,hwmods = "gpmc";
	563	ti,no-idle-on-init;
	564	reg = <0x50000000 0x2000>;
	565	interrupts = <100>;
	566	gpmc,num-cs = <7>;
	567	gpmc,num-waitpins = <2>;
	568	#address-cells = <2>;
	569	#size-cells = <1>;
0c3e192a RQ	570	interrupt-controller;
0c3e192a RQ	571	#interrupt-cells = <2>;
0cac398b RQ	572	gpio-controller;
0cac398b RQ	573	#gpio-cells = <2>;
003fb0ae	574	};
f3d953ea TL	575	};
f3d953ea TL	576	};
25515b63 TL	577
25515b63 TL	578	#include "dm814x-clocks.dtsi"