[mirror_ubuntu-hirsute-kernel.git] / arch / arm / boot / dts / dm814x.dtsi

/*
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/dm814x.h>

/ {
	compatible = "ti,dm814";
	interrupt-parent = <&intc>;
	#address-cells = <1>;
	#size-cells = <1>;
	chosen { };

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				ti,ctrl_mod = <&usb_ctrl_mod>;
				#phy-cells = <0>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				reg = <0x47401400 0x400
				       0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
		};

		/*
		 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
		 * It shows the module target agent registers though, so the
		 * actual device is typically 0x1000 before the target agent
		 * except in cases where the module is larger than 0x1000.
		 */
		l4ls: l4ls@48000000 {
			compatible = "ti,dm814-l4ls", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48000000 0x2000000>;

			i2c1: i2c@28000 {
				compatible = "ti,omap4-i2c";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "i2c1";
				reg = <0x28000 0x1000>;
				interrupts = <70>;
			};

			elm: elm@80000 {
				compatible = "ti,814-elm";
				ti,hwmods = "elm";
				reg = <0x80000 0x2000>;
				interrupts = <4>;
			};

			gpio1: gpio@32000 {
				compatible = "ti,omap4-gpio";
				ti,hwmods = "gpio1";
				ti,gpio-always-on;
				reg = <0x32000 0x2000>;
				interrupts = <96>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			gpio2: gpio@4c000 {
				compatible = "ti,omap4-gpio";
				ti,hwmods = "gpio2";
				ti,gpio-always-on;
				reg = <0x4c000 0x2000>;
				interrupts = <98>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			i2c2: i2c@2a000 {
				compatible = "ti,omap4-i2c";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "i2c2";
				reg = <0x2a000 0x1000>;
				interrupts = <71>;
			};

			mcspi1: spi@30000 {
				compatible = "ti,omap4-mcspi";
				reg = <0x30000 0x1000>;
				#address-cells = <1>;
				#size-cells = <0>;
				interrupts = <65>;
				ti,spi-num-cs = <4>;
				ti,hwmods = "mcspi1";
				dmas = <&edma 16 0 &edma 17 0
					&edma 18 0 &edma 19 0>;
				dma-names = "tx0", "rx0", "tx1", "rx1";
			};

			timer1: timer@2e000 {
				compatible = "ti,dm814-timer";
				reg = <0x2e000 0x2000>;
				interrupts = <67>;
				ti,hwmods = "timer1";
				ti,timer-alwon;
			};

			uart1: uart@20000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart1";
				reg = <0x20000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <72>;
				dmas = <&edma 26 0 &edma 27 0>;
				dma-names = "tx", "rx";
			};

			uart2: uart@22000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart2";
				reg = <0x22000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <73>;
				dmas = <&edma 28 0 &edma 29 0>;
				dma-names = "tx", "rx";
			};

			uart3: uart@24000 {
				compatible = "ti,am3352-uart", "ti,omap3-uart";
				ti,hwmods = "uart3";
				reg = <0x24000 0x2000>;
				clock-frequency = <48000000>;
				interrupts = <74>;
				dmas = <&edma 30 0 &edma 31 0>;
				dma-names = "tx", "rx";
			};

			timer2: timer@40000 {
				compatible = "ti,dm814-timer";
				reg = <0x40000 0x2000>;
				interrupts = <68>;
				ti,hwmods = "timer2";
			};

			timer3: timer@42000 {
				compatible = "ti,dm814-timer";
				reg = <0x42000 0x2000>;
				interrupts = <69>;
				ti,hwmods = "timer3";
			};

			mmc1: mmc@60000 {
				compatible = "ti,omap4-hsmmc";
				ti,hwmods = "mmc1";
				dmas = <&edma 24 0
					&edma 25 0>;
				dma-names = "tx", "rx";
				interrupts = <64>;
				interrupt-parent = <&intc>;
				reg = <0x60000 0x1000>;
			};

			rtc: rtc@c0000 {
				compatible = "ti,am3352-rtc", "ti,da830-rtc";
				reg = <0xc0000 0x1000>;
				interrupts = <75 76>;
				ti,hwmods = "rtc";
			};

			mmc2: mmc@1d8000 {
				compatible = "ti,omap4-hsmmc";
				ti,hwmods = "mmc2";
				dmas = <&edma 2 0
					&edma 3 0>;
				dma-names = "tx", "rx";
				interrupts = <28>;
				interrupt-parent = <&intc>;
				reg = <0x1d8000 0x1000>;
			};

			control: control@140000 {
				compatible = "ti,dm814-scm", "simple-bus";
				reg = <0x140000 0x20000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x140000 0x20000>;

				scm_conf: scm_conf@0 {
					compatible = "syscon", "simple-bus";
					reg = <0x0 0x800>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0 0x800>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};

					scm_clockdomains: clockdomains {
					};
				};

				usb_ctrl_mod: control@620 {
					compatible = "ti,am335x-usb-ctrl-module";
					reg = <0x620 0x10
						0x648 0x4>;
					reg-names = "phy_ctrl", "wakeup";
				};

				edma_xbar: dma-router@f90 {
					compatible = "ti,am335x-edma-crossbar";
					reg = <0xf90 0x40>;
					#dma-cells = <3>;
					dma-requests = <32>;
					dma-masters = <&edma>;
				};

				/*
				 * Note that silicon revision 2.1 and older
				 * require input enabled (bit 18 set) for all
				 * 3.3V I/Os to avoid cumulative hardware damage.
				 * For more info, see errata advisory 2.1.87.
				 * We leave bit 18 out of function-mask and rely
				 * on the bootloader for it.
				 */
				pincntl: pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x438>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x307ff>;
				};

				usb1_phy: usb-phy@1b00 {
					compatible = "ti,am335x-usb-phy";
					reg = <0x1b00 0x100>;
					reg-names = "phy";
					ti,ctrl_mod = <&usb_ctrl_mod>;
					#phy-cells = <0>;
				};
			};

			prcm: prcm@180000 {
				compatible = "ti,dm814-prcm", "simple-bus";
				reg = <0x180000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x180000 0x2000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			/* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
			pllss: pllss@1c5000 {
				compatible = "ti,dm814-pllss", "simple-bus";
				reg = <0x1c5000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1c5000 0x1000>;

				pllss_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				pllss_clockdomains: clockdomains {
				};
			};

			wdt1: wdt@1c7000 {
				compatible = "ti,omap3-wdt";
				ti,hwmods = "wd_timer";
				reg = <0x1c7000 0x1000>;
				interrupts = <91>;
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,dm814-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		/* Board must configure evtmux with edma_xbar for EDMA */
		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			interrupts = <29>;
			interrupt-parent = <&intc>;
			reg = <0x47810000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg =	<0x49000000 0x10000>;
			reg-names = "edma3_cc";
			interrupts = <12 13 14>;
			interrupt-names = "edma3_ccint", "edma3_mperr",
					  "edma3_ccerrint";
			dma-requests = <64>;
			#dma-cells = <2>;

			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
				   <&edma_tptc2 3>, <&edma_tptc3 0>;

			ti,edma-memcpy-channels = <20 21>;
		};

		edma_tptc0: tptc@49800000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg =	<0x49800000 0x100000>;
			interrupts = <112>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc1: tptc@49900000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg =	<0x49900000 0x100000>;
			interrupts = <113>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc2: tptc@49a00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc2";
			reg =	<0x49a00000 0x100000>;
			interrupts = <114>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc3: tptc@49b00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc3";
			reg =	<0x49b00000 0x100000>;
			interrupts = <115>;
			interrupt-names = "edma3_tcerrint";
		};

		/* See TRM "Table 1-318. L4HS Instance Summary" */
		l4hs: l4hs@4a000000 {
			compatible = "ti,dm814-l4hs", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4a000000 0x1b4040>;
		};

		/* REVISIT: Move to live under l4hs once driver is fixed */
		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a100900 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;
			syscon = <&scm_conf>;

			davinci_mdio: mdio@4a100800 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a100800 0x100>;
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@48140650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x48140650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
		};
	};
};

#include "dm814x-clocks.dtsi"
Commit	Line	Data
f3d953ea TL	1	/*
	2	* This file is licensed under the terms of the GNU General Public License
	3	* version 2. This program is licensed "as is" without any warranty of any
	4	* kind, whether express or implied.
	5	*/
	6
	7	#include <dt-bindings/gpio/gpio.h>
b4d6df2a	8	#include <dt-bindings/pinctrl/dm814x.h>
f3d953ea	9
f3d953ea TL	10	/ {
	11	compatible = "ti,dm814";
	12	interrupt-parent = <&intc>;
76155b37 JMC	13	#address-cells = <1>;
76155b37 JMC	14	#size-cells = <1>;
9536fd30	15	chosen { };
f3d953ea TL	16
	17	aliases {
	18	i2c0 = &i2c1;
	19	i2c1 = &i2c2;
	20	serial0 = &uart1;
	21	serial1 = &uart2;
	22	serial2 = &uart3;
	23	ethernet0 = &cpsw_emac0;
	24	ethernet1 = &cpsw_emac1;
89639d9f TL	25	usb0 = &usb0;
	26	usb1 = &usb1;
	27	phy0 = &usb0_phy;
	28	phy1 = &usb1_phy;
f3d953ea TL	29	};
	30
	31	cpus {
	32	#address-cells = <1>;
	33	#size-cells = <0>;
	34	cpu@0 {
	35	compatible = "arm,cortex-a8";
	36	device_type = "cpu";
	37	reg = <0>;
	38	};
	39	};
	40
	41	pmu {
	42	compatible = "arm,cortex-a8-pmu";
	43	interrupts = <3>;
	44	};
	45
	46	/*
	47	* The soc node represents the soc top level view. It is used for IPs
	48	* that are not memory mapped in the MPU view or for the MPU itself.
	49	*/
	50	soc {
	51	compatible = "ti,omap-infra";
	52	mpu {
	53	compatible = "ti,omap3-mpu";
	54	ti,hwmods = "mpu";
	55	};
	56	};
	57
	58	ocp {
	59	compatible = "simple-bus";
	60	#address-cells = <1>;
	61	#size-cells = <1>;
	62	ranges;
	63	ti,hwmods = "l3_main";
	64
89639d9f TL	65	usb: usb@47400000 {
	66	compatible = "ti,am33xx-usb";
	67	reg = <0x47400000 0x1000>;
	68	ranges;
	69	#address-cells = <1>;
	70	#size-cells = <1>;
	71	ti,hwmods = "usb_otg_hs";
	72
	73	usb0_phy: usb-phy@47401300 {
	74	compatible = "ti,am335x-usb-phy";
	75	reg = <0x47401300 0x100>;
	76	reg-names = "phy";
	77	ti,ctrl_mod = <&usb_ctrl_mod>;
f0e11ff8	78	#phy-cells = <0>;
89639d9f TL	79	};
	80
	81	usb0: usb@47401000 {
	82	compatible = "ti,musb-am33xx";
	83	reg = <0x47401400 0x400
	84	0x47401000 0x200>;
	85	reg-names = "mc", "control";
	86
	87	interrupts = <18>;
	88	interrupt-names = "mc";
	89	dr_mode = "otg";
	90	mentor,multipoint = <1>;
	91	mentor,num-eps = <16>;
	92	mentor,ram-bits = <12>;
	93	mentor,power = <500>;
	94	phys = <&usb0_phy>;
	95
	96	dmas = <&cppi41dma 0 0 &cppi41dma 1 0
	97	&cppi41dma 2 0 &cppi41dma 3 0
	98	&cppi41dma 4 0 &cppi41dma 5 0
	99	&cppi41dma 6 0 &cppi41dma 7 0
	100	&cppi41dma 8 0 &cppi41dma 9 0
	101	&cppi41dma 10 0 &cppi41dma 11 0
	102	&cppi41dma 12 0 &cppi41dma 13 0
	103	&cppi41dma 14 0 &cppi41dma 0 1
	104	&cppi41dma 1 1 &cppi41dma 2 1
	105	&cppi41dma 3 1 &cppi41dma 4 1
	106	&cppi41dma 5 1 &cppi41dma 6 1
	107	&cppi41dma 7 1 &cppi41dma 8 1
	108	&cppi41dma 9 1 &cppi41dma 10 1
	109	&cppi41dma 11 1 &cppi41dma 12 1
	110	&cppi41dma 13 1 &cppi41dma 14 1>;
	111	dma-names =
	112	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	113	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	114	"rx14", "rx15",
	115	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	116	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	117	"tx14", "tx15";
	118	};
	119
	120	usb1: usb@47401800 {
	121	compatible = "ti,musb-am33xx";
	122	reg = <0x47401c00 0x400
	123	0x47401800 0x200>;
	124	reg-names = "mc", "control";
	125	interrupts = <19>;
	126	interrupt-names = "mc";
	127	dr_mode = "otg";
	128	mentor,multipoint = <1>;
	129	mentor,num-eps = <16>;
	130	mentor,ram-bits = <12>;
	131	mentor,power = <500>;
	132	phys = <&usb1_phy>;
	133
	134	dmas = <&cppi41dma 15 0 &cppi41dma 16 0
	135	&cppi41dma 17 0 &cppi41dma 18 0
	136	&cppi41dma 19 0 &cppi41dma 20 0
	137	&cppi41dma 21 0 &cppi41dma 22 0
	138	&cppi41dma 23 0 &cppi41dma 24 0
	139	&cppi41dma 25 0 &cppi41dma 26 0
	140	&cppi41dma 27 0 &cppi41dma 28 0
	141	&cppi41dma 29 0 &cppi41dma 15 1
	142	&cppi41dma 16 1 &cppi41dma 17 1
143	&cppi41dma 18 1 &cppi41dma 19 1
144	&cppi41dma 20 1 &cppi41dma 21 1
145	&cppi41dma 22 1 &cppi41dma 23 1
146	&cppi41dma 24 1 &cppi41dma 25 1
147	&cppi41dma 26 1 &cppi41dma 27 1
148	&cppi41dma 28 1 &cppi41dma 29 1>;
149	dma-names =
150	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
151	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
152	"rx14", "rx15",
153	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
154	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
155	"tx14", "tx15";
156	};
157
158	cppi41dma: dma-controller@47402000 {
159	compatible = "ti,am3359-cppi41";
160	reg = <0x47400000 0x1000
161	0x47402000 0x1000
162	0x47403000 0x1000
163	0x47404000 0x4000>;
164	reg-names = "glue", "controller", "scheduler", "queuemgr";
165	interrupts = <17>;
166	interrupt-names = "glue";
167	#dma-cells = <2>;
168	#dma-channels = <30>;
169	#dma-requests = <256>;
170	};
171	};
172
f3d953ea	173	/*
3a91b061 TL	174	* See TRM "Table 1-317. L4LS Instance Summary" for hints.
	175	* It shows the module target agent registers though, so the
	176	* actual device is typically 0x1000 before the target agent
	177	* except in cases where the module is larger than 0x1000.
f3d953ea TL	178	*/
	179	l4ls: l4ls@48000000 {
	180	compatible = "ti,dm814-l4ls", "simple-bus";
	181	#address-cells = <1>;
	182	#size-cells = <1>;
	183	ranges = <0 0x48000000 0x2000000>;
	184
	185	i2c1: i2c@28000 {
	186	compatible = "ti,omap4-i2c";
	187	#address-cells = <1>;
	188	#size-cells = <0>;
	189	ti,hwmods = "i2c1";
	190	reg = <0x28000 0x1000>;
	191	interrupts = <70>;
	192	};
	193
	194	elm: elm@80000 {
	195	compatible = "ti,814-elm";
	196	ti,hwmods = "elm";
	197	reg = <0x80000 0x2000>;
	198	interrupts = <4>;
	199	};
	200
	201	gpio1: gpio@32000 {
	202	compatible = "ti,omap4-gpio";
	203	ti,hwmods = "gpio1";
	204	ti,gpio-always-on;
	205	reg = <0x32000 0x2000>;
	206	interrupts = <96>;
	207	gpio-controller;
	208	#gpio-cells = <2>;
	209	interrupt-controller;
	210	#interrupt-cells = <2>;
	211	};
	212
	213	gpio2: gpio@4c000 {
	214	compatible = "ti,omap4-gpio";
	215	ti,hwmods = "gpio2";
	216	ti,gpio-always-on;
	217	reg = <0x4c000 0x2000>;
	218	interrupts = <98>;
	219	gpio-controller;
	220	#gpio-cells = <2>;
	221	interrupt-controller;
	222	#interrupt-cells = <2>;
	223	};
	224
	225	i2c2: i2c@2a000 {
	226	compatible = "ti,omap4-i2c";
	227	#address-cells = <1>;
	228	#size-cells = <0>;
	229	ti,hwmods = "i2c2";
	230	reg = <0x2a000 0x1000>;
	231	interrupts = <71>;
	232	};
	233
	234	mcspi1: spi@30000 {
	235	compatible = "ti,omap4-mcspi";
	236	reg = <0x30000 0x1000>;
	237	#address-cells = <1>;
	238	#size-cells = <0>;
	239	interrupts = <65>;
	240	ti,spi-num-cs = <4>;
	241	ti,hwmods = "mcspi1";
9a640422 TL	242	dmas = <&edma 16 0 &edma 17 0
9a640422 TL	243	&edma 18 0 &edma 19 0>;
f3d953ea TL	244	dma-names = "tx0", "rx0", "tx1", "rx1";
	245	};
	246
	247	timer1: timer@2e000 {
	248	compatible = "ti,dm814-timer";
	249	reg = <0x2e000 0x2000>;
	250	interrupts = <67>;
	251	ti,hwmods = "timer1";
	252	ti,timer-alwon;
	253	};
	254
	255	uart1: uart@20000 {
f62280ef	256	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	257	ti,hwmods = "uart1";
	258	reg = <0x20000 0x2000>;
	259	clock-frequency = <48000000>;
	260	interrupts = <72>;
9a640422	261	dmas = <&edma 26 0 &edma 27 0>;
f3d953ea TL	262	dma-names = "tx", "rx";
	263	};
	264
	265	uart2: uart@22000 {
f62280ef	266	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	267	ti,hwmods = "uart2";
	268	reg = <0x22000 0x2000>;
	269	clock-frequency = <48000000>;
	270	interrupts = <73>;
9a640422	271	dmas = <&edma 28 0 &edma 29 0>;
f3d953ea TL	272	dma-names = "tx", "rx";
	273	};
	274
	275	uart3: uart@24000 {
f62280ef	276	compatible = "ti,am3352-uart", "ti,omap3-uart";
f3d953ea TL	277	ti,hwmods = "uart3";
	278	reg = <0x24000 0x2000>;
	279	clock-frequency = <48000000>;
	280	interrupts = <74>;
9a640422	281	dmas = <&edma 30 0 &edma 31 0>;
f3d953ea TL	282	dma-names = "tx", "rx";
	283	};
	284
	285	timer2: timer@40000 {
	286	compatible = "ti,dm814-timer";
	287	reg = <0x40000 0x2000>;
	288	interrupts = <68>;
	289	ti,hwmods = "timer2";
	290	};
	291
	292	timer3: timer@42000 {
	293	compatible = "ti,dm814-timer";
	294	reg = <0x42000 0x2000>;
	295	interrupts = <69>;
	296	ti,hwmods = "timer3";
	297	};
	298
609e5574 TL	299	mmc1: mmc@60000 {
	300	compatible = "ti,omap4-hsmmc";
	301	ti,hwmods = "mmc1";
	302	dmas = <&edma 24 0
	303	&edma 25 0>;
	304	dma-names = "tx", "rx";
	305	interrupts = <64>;
	306	interrupt-parent = <&intc>;
	307	reg = <0x60000 0x1000>;
	308	};
	309
f22b0b4f TL	310	rtc: rtc@c0000 {
	311	compatible = "ti,am3352-rtc", "ti,da830-rtc";
	312	reg = <0xc0000 0x1000>;
	313	interrupts = <75 76>;
	314	ti,hwmods = "rtc";
	315	};
	316
609e5574 TL	317	mmc2: mmc@1d8000 {
	318	compatible = "ti,omap4-hsmmc";
	319	ti,hwmods = "mmc2";
	320	dmas = <&edma 2 0
	321	&edma 3 0>;
	322	dma-names = "tx", "rx";
	323	interrupts = <28>;
	324	interrupt-parent = <&intc>;
	325	reg = <0x1d8000 0x1000>;
	326	};
	327
87ee15ec	328	control: control@140000 {
f3d953ea	329	compatible = "ti,dm814-scm", "simple-bus";
3a91b061	330	reg = <0x140000 0x20000>;
f3d953ea TL	331	#address-cells = <1>;
f3d953ea TL	332	#size-cells = <1>;
3a91b061	333	ranges = <0 0x140000 0x20000>;
f3d953ea TL	334
f3d953ea TL	335	scm_conf: scm_conf@0 {
1aa09df0	336	compatible = "syscon", "simple-bus";
f3d953ea TL	337	reg = <0x0 0x800>;
	338	#address-cells = <1>;
	339	#size-cells = <1>;
1aa09df0	340	ranges = <0 0 0x800>;
f3d953ea TL	341
	342	scm_clocks: clocks {
	343	#address-cells = <1>;
	344	#size-cells = <0>;
	345	};
	346
	347	scm_clockdomains: clockdomains {
	348	};
	349	};
	350
89639d9f TL	351	usb_ctrl_mod: control@620 {
	352	compatible = "ti,am335x-usb-ctrl-module";
	353	reg = <0x620 0x10
	354	0x648 0x4>;
	355	reg-names = "phy_ctrl", "wakeup";
	356	};
	357
9a640422 TL	358	edma_xbar: dma-router@f90 {
	359	compatible = "ti,am335x-edma-crossbar";
	360	reg = <0xf90 0x40>;
	361	#dma-cells = <3>;
	362	dma-requests = <32>;
	363	dma-masters = <&edma>;
	364	};
	365
9621557f TL	366	/*
	367	* Note that silicon revision 2.1 and older
	368	* require input enabled (bit 18 set) for all
	369	* 3.3V I/Os to avoid cumulative hardware damage.
	370	* For more info, see errata advisory 2.1.87.
	371	* We leave bit 18 out of function-mask and rely
	372	* on the bootloader for it.
	373	*/
f3d953ea TL	374	pincntl: pinmux@800 {
f3d953ea TL	375	compatible = "pinctrl-single";
9621557f	376	reg = <0x800 0x438>;
f3d953ea TL	377	#address-cells = <1>;
f3d953ea TL	378	#size-cells = <0>;
be76fd31	379	#pinctrl-cells = <1>;
f3d953ea	380	pinctrl-single,register-width = <32>;
9621557f	381	pinctrl-single,function-mask = <0x307ff>;
f3d953ea	382	};
89639d9f TL	383
	384	usb1_phy: usb-phy@1b00 {
	385	compatible = "ti,am335x-usb-phy";
	386	reg = <0x1b00 0x100>;
	387	reg-names = "phy";
	388	ti,ctrl_mod = <&usb_ctrl_mod>;
c22fe696	389	#phy-cells = <0>;
89639d9f	390	};
f3d953ea TL	391	};
	392
	393	prcm: prcm@180000 {
	394	compatible = "ti,dm814-prcm", "simple-bus";
7f8f0b11 TL	395	reg = <0x180000 0x2000>;
	396	#address-cells = <1>;
	397	#size-cells = <1>;
	398	ranges = <0 0x180000 0x2000>;
f3d953ea TL	399
	400	prcm_clocks: clocks {
	401	#address-cells = <1>;
	402	#size-cells = <0>;
	403	};
	404
	405	prcm_clockdomains: clockdomains {
	406	};
	407	};
	408
7f8f0b11	409	/* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
f3d953ea TL	410	pllss: pllss@1c5000 {
f3d953ea TL	411	compatible = "ti,dm814-pllss", "simple-bus";
7f8f0b11 TL	412	reg = <0x1c5000 0x1000>;
	413	#address-cells = <1>;
	414	#size-cells = <1>;
	415	ranges = <0 0x1c5000 0x1000>;
f3d953ea TL	416
	417	pllss_clocks: clocks {
	418	#address-cells = <1>;
	419	#size-cells = <0>;
	420	};
	421
	422	pllss_clockdomains: clockdomains {
	423	};
	424	};
	425
	426	wdt1: wdt@1c7000 {
	427	compatible = "ti,omap3-wdt";
	428	ti,hwmods = "wd_timer";
	429	reg = <0x1c7000 0x1000>;
	430	interrupts = <91>;
	431	};
	432	};
	433
	434	intc: interrupt-controller@48200000 {
	435	compatible = "ti,dm814-intc";
	436	interrupt-controller;
	437	#interrupt-cells = <1>;
	438	reg = <0x48200000 0x1000>;
	439	};
	440
609e5574 TL	441	/* Board must configure evtmux with edma_xbar for EDMA */
	442	mmc3: mmc@47810000 {
	443	compatible = "ti,omap4-hsmmc";
	444	ti,hwmods = "mmc3";
	445	interrupts = <29>;
	446	interrupt-parent = <&intc>;
	447	reg = <0x47810000 0x1000>;
	448	};
	449
f3d953ea	450	edma: edma@49000000 {
9a640422 TL	451	compatible = "ti,edma3-tpcc";
	452	ti,hwmods = "tpcc";
	453	reg = <0x49000000 0x10000>;
	454	reg-names = "edma3_cc";
f3d953ea	455	interrupts = <12 13 14>;
a5206553	456	interrupt-names = "edma3_ccint", "edma3_mperr",
9a640422 TL	457	"edma3_ccerrint";
	458	dma-requests = <64>;
	459	#dma-cells = <2>;
	460
	461	ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
	462	<&edma_tptc2 3>, <&edma_tptc3 0>;
	463
	464	ti,edma-memcpy-channels = <20 21>;
	465	};
	466
	467	edma_tptc0: tptc@49800000 {
	468	compatible = "ti,edma3-tptc";
	469	ti,hwmods = "tptc0";
	470	reg = <0x49800000 0x100000>;
	471	interrupts = <112>;
	472	interrupt-names = "edma3_tcerrint";
	473	};
	474
	475	edma_tptc1: tptc@49900000 {
	476	compatible = "ti,edma3-tptc";
	477	ti,hwmods = "tptc1";
	478	reg = <0x49900000 0x100000>;
	479	interrupts = <113>;
	480	interrupt-names = "edma3_tcerrint";
	481	};
	482
	483	edma_tptc2: tptc@49a00000 {
	484	compatible = "ti,edma3-tptc";
	485	ti,hwmods = "tptc2";
	486	reg = <0x49a00000 0x100000>;
	487	interrupts = <114>;
	488	interrupt-names = "edma3_tcerrint";
	489	};
	490
	491	edma_tptc3: tptc@49b00000 {
	492	compatible = "ti,edma3-tptc";
	493	ti,hwmods = "tptc3";
	494	reg = <0x49b00000 0x100000>;
	495	interrupts = <115>;
	496	interrupt-names = "edma3_tcerrint";
f3d953ea TL	497	};
	498
	499	/* See TRM "Table 1-318. L4HS Instance Summary" */
	500	l4hs: l4hs@4a000000 {
	501	compatible = "ti,dm814-l4hs", "simple-bus";
	502	#address-cells = <1>;
	503	#size-cells = <1>;
	504	ranges = <0 0x4a000000 0x1b4040>;
	505	};
	506
	507	/* REVISIT: Move to live under l4hs once driver is fixed */
	508	mac: ethernet@4a100000 {
	509	compatible = "ti,cpsw";
	510	ti,hwmods = "cpgmac0";
	511	clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
	512	clock-names = "fck", "cpts";
	513	cpdma_channels = <8>;
	514	ale_entries = <1024>;
	515	bd_ram_size = <0x2000>;
f3d953ea TL	516	mac_control = <0x20>;
	517	slaves = <2>;
	518	active_slave = <0>;
	519	cpts_clock_mult = <0x80000000>;
	520	cpts_clock_shift = <29>;
	521	reg = <0x4a100000 0x800
	522	0x4a100900 0x100>;
	523	#address-cells = <1>;
	524	#size-cells = <1>;
	525	interrupt-parent = <&intc>;
	526	/*
	527	* c0_rx_thresh_pend
	528	* c0_rx_pend
	529	* c0_tx_pend
	530	* c0_misc_pend
	531	*/
	532	interrupts = <40 41 42 43>;
	533	ranges;
	534	syscon = <&scm_conf>;
	535
	536	davinci_mdio: mdio@4a100800 {
	537	compatible = "ti,davinci_mdio";
	538	#address-cells = <1>;
	539	#size-cells = <0>;
	540	ti,hwmods = "davinci_mdio";
	541	bus_freq = <1000000>;
	542	reg = <0x4a100800 0x100>;
	543	};
	544
	545	cpsw_emac0: slave@4a100200 {
	546	/* Filled in by U-Boot */
	547	mac-address = [ 00 00 00 00 00 00 ];
	548	};
	549
	550	cpsw_emac1: slave@4a100300 {
	551	/* Filled in by U-Boot */
	552	mac-address = [ 00 00 00 00 00 00 ];
	553	};
	554
87ee15ec	555	phy_sel: cpsw-phy-sel@48140650 {
f3d953ea	556	compatible = "ti,am3352-cpsw-phy-sel";
87ee15ec	557	reg= <0x48140650 0x4>;
f3d953ea TL	558	reg-names = "gmii-sel";
	559	};
	560	};
003fb0ae TL	561
	562	gpmc: gpmc@50000000 {
	563	compatible = "ti,am3352-gpmc";
	564	ti,hwmods = "gpmc";
	565	ti,no-idle-on-init;
	566	reg = <0x50000000 0x2000>;
	567	interrupts = <100>;
	568	gpmc,num-cs = <7>;
	569	gpmc,num-waitpins = <2>;
	570	#address-cells = <2>;
	571	#size-cells = <1>;
0c3e192a RQ	572	interrupt-controller;
0c3e192a RQ	573	#interrupt-cells = <2>;
0cac398b RQ	574	gpio-controller;
0cac398b RQ	575	#gpio-cells = <2>;
003fb0ae	576	};
f3d953ea TL	577	};
f3d953ea TL	578	};
25515b63 TL	579
25515b63 TL	580	#include "dm814x-clocks.dtsi"