projects / mirror_ubuntu-zesty-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| ef43eff3 UKK |
1 | /* |
| 2 | * Device tree for Energy Micro EFM32 Giant Gecko SoC. | |
| 3 | * | |
| 4 | * Documentation available from | |
| 5 | * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf | |
| 6 | */ | |
| 05b23ebc | 7 | |
| ef43eff3 UKK |
8 | #include "armv7-m.dtsi" |
| 9 | #include "dt-bindings/clock/efm32-cmu.h" | |
| 10 | ||
| 11 | / { | |
| 83640746 JE |
12 | #address-cells = <1>; |
| 13 | #size-cells = <1>; | |
| 14 | ||
| ef43eff3 UKK |
15 | aliases { |
| 16 | i2c0 = &i2c0; | |
| 17 | i2c1 = &i2c1; | |
| 18 | serial0 = &uart0; | |
| 19 | serial1 = &uart1; | |
| 20 | serial2 = &uart2; | |
| 21 | serial3 = &uart3; | |
| 22 | serial4 = &uart4; | |
| 23 | spi0 = &spi0; | |
| 24 | spi1 = &spi1; | |
| 25 | spi2 = &spi2; | |
| 26 | }; | |
| 27 | ||
| 28 | soc { | |
| 29 | adc: adc@40002000 { | |
| f719a0d6 | 30 | compatible = "energymicro,efm32-adc"; |
| ef43eff3 UKK |
31 | reg = <0x40002000 0x400>; |
| 32 | interrupts = <7>; | |
| 33 | clocks = <&cmu clk_HFPERCLKADC0>; | |
| 34 | status = "disabled"; | |
| 35 | }; | |
| 36 | ||
| 37 | gpio: gpio@40006000 { | |
| f719a0d6 | 38 | compatible = "energymicro,efm32-gpio"; |
| ef43eff3 UKK |
39 | reg = <0x40006000 0x1000>; |
| 40 | interrupts = <1 11>; | |
| 41 | gpio-controller; | |
| 42 | #gpio-cells = <2>; | |
| 43 | interrupt-controller; | |
| 44 | #interrupt-cells = <1>; | |
| 45 | clocks = <&cmu clk_HFPERCLKGPIO>; | |
| 46 | status = "ok"; | |
| 47 | }; | |
| 48 | ||
| 49 | i2c0: i2c@4000a000 { | |
| 50 | #address-cells = <1>; | |
| 51 | #size-cells = <0>; | |
| f719a0d6 | 52 | compatible = "energymicro,efm32-i2c"; |
| ef43eff3 UKK |
53 | reg = <0x4000a000 0x400>; |
| 54 | interrupts = <9>; | |
| 55 | clocks = <&cmu clk_HFPERCLKI2C0>; | |
| 56 | clock-frequency = <100000>; | |
| 57 | status = "disabled"; | |
| 58 | }; | |
| 59 | ||
| 60 | i2c1: i2c@4000a400 { | |
| 61 | #address-cells = <1>; | |
| 62 | #size-cells = <0>; | |
| f719a0d6 | 63 | compatible = "energymicro,efm32-i2c"; |
| ef43eff3 UKK |
64 | reg = <0x4000a400 0x400>; |
| 65 | interrupts = <10>; | |
| 66 | clocks = <&cmu clk_HFPERCLKI2C1>; | |
| 67 | clock-frequency = <100000>; | |
| 68 | status = "disabled"; | |
| 69 | }; | |
| 70 | ||
| 71 | spi0: spi@4000c000 { /* USART0 */ | |
| 72 | #address-cells = <1>; | |
| 73 | #size-cells = <0>; | |
| f719a0d6 | 74 | compatible = "energymicro,efm32-spi"; |
| ef43eff3 UKK |
75 | reg = <0x4000c000 0x400>; |
| 76 | interrupts = <3 4>; | |
| 77 | clocks = <&cmu clk_HFPERCLKUSART0>; | |
| 78 | status = "disabled"; | |
| 79 | }; | |
| 80 | ||
| 81 | spi1: spi@4000c400 { /* USART1 */ | |
| 82 | #address-cells = <1>; | |
| 83 | #size-cells = <0>; | |
| f719a0d6 | 84 | compatible = "energymicro,efm32-spi"; |
| ef43eff3 UKK |
85 | reg = <0x4000c400 0x400>; |
| 86 | interrupts = <15 16>; | |
| 87 | clocks = <&cmu clk_HFPERCLKUSART1>; | |
| 88 | status = "disabled"; | |
| 89 | }; | |
| 90 | ||
| 64afb249 | 91 | spi2: spi@4000c800 { /* USART2 */ |
| ef43eff3 UKK |
92 | #address-cells = <1>; |
| 93 | #size-cells = <0>; | |
| f719a0d6 | 94 | compatible = "energymicro,efm32-spi"; |
| ef43eff3 UKK |
95 | reg = <0x4000c800 0x400>; |
| 96 | interrupts = <18 19>; | |
| 97 | clocks = <&cmu clk_HFPERCLKUSART2>; | |
| 98 | status = "disabled"; | |
| 99 | }; | |
| 100 | ||
| 101 | uart0: uart@4000c000 { /* USART0 */ | |
| f719a0d6 | 102 | compatible = "energymicro,efm32-uart"; |
| ef43eff3 UKK |
103 | reg = <0x4000c000 0x400>; |
| 104 | interrupts = <3 4>; | |
| 105 | clocks = <&cmu clk_HFPERCLKUSART0>; | |
| 106 | status = "disabled"; | |
| 107 | }; | |
| 108 | ||
| 109 | uart1: uart@4000c400 { /* USART1 */ | |
| f719a0d6 | 110 | compatible = "energymicro,efm32-uart"; |
| ef43eff3 UKK |
111 | reg = <0x4000c400 0x400>; |
| 112 | interrupts = <15 16>; | |
| 113 | clocks = <&cmu clk_HFPERCLKUSART1>; | |
| 114 | status = "disabled"; | |
| 115 | }; | |
| 116 | ||
| 64afb249 | 117 | uart2: uart@4000c800 { /* USART2 */ |
| f719a0d6 | 118 | compatible = "energymicro,efm32-uart"; |
| ef43eff3 UKK |
119 | reg = <0x4000c800 0x400>; |
| 120 | interrupts = <18 19>; | |
| 121 | clocks = <&cmu clk_HFPERCLKUSART2>; | |
| 122 | status = "disabled"; | |
| 123 | }; | |
| 124 | ||
| 125 | uart3: uart@4000e000 { /* UART0 */ | |
| f719a0d6 | 126 | compatible = "energymicro,efm32-uart"; |
| ef43eff3 UKK |
127 | reg = <0x4000e000 0x400>; |
| 128 | interrupts = <20 21>; | |
| 129 | clocks = <&cmu clk_HFPERCLKUART0>; | |
| 130 | status = "disabled"; | |
| 131 | }; | |
| 132 | ||
| 133 | uart4: uart@4000e400 { /* UART1 */ | |
| f719a0d6 | 134 | compatible = "energymicro,efm32-uart"; |
| ef43eff3 UKK |
135 | reg = <0x4000e400 0x400>; |
| 136 | interrupts = <22 23>; | |
| 137 | clocks = <&cmu clk_HFPERCLKUART1>; | |
| 138 | status = "disabled"; | |
| 139 | }; | |
| 140 | ||
| 141 | timer0: timer@40010000 { | |
| f719a0d6 | 142 | compatible = "energymicro,efm32-timer"; |
| ef43eff3 UKK |
143 | reg = <0x40010000 0x400>; |
| 144 | interrupts = <2>; | |
| 145 | clocks = <&cmu clk_HFPERCLKTIMER0>; | |
| 146 | }; | |
| 147 | ||
| 148 | timer1: timer@40010400 { | |
| f719a0d6 | 149 | compatible = "energymicro,efm32-timer"; |
| ef43eff3 UKK |
150 | reg = <0x40010400 0x400>; |
| 151 | interrupts = <12>; | |
| 152 | clocks = <&cmu clk_HFPERCLKTIMER1>; | |
| 153 | }; | |
| 154 | ||
| 155 | timer2: timer@40010800 { | |
| f719a0d6 | 156 | compatible = "energymicro,efm32-timer"; |
| ef43eff3 UKK |
157 | reg = <0x40010800 0x400>; |
| 158 | interrupts = <13>; | |
| 159 | clocks = <&cmu clk_HFPERCLKTIMER2>; | |
| 160 | }; | |
| 161 | ||
| 162 | timer3: timer@40010c00 { | |
| f719a0d6 | 163 | compatible = "energymicro,efm32-timer"; |
| ef43eff3 UKK |
164 | reg = <0x40010c00 0x400>; |
| 165 | interrupts = <14>; | |
| 166 | clocks = <&cmu clk_HFPERCLKTIMER3>; | |
| 167 | }; | |
| 168 | ||
| 169 | cmu: cmu@400c8000 { | |
| 170 | compatible = "efm32gg,cmu"; | |
| 171 | reg = <0x400c8000 0x400>; | |
| 172 | interrupts = <32>; | |
| 173 | #clock-cells = <1>; | |
| 174 | }; | |
| 175 | }; | |
| 176 | }; |