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1 | /* |
2 | * Samsung's Exynos4212 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 | |
8 | * based board files can include this file and provide values for board specfic | |
9 | * bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional | |
13 | * nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
3799279f | 20 | #include "exynos4x12.dtsi" |
0f7238a1 TF |
21 | |
22 | / { | |
23 | compatible = "samsung,exynos4212"; | |
24 | ||
0572b725 | 25 | gic: interrupt-controller@10490000 { |
0f7238a1 TF |
26 | cpu-offset = <0x8000>; |
27 | }; | |
bbd9700a | 28 | |
30269ddf AB |
29 | interrupt-controller@10440000 { |
30 | samsung,combiner-nr = <18>; | |
31 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | |
32 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | |
33 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | |
34 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, | |
35 | <0 107 0>, <0 108 0>; | |
36 | }; | |
0f7238a1 | 37 | }; |