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15dfdfad TF |
1 | /* |
2 | * Samsung's Exynos4412 based Trats 2 board device tree source | |
3 | * | |
4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Device tree source file for Samsung's Trats 2 board which is based on | |
8 | * Samsung's Exynos4412 SoC. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
16 | #include "exynos4412.dtsi" | |
4a80467a | 17 | #include "exynos4412-ppmu-common.dtsi" |
7eec1266 | 18 | #include <dt-bindings/gpio/gpio.h> |
e8614292 | 19 | #include <dt-bindings/interrupt-controller/irq.h> |
ce9940a9 | 20 | #include <dt-bindings/clock/maxim,max77686.h> |
15dfdfad TF |
21 | |
22 | / { | |
23 | model = "Samsung Trats 2 based on Exynos4412"; | |
8bdb31b4 | 24 | compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; |
15dfdfad | 25 | |
9f1eaef2 | 26 | aliases { |
6af2ba90 | 27 | i2c9 = &i2c_ak8975; |
85cb4e0b | 28 | i2c10 = &i2c_cm36651; |
7eec1266 | 29 | i2c11 = &i2c_max77693; |
e8614292 | 30 | i2c12 = &i2c_max77693_fuel; |
9f1eaef2 JA |
31 | }; |
32 | ||
15dfdfad TF |
33 | memory { |
34 | reg = <0x40000000 0x40000000>; | |
35 | }; | |
36 | ||
37 | chosen { | |
38 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; | |
62d38099 | 39 | stdout-path = &serial_2; |
15dfdfad TF |
40 | }; |
41 | ||
42 | firmware@0204F000 { | |
43 | compatible = "samsung,secure-firmware"; | |
44 | reg = <0x0204F000 0x1000>; | |
45 | }; | |
46 | ||
47 | fixed-rate-clocks { | |
48 | xxti { | |
49 | compatible = "samsung,clock-xxti", "fixed-clock"; | |
50 | clock-frequency = <0>; | |
51 | }; | |
52 | ||
53 | xusbxti { | |
54 | compatible = "samsung,clock-xusbxti", "fixed-clock"; | |
55 | clock-frequency = <24000000>; | |
56 | }; | |
57 | }; | |
58 | ||
59 | regulators { | |
60 | compatible = "simple-bus"; | |
61 | #address-cells = <1>; | |
62 | #size-cells = <0>; | |
63 | ||
b4fec647 SN |
64 | cam_io_reg: voltage-regulator-1 { |
65 | compatible = "regulator-fixed"; | |
66 | regulator-name = "CAM_SENSOR_A"; | |
67 | regulator-min-microvolt = <2800000>; | |
68 | regulator-max-microvolt = <2800000>; | |
c10d3290 | 69 | gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>; |
b4fec647 SN |
70 | enable-active-high; |
71 | }; | |
72 | ||
420ae845 AH |
73 | lcd_vdd3_reg: voltage-regulator-2 { |
74 | compatible = "regulator-fixed"; | |
75 | regulator-name = "LCD_VDD_2.2V"; | |
76 | regulator-min-microvolt = <2200000>; | |
77 | regulator-max-microvolt = <2200000>; | |
c10d3290 | 78 | gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>; |
420ae845 AH |
79 | enable-active-high; |
80 | }; | |
81 | ||
4cb37864 SN |
82 | cam_af_reg: voltage-regulator-3 { |
83 | compatible = "regulator-fixed"; | |
84 | regulator-name = "CAM_AF"; | |
85 | regulator-min-microvolt = <2800000>; | |
86 | regulator-max-microvolt = <2800000>; | |
c10d3290 | 87 | gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>; |
4cb37864 SN |
88 | enable-active-high; |
89 | }; | |
90 | ||
85cb4e0b BS |
91 | ps_als_reg: voltage-regulator-5 { |
92 | compatible = "regulator-fixed"; | |
93 | regulator-name = "LED_A_3.0V"; | |
94 | regulator-min-microvolt = <3000000>; | |
95 | regulator-max-microvolt = <3000000>; | |
c10d3290 | 96 | gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>; |
85cb4e0b BS |
97 | enable-active-high; |
98 | }; | |
15dfdfad TF |
99 | }; |
100 | ||
101 | gpio-keys { | |
102 | compatible = "gpio-keys"; | |
103 | ||
104 | key-down { | |
c10d3290 | 105 | gpios = <&gpx3 3 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
106 | linux,code = <114>; |
107 | label = "volume down"; | |
108 | debounce-interval = <10>; | |
109 | }; | |
110 | ||
111 | key-up { | |
c10d3290 | 112 | gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
113 | linux,code = <115>; |
114 | label = "volume up"; | |
115 | debounce-interval = <10>; | |
116 | }; | |
117 | ||
118 | key-power { | |
c10d3290 | 119 | gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
120 | linux,code = <116>; |
121 | label = "power"; | |
122 | debounce-interval = <10>; | |
36a0282a | 123 | wakeup-source; |
15dfdfad | 124 | }; |
172ff6c6 BS |
125 | |
126 | key-ok { | |
c10d3290 | 127 | gpios = <&gpx0 1 GPIO_ACTIVE_LOW>; |
172ff6c6 BS |
128 | linux,code = <139>; |
129 | label = "ok"; | |
130 | debounce-inteval = <10>; | |
36a0282a | 131 | wakeup-source; |
172ff6c6 | 132 | }; |
15dfdfad TF |
133 | }; |
134 | ||
7eec1266 KK |
135 | i2c_max77693: i2c-gpio-1 { |
136 | compatible = "i2c-gpio"; | |
137 | gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>; | |
138 | i2c-gpio,delay-us = <2>; | |
139 | #address-cells = <1>; | |
140 | #size-cells = <0>; | |
141 | status = "okay"; | |
142 | ||
143 | max77693@66 { | |
144 | compatible = "maxim,max77693"; | |
145 | interrupt-parent = <&gpx1>; | |
146 | interrupts = <5 2>; | |
147 | reg = <0x66>; | |
148 | ||
149 | regulators { | |
26ee29a6 | 150 | esafeout1_reg: ESAFEOUT1 { |
7eec1266 KK |
151 | regulator-name = "ESAFEOUT1"; |
152 | }; | |
26ee29a6 | 153 | esafeout2_reg: ESAFEOUT2 { |
7eec1266 KK |
154 | regulator-name = "ESAFEOUT2"; |
155 | }; | |
26ee29a6 | 156 | charger_reg: CHARGER { |
7eec1266 KK |
157 | regulator-name = "CHARGER"; |
158 | regulator-min-microamp = <60000>; | |
159 | regulator-max-microamp = <2580000>; | |
160 | }; | |
161 | }; | |
d9c68089 JK |
162 | |
163 | max77693_haptic { | |
164 | compatible = "maxim,max77693-haptic"; | |
165 | haptic-supply = <&ldo26_reg>; | |
166 | pwms = <&pwm 0 38022 0>; | |
167 | }; | |
043ef148 KK |
168 | |
169 | charger { | |
170 | compatible = "maxim,max77693-charger"; | |
171 | ||
172 | maxim,constant-microvolt = <4350000>; | |
173 | maxim,min-system-microvolt = <3600000>; | |
174 | maxim,thermal-regulation-celsius = <100>; | |
175 | maxim,battery-overcurrent-microamp = <3500000>; | |
176 | maxim,charge-input-threshold-microvolt = <4300000>; | |
177 | }; | |
7eec1266 KK |
178 | }; |
179 | }; | |
180 | ||
e8614292 KK |
181 | i2c_max77693_fuel: i2c-gpio-3 { |
182 | compatible = "i2c-gpio"; | |
183 | gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>; | |
184 | i2c-gpio,delay-us = <2>; | |
185 | #address-cells = <1>; | |
186 | #size-cells = <0>; | |
187 | status = "okay"; | |
188 | ||
189 | max77693-fuel-gauge@36 { | |
190 | compatible = "maxim,max17047"; | |
191 | interrupt-parent = <&gpx2>; | |
192 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; | |
193 | reg = <0x36>; | |
82449f23 KK |
194 | |
195 | maxim,over-heat-temp = <700>; | |
196 | maxim,over-volt = <4500>; | |
7eec1266 KK |
197 | }; |
198 | }; | |
199 | ||
9f1eaef2 JA |
200 | i2c_ak8975: i2c-gpio-0 { |
201 | compatible = "i2c-gpio"; | |
c10d3290 | 202 | gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>; |
9f1eaef2 JA |
203 | i2c-gpio,delay-us = <2>; |
204 | #address-cells = <1>; | |
205 | #size-cells = <0>; | |
206 | status = "okay"; | |
207 | ||
208 | ak8975@0c { | |
30cc798b | 209 | compatible = "asahi-kasei,ak8975"; |
9f1eaef2 | 210 | reg = <0x0c>; |
c10d3290 | 211 | gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>; |
9f1eaef2 JA |
212 | }; |
213 | }; | |
b4fec647 | 214 | |
85cb4e0b BS |
215 | i2c_cm36651: i2c-gpio-2 { |
216 | compatible = "i2c-gpio"; | |
c10d3290 | 217 | gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>; |
85cb4e0b BS |
218 | i2c-gpio,delay-us = <2>; |
219 | #address-cells = <1>; | |
220 | #size-cells = <0>; | |
221 | ||
222 | cm36651@18 { | |
223 | compatible = "capella,cm36651"; | |
224 | reg = <0x18>; | |
225 | interrupt-parent = <&gpx0>; | |
226 | interrupts = <2 2>; | |
227 | vled-supply = <&ps_als_reg>; | |
228 | }; | |
229 | }; | |
230 | ||
4cb37864 SN |
231 | camera: camera { |
232 | pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; | |
b4fec647 SN |
233 | pinctrl-names = "default"; |
234 | status = "okay"; | |
0357a443 SN |
235 | assigned-clocks = <&clock CLK_MOUT_CAM0>, |
236 | <&clock CLK_MOUT_CAM1>; | |
cfe3b893 SN |
237 | assigned-clock-parents = <&clock CLK_XUSBXTI>, |
238 | <&clock CLK_XUSBXTI>; | |
b4fec647 | 239 | |
b4fec647 | 240 | |
440e5aef IS |
241 | }; |
242 | ||
243 | sound { | |
244 | compatible = "samsung,trats2-audio"; | |
245 | samsung,i2s-controller = <&i2s0>; | |
246 | samsung,model = "Trats2"; | |
247 | samsung,audio-codec = <&wm1811>; | |
248 | samsung,audio-routing = | |
249 | "SPK", "SPKOUTLN", | |
250 | "SPK", "SPKOUTLP", | |
251 | "SPK", "SPKOUTRN", | |
252 | "SPK", "SPKOUTRP"; | |
253 | }; | |
254 | ||
26ee29a6 | 255 | thermistor-ap { |
4f423788 CC |
256 | compatible = "ntc,ncp15wb473"; |
257 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ | |
258 | pullup-ohm = <100000>; /* 100K */ | |
259 | pulldown-ohm = <100000>; /* 100K */ | |
260 | io-channels = <&adc 1>; /* AP temperature */ | |
261 | }; | |
262 | ||
26ee29a6 | 263 | thermistor-battery { |
4f423788 CC |
264 | compatible = "ntc,ncp15wb473"; |
265 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ | |
266 | pullup-ohm = <100000>; /* 100K */ | |
267 | pulldown-ohm = <100000>; /* 100K */ | |
268 | io-channels = <&adc 2>; /* Battery temperature */ | |
269 | }; | |
bf4a0bed LM |
270 | |
271 | thermal-zones { | |
272 | cpu_thermal: cpu-thermal { | |
273 | cooling-maps { | |
274 | map0 { | |
275 | /* Corresponds to 800MHz at freq_table */ | |
276 | cooling-device = <&cpu0 7 7>; | |
277 | }; | |
278 | map1 { | |
279 | /* Corresponds to 200MHz at freq_table */ | |
280 | cooling-device = <&cpu0 13 13>; | |
281 | }; | |
282 | }; | |
283 | }; | |
284 | }; | |
15dfdfad | 285 | }; |
09918a98 | 286 | |
1fe9a942 KK |
287 | &adc { |
288 | vdd-supply = <&ldo3_reg>; | |
289 | status = "okay"; | |
290 | }; | |
291 | ||
4f20aa0e CC |
292 | &bus_dmc { |
293 | devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; | |
294 | vdd-supply = <&buck1_reg>; | |
295 | status = "okay"; | |
296 | }; | |
297 | ||
298 | &bus_acp { | |
299 | devfreq = <&bus_dmc>; | |
300 | status = "okay"; | |
301 | }; | |
302 | ||
303 | &bus_c2c { | |
304 | devfreq = <&bus_dmc>; | |
305 | status = "okay"; | |
306 | }; | |
307 | ||
308 | &bus_leftbus { | |
309 | devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; | |
310 | vdd-supply = <&buck3_reg>; | |
311 | status = "okay"; | |
312 | }; | |
313 | ||
314 | &bus_rightbus { | |
315 | devfreq = <&bus_leftbus>; | |
316 | status = "okay"; | |
317 | }; | |
318 | ||
319 | &bus_display { | |
320 | devfreq = <&bus_leftbus>; | |
321 | status = "okay"; | |
322 | }; | |
323 | ||
324 | &bus_fsys { | |
325 | devfreq = <&bus_leftbus>; | |
326 | status = "okay"; | |
327 | }; | |
328 | ||
329 | &bus_peri { | |
330 | devfreq = <&bus_leftbus>; | |
331 | status = "okay"; | |
332 | }; | |
333 | ||
334 | &bus_mfc { | |
335 | devfreq = <&bus_leftbus>; | |
336 | status = "okay"; | |
337 | }; | |
338 | ||
f4499741 BZ |
339 | &cpu0 { |
340 | cpu0-supply = <&buck2_reg>; | |
341 | }; | |
342 | ||
1fe9a942 KK |
343 | &csis_0 { |
344 | status = "okay"; | |
345 | vddcore-supply = <&ldo8_reg>; | |
346 | vddio-supply = <&ldo10_reg>; | |
347 | assigned-clocks = <&clock CLK_MOUT_CSIS0>, | |
348 | <&clock CLK_SCLK_CSIS0>; | |
349 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
350 | assigned-clock-rates = <0>, <176000000>; | |
351 | ||
352 | /* Camera C (3) MIPI CSI-2 (CSIS0) */ | |
353 | port@3 { | |
354 | reg = <3>; | |
355 | csis0_ep: endpoint { | |
356 | remote-endpoint = <&s5c73m3_ep>; | |
357 | data-lanes = <1 2 3 4>; | |
358 | samsung,csis-hs-settle = <12>; | |
359 | }; | |
360 | }; | |
361 | }; | |
362 | ||
363 | &csis_1 { | |
364 | status = "okay"; | |
365 | vddcore-supply = <&ldo8_reg>; | |
366 | vddio-supply = <&ldo10_reg>; | |
367 | assigned-clocks = <&clock CLK_MOUT_CSIS1>, | |
368 | <&clock CLK_SCLK_CSIS1>; | |
369 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
370 | assigned-clock-rates = <0>, <176000000>; | |
371 | ||
372 | /* Camera D (4) MIPI CSI-2 (CSIS1) */ | |
373 | port@4 { | |
374 | reg = <4>; | |
375 | csis1_ep: endpoint { | |
376 | remote-endpoint = <&is_s5k6a3_ep>; | |
377 | data-lanes = <1>; | |
378 | samsung,csis-hs-settle = <18>; | |
379 | samsung,csis-wclk; | |
380 | }; | |
381 | }; | |
382 | }; | |
383 | ||
384 | &dsi_0 { | |
385 | vddcore-supply = <&ldo8_reg>; | |
386 | vddio-supply = <&ldo10_reg>; | |
387 | samsung,pll-clock-frequency = <24000000>; | |
388 | status = "okay"; | |
389 | ||
390 | ports { | |
391 | #address-cells = <1>; | |
392 | #size-cells = <0>; | |
393 | ||
394 | port@1 { | |
395 | reg = <1>; | |
396 | ||
397 | dsi_out: endpoint { | |
398 | remote-endpoint = <&dsi_in>; | |
399 | samsung,burst-clock-frequency = <500000000>; | |
400 | samsung,esc-clock-frequency = <20000000>; | |
401 | }; | |
402 | }; | |
403 | }; | |
404 | ||
405 | panel@0 { | |
406 | compatible = "samsung,s6e8aa0"; | |
407 | reg = <0>; | |
408 | vdd3-supply = <&lcd_vdd3_reg>; | |
409 | vci-supply = <&ldo25_reg>; | |
c10d3290 | 410 | reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
411 | power-on-delay= <50>; |
412 | reset-delay = <100>; | |
413 | init-delay = <100>; | |
414 | flip-horizontal; | |
415 | flip-vertical; | |
416 | panel-width-mm = <58>; | |
417 | panel-height-mm = <103>; | |
418 | ||
419 | display-timings { | |
420 | timing-0 { | |
421 | clock-frequency = <57153600>; | |
422 | hactive = <720>; | |
423 | vactive = <1280>; | |
424 | hfront-porch = <5>; | |
425 | hback-porch = <5>; | |
426 | hsync-len = <5>; | |
427 | vfront-porch = <13>; | |
428 | vback-porch = <1>; | |
429 | vsync-len = <2>; | |
430 | }; | |
431 | }; | |
432 | ||
433 | port { | |
434 | dsi_in: endpoint { | |
435 | remote-endpoint = <&dsi_out>; | |
436 | }; | |
437 | }; | |
438 | }; | |
439 | }; | |
440 | ||
441 | &exynos_usbphy { | |
4ae9a4c6 | 442 | vbus-supply = <&esafeout1_reg>; |
1fe9a942 KK |
443 | status = "okay"; |
444 | }; | |
445 | ||
446 | &fimc_0 { | |
447 | status = "okay"; | |
448 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, | |
449 | <&clock CLK_SCLK_FIMC0>; | |
450 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
451 | assigned-clock-rates = <0>, <176000000>; | |
452 | }; | |
453 | ||
454 | &fimc_1 { | |
455 | status = "okay"; | |
456 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, | |
457 | <&clock CLK_SCLK_FIMC1>; | |
458 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
459 | assigned-clock-rates = <0>, <176000000>; | |
460 | }; | |
461 | ||
462 | &fimc_2 { | |
463 | status = "okay"; | |
464 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, | |
465 | <&clock CLK_SCLK_FIMC2>; | |
466 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
467 | assigned-clock-rates = <0>, <176000000>; | |
468 | }; | |
469 | ||
470 | &fimc_3 { | |
471 | status = "okay"; | |
472 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, | |
473 | <&clock CLK_SCLK_FIMC3>; | |
474 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
475 | assigned-clock-rates = <0>, <176000000>; | |
476 | }; | |
477 | ||
478 | &fimc_is { | |
479 | pinctrl-0 = <&fimc_is_uart>; | |
480 | pinctrl-names = "default"; | |
481 | status = "okay"; | |
482 | ||
483 | i2c1_isp: i2c-isp@12140000 { | |
484 | pinctrl-0 = <&fimc_is_i2c1>; | |
485 | pinctrl-names = "default"; | |
486 | ||
487 | s5k6a3@10 { | |
488 | compatible = "samsung,s5k6a3"; | |
489 | reg = <0x10>; | |
490 | svdda-supply = <&cam_io_reg>; | |
491 | svddio-supply = <&ldo19_reg>; | |
492 | afvdd-supply = <&ldo19_reg>; | |
493 | clock-frequency = <24000000>; | |
494 | /* CAM_B_CLKOUT */ | |
495 | clocks = <&camera 1>; | |
496 | clock-names = "extclk"; | |
497 | samsung,camclk-out = <1>; | |
c10d3290 | 498 | gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
499 | |
500 | port { | |
501 | is_s5k6a3_ep: endpoint { | |
502 | remote-endpoint = <&csis1_ep>; | |
503 | data-lanes = <1>; | |
504 | }; | |
505 | }; | |
506 | }; | |
507 | }; | |
508 | }; | |
509 | ||
510 | &fimc_lite_0 { | |
511 | status = "okay"; | |
512 | }; | |
513 | ||
514 | &fimc_lite_1 { | |
515 | status = "okay"; | |
516 | }; | |
517 | ||
518 | &fimd { | |
519 | status = "okay"; | |
520 | }; | |
521 | ||
522 | &hsotg { | |
523 | vusb_d-supply = <&ldo15_reg>; | |
524 | vusb_a-supply = <&ldo12_reg>; | |
525 | dr_mode = "peripheral"; | |
526 | status = "okay"; | |
527 | }; | |
528 | ||
529 | &i2c_0 { | |
530 | samsung,i2c-sda-delay = <100>; | |
531 | samsung,i2c-slave-addr = <0x10>; | |
532 | samsung,i2c-max-bus-freq = <400000>; | |
533 | pinctrl-0 = <&i2c0_bus>; | |
534 | pinctrl-names = "default"; | |
535 | status = "okay"; | |
536 | ||
537 | s5c73m3@3c { | |
538 | compatible = "samsung,s5c73m3"; | |
539 | reg = <0x3c>; | |
c10d3290 JMC |
540 | standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */ |
541 | xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */ | |
1fe9a942 KK |
542 | vdd-int-supply = <&buck9_reg>; |
543 | vddio-cis-supply = <&ldo9_reg>; | |
544 | vdda-supply = <&ldo17_reg>; | |
545 | vddio-host-supply = <&ldo18_reg>; | |
546 | vdd-af-supply = <&cam_af_reg>; | |
547 | vdd-reg-supply = <&cam_io_reg>; | |
548 | clock-frequency = <24000000>; | |
549 | /* CAM_A_CLKOUT */ | |
550 | clocks = <&camera 0>; | |
551 | clock-names = "cis_extclk"; | |
552 | port { | |
553 | s5c73m3_ep: endpoint { | |
554 | remote-endpoint = <&csis0_ep>; | |
555 | data-lanes = <1 2 3 4>; | |
556 | }; | |
557 | }; | |
558 | }; | |
559 | }; | |
560 | ||
561 | &i2c_3 { | |
562 | samsung,i2c-sda-delay = <100>; | |
563 | samsung,i2c-slave-addr = <0x10>; | |
564 | samsung,i2c-max-bus-freq = <400000>; | |
565 | pinctrl-0 = <&i2c3_bus>; | |
566 | pinctrl-names = "default"; | |
567 | status = "okay"; | |
568 | ||
569 | mms114-touchscreen@48 { | |
570 | compatible = "melfas,mms114"; | |
571 | reg = <0x48>; | |
572 | interrupt-parent = <&gpm2>; | |
573 | interrupts = <3 2>; | |
574 | x-size = <720>; | |
575 | y-size = <1280>; | |
576 | avdd-supply = <&ldo23_reg>; | |
577 | vdd-supply = <&ldo24_reg>; | |
578 | }; | |
579 | }; | |
580 | ||
581 | &i2c_4 { | |
582 | samsung,i2c-sda-delay = <100>; | |
583 | samsung,i2c-slave-addr = <0x10>; | |
584 | samsung,i2c-max-bus-freq = <100000>; | |
585 | pinctrl-0 = <&i2c4_bus>; | |
586 | pinctrl-names = "default"; | |
587 | status = "okay"; | |
588 | ||
589 | wm1811: wm1811@1a { | |
590 | compatible = "wlf,wm1811"; | |
591 | reg = <0x1a>; | |
592 | clocks = <&pmu_system_controller 0>; | |
593 | clock-names = "MCLK1"; | |
594 | DCVDD-supply = <&ldo3_reg>; | |
595 | DBVDD1-supply = <&ldo3_reg>; | |
596 | wlf,ldo1ena = <&gpj0 4 0>; | |
597 | }; | |
598 | }; | |
599 | ||
600 | &i2c_7 { | |
601 | samsung,i2c-sda-delay = <100>; | |
602 | samsung,i2c-slave-addr = <0x10>; | |
603 | samsung,i2c-max-bus-freq = <100000>; | |
604 | pinctrl-0 = <&i2c7_bus>; | |
605 | pinctrl-names = "default"; | |
606 | status = "okay"; | |
607 | ||
608 | max77686: max77686_pmic@09 { | |
609 | compatible = "maxim,max77686"; | |
610 | interrupt-parent = <&gpx0>; | |
611 | interrupts = <7 0>; | |
612 | reg = <0x09>; | |
613 | #clock-cells = <1>; | |
614 | ||
615 | voltage-regulators { | |
c21dbcfe | 616 | ldo1_reg: LDO1 { |
1fe9a942 KK |
617 | regulator-name = "VALIVE_1.0V_AP"; |
618 | regulator-min-microvolt = <1000000>; | |
619 | regulator-max-microvolt = <1000000>; | |
620 | regulator-always-on; | |
621 | }; | |
622 | ||
c21dbcfe | 623 | ldo2_reg: LDO2 { |
1fe9a942 KK |
624 | regulator-name = "VM1M2_1.2V_AP"; |
625 | regulator-min-microvolt = <1200000>; | |
626 | regulator-max-microvolt = <1200000>; | |
627 | regulator-always-on; | |
628 | regulator-state-mem { | |
629 | regulator-on-in-suspend; | |
630 | }; | |
631 | }; | |
632 | ||
c21dbcfe | 633 | ldo3_reg: LDO3 { |
1fe9a942 KK |
634 | regulator-name = "VCC_1.8V_AP"; |
635 | regulator-min-microvolt = <1800000>; | |
636 | regulator-max-microvolt = <1800000>; | |
637 | regulator-always-on; | |
638 | }; | |
639 | ||
c21dbcfe | 640 | ldo4_reg: LDO4 { |
1fe9a942 KK |
641 | regulator-name = "VCC_2.8V_AP"; |
642 | regulator-min-microvolt = <2800000>; | |
643 | regulator-max-microvolt = <2800000>; | |
644 | regulator-always-on; | |
645 | }; | |
646 | ||
c21dbcfe | 647 | ldo5_reg: LDO5 { |
1fe9a942 KK |
648 | regulator-name = "VCC_1.8V_IO"; |
649 | regulator-min-microvolt = <1800000>; | |
650 | regulator-max-microvolt = <1800000>; | |
651 | regulator-always-on; | |
652 | }; | |
653 | ||
c21dbcfe | 654 | ldo6_reg: LDO6 { |
1fe9a942 KK |
655 | regulator-name = "VMPLL_1.0V_AP"; |
656 | regulator-min-microvolt = <1000000>; | |
657 | regulator-max-microvolt = <1000000>; | |
658 | regulator-always-on; | |
659 | regulator-state-mem { | |
660 | regulator-on-in-suspend; | |
661 | }; | |
662 | }; | |
663 | ||
c21dbcfe | 664 | ldo7_reg: LDO7 { |
1fe9a942 KK |
665 | regulator-name = "VPLL_1.0V_AP"; |
666 | regulator-min-microvolt = <1000000>; | |
667 | regulator-max-microvolt = <1000000>; | |
668 | regulator-always-on; | |
669 | regulator-state-mem { | |
670 | regulator-on-in-suspend; | |
671 | }; | |
672 | }; | |
673 | ||
c21dbcfe | 674 | ldo8_reg: LDO8 { |
1fe9a942 KK |
675 | regulator-name = "VMIPI_1.0V"; |
676 | regulator-min-microvolt = <1000000>; | |
677 | regulator-max-microvolt = <1000000>; | |
678 | regulator-state-mem { | |
679 | regulator-off-in-suspend; | |
680 | }; | |
681 | }; | |
682 | ||
c21dbcfe | 683 | ldo9_reg: LDO9 { |
1fe9a942 KK |
684 | regulator-name = "CAM_ISP_MIPI_1.2V"; |
685 | regulator-min-microvolt = <1200000>; | |
686 | regulator-max-microvolt = <1200000>; | |
687 | }; | |
688 | ||
c21dbcfe | 689 | ldo10_reg: LDO10 { |
1fe9a942 KK |
690 | regulator-name = "VMIPI_1.8V"; |
691 | regulator-min-microvolt = <1800000>; | |
692 | regulator-max-microvolt = <1800000>; | |
693 | regulator-state-mem { | |
694 | regulator-off-in-suspend; | |
695 | }; | |
696 | }; | |
697 | ||
c21dbcfe | 698 | ldo11_reg: LDO11 { |
1fe9a942 KK |
699 | regulator-name = "VABB1_1.95V"; |
700 | regulator-min-microvolt = <1950000>; | |
701 | regulator-max-microvolt = <1950000>; | |
702 | regulator-always-on; | |
703 | regulator-state-mem { | |
704 | regulator-off-in-suspend; | |
705 | }; | |
706 | }; | |
707 | ||
c21dbcfe | 708 | ldo12_reg: LDO12 { |
1fe9a942 KK |
709 | regulator-name = "VUOTG_3.0V"; |
710 | regulator-min-microvolt = <3000000>; | |
711 | regulator-max-microvolt = <3000000>; | |
712 | regulator-state-mem { | |
713 | regulator-off-in-suspend; | |
714 | }; | |
715 | }; | |
716 | ||
c21dbcfe | 717 | ldo13_reg: LDO13 { |
1fe9a942 KK |
718 | regulator-name = "NFC_AVDD_1.8V"; |
719 | regulator-min-microvolt = <1800000>; | |
720 | regulator-max-microvolt = <1800000>; | |
721 | }; | |
722 | ||
c21dbcfe | 723 | ldo14_reg: LDO14 { |
1fe9a942 KK |
724 | regulator-name = "VABB2_1.95V"; |
725 | regulator-min-microvolt = <1950000>; | |
726 | regulator-max-microvolt = <1950000>; | |
727 | regulator-always-on; | |
728 | regulator-state-mem { | |
729 | regulator-off-in-suspend; | |
730 | }; | |
731 | }; | |
732 | ||
c21dbcfe | 733 | ldo15_reg: LDO15 { |
1fe9a942 KK |
734 | regulator-name = "VHSIC_1.0V"; |
735 | regulator-min-microvolt = <1000000>; | |
736 | regulator-max-microvolt = <1000000>; | |
737 | regulator-state-mem { | |
738 | regulator-on-in-suspend; | |
739 | }; | |
740 | }; | |
741 | ||
c21dbcfe | 742 | ldo16_reg: LDO16 { |
1fe9a942 KK |
743 | regulator-name = "VHSIC_1.8V"; |
744 | regulator-min-microvolt = <1800000>; | |
745 | regulator-max-microvolt = <1800000>; | |
746 | regulator-state-mem { | |
747 | regulator-on-in-suspend; | |
748 | }; | |
749 | }; | |
750 | ||
c21dbcfe | 751 | ldo17_reg: LDO17 { |
1fe9a942 KK |
752 | regulator-name = "CAM_SENSOR_CORE_1.2V"; |
753 | regulator-min-microvolt = <1200000>; | |
754 | regulator-max-microvolt = <1200000>; | |
755 | }; | |
756 | ||
c21dbcfe | 757 | ldo18_reg: LDO18 { |
1fe9a942 KK |
758 | regulator-name = "CAM_ISP_SEN_IO_1.8V"; |
759 | regulator-min-microvolt = <1800000>; | |
760 | regulator-max-microvolt = <1800000>; | |
761 | }; | |
762 | ||
c21dbcfe | 763 | ldo19_reg: LDO19 { |
1fe9a942 KK |
764 | regulator-name = "VT_CAM_1.8V"; |
765 | regulator-min-microvolt = <1800000>; | |
766 | regulator-max-microvolt = <1800000>; | |
767 | }; | |
768 | ||
c21dbcfe | 769 | ldo20_reg: LDO20 { |
1fe9a942 KK |
770 | regulator-name = "VDDQ_PRE_1.8V"; |
771 | regulator-min-microvolt = <1800000>; | |
772 | regulator-max-microvolt = <1800000>; | |
773 | }; | |
774 | ||
c21dbcfe | 775 | ldo21_reg: LDO21 { |
1fe9a942 KK |
776 | regulator-name = "VTF_2.8V"; |
777 | regulator-min-microvolt = <2800000>; | |
778 | regulator-max-microvolt = <2800000>; | |
779 | maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; | |
780 | }; | |
781 | ||
c21dbcfe | 782 | ldo22_reg: LDO22 { |
1fe9a942 KK |
783 | regulator-name = "VMEM_VDD_2.8V"; |
784 | regulator-min-microvolt = <2800000>; | |
785 | regulator-max-microvolt = <2800000>; | |
786 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; | |
787 | }; | |
788 | ||
c21dbcfe | 789 | ldo23_reg: LDO23 { |
1fe9a942 KK |
790 | regulator-name = "TSP_AVDD_3.3V"; |
791 | regulator-min-microvolt = <3300000>; | |
792 | regulator-max-microvolt = <3300000>; | |
793 | }; | |
794 | ||
c21dbcfe | 795 | ldo24_reg: LDO24 { |
1fe9a942 KK |
796 | regulator-name = "TSP_VDD_1.8V"; |
797 | regulator-min-microvolt = <1800000>; | |
798 | regulator-max-microvolt = <1800000>; | |
799 | }; | |
800 | ||
c21dbcfe | 801 | ldo25_reg: LDO25 { |
1fe9a942 KK |
802 | regulator-name = "LCD_VCC_3.3V"; |
803 | regulator-min-microvolt = <2800000>; | |
804 | regulator-max-microvolt = <2800000>; | |
805 | }; | |
806 | ||
c21dbcfe | 807 | ldo26_reg: LDO26 { |
1fe9a942 KK |
808 | regulator-name = "MOTOR_VCC_3.0V"; |
809 | regulator-min-microvolt = <3000000>; | |
810 | regulator-max-microvolt = <3000000>; | |
811 | }; | |
812 | ||
c21dbcfe | 813 | buck1_reg: BUCK1 { |
1fe9a942 KK |
814 | regulator-name = "vdd_mif"; |
815 | regulator-min-microvolt = <850000>; | |
816 | regulator-max-microvolt = <1100000>; | |
817 | regulator-always-on; | |
818 | regulator-boot-on; | |
819 | regulator-state-mem { | |
820 | regulator-off-in-suspend; | |
821 | }; | |
822 | }; | |
823 | ||
c21dbcfe | 824 | buck2_reg: BUCK2 { |
1fe9a942 KK |
825 | regulator-name = "vdd_arm"; |
826 | regulator-min-microvolt = <850000>; | |
827 | regulator-max-microvolt = <1500000>; | |
828 | regulator-always-on; | |
829 | regulator-boot-on; | |
830 | regulator-state-mem { | |
831 | regulator-on-in-suspend; | |
832 | }; | |
833 | }; | |
834 | ||
c21dbcfe | 835 | buck3_reg: BUCK3 { |
1fe9a942 KK |
836 | regulator-name = "vdd_int"; |
837 | regulator-min-microvolt = <850000>; | |
838 | regulator-max-microvolt = <1150000>; | |
839 | regulator-always-on; | |
840 | regulator-boot-on; | |
841 | regulator-state-mem { | |
842 | regulator-off-in-suspend; | |
843 | }; | |
844 | }; | |
845 | ||
c21dbcfe | 846 | buck4_reg: BUCK4 { |
1fe9a942 KK |
847 | regulator-name = "vdd_g3d"; |
848 | regulator-min-microvolt = <850000>; | |
849 | regulator-max-microvolt = <1150000>; | |
850 | regulator-boot-on; | |
851 | regulator-state-mem { | |
852 | regulator-off-in-suspend; | |
853 | }; | |
854 | }; | |
855 | ||
c21dbcfe | 856 | buck5_reg: BUCK5 { |
1fe9a942 KK |
857 | regulator-name = "VMEM_1.2V_AP"; |
858 | regulator-min-microvolt = <1200000>; | |
859 | regulator-max-microvolt = <1200000>; | |
860 | regulator-always-on; | |
861 | }; | |
862 | ||
c21dbcfe | 863 | buck6_reg: BUCK6 { |
1fe9a942 KK |
864 | regulator-name = "VCC_SUB_1.35V"; |
865 | regulator-min-microvolt = <1350000>; | |
866 | regulator-max-microvolt = <1350000>; | |
867 | regulator-always-on; | |
868 | }; | |
869 | ||
c21dbcfe | 870 | buck7_reg: BUCK7 { |
1fe9a942 KK |
871 | regulator-name = "VCC_SUB_2.0V"; |
872 | regulator-min-microvolt = <2000000>; | |
873 | regulator-max-microvolt = <2000000>; | |
874 | regulator-always-on; | |
875 | }; | |
876 | ||
c21dbcfe | 877 | buck8_reg: BUCK8 { |
1fe9a942 KK |
878 | regulator-name = "VMEM_VDDF_3.0V"; |
879 | regulator-min-microvolt = <2850000>; | |
880 | regulator-max-microvolt = <2850000>; | |
881 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; | |
882 | }; | |
883 | ||
c21dbcfe | 884 | buck9_reg: BUCK9 { |
1fe9a942 KK |
885 | regulator-name = "CAM_ISP_CORE_1.2V"; |
886 | regulator-min-microvolt = <1000000>; | |
887 | regulator-max-microvolt = <1200000>; | |
888 | maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>; | |
889 | }; | |
890 | }; | |
891 | }; | |
892 | }; | |
893 | ||
894 | &i2s0 { | |
895 | pinctrl-0 = <&i2s0_bus>; | |
896 | pinctrl-names = "default"; | |
897 | status = "okay"; | |
898 | }; | |
899 | ||
900 | &mshc_0 { | |
901 | num-slots = <1>; | |
902 | broken-cd; | |
903 | non-removable; | |
904 | card-detect-delay = <200>; | |
905 | vmmc-supply = <&ldo22_reg>; | |
906 | clock-frequency = <400000000>; | |
907 | samsung,dw-mshc-ciu-div = <0>; | |
908 | samsung,dw-mshc-sdr-timing = <2 3>; | |
909 | samsung,dw-mshc-ddr-timing = <1 2>; | |
910 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; | |
911 | pinctrl-names = "default"; | |
912 | status = "okay"; | |
913 | bus-width = <8>; | |
914 | cap-mmc-highspeed; | |
915 | }; | |
916 | ||
440e5aef IS |
917 | &pmu_system_controller { |
918 | assigned-clocks = <&pmu_system_controller 0>; | |
919 | assigned-clock-parents = <&clock CLK_XUSBXTI>; | |
920 | }; | |
921 | ||
09918a98 TF |
922 | &pinctrl_0 { |
923 | pinctrl-names = "default"; | |
924 | pinctrl-0 = <&sleep0>; | |
925 | ||
926 | sleep0: sleep-states { | |
927 | PIN_SLP(gpa0-0, INPUT, NONE); | |
928 | PIN_SLP(gpa0-1, OUT0, NONE); | |
929 | PIN_SLP(gpa0-2, INPUT, NONE); | |
930 | PIN_SLP(gpa0-3, INPUT, UP); | |
931 | PIN_SLP(gpa0-4, INPUT, NONE); | |
932 | PIN_SLP(gpa0-5, INPUT, DOWN); | |
933 | PIN_SLP(gpa0-6, INPUT, DOWN); | |
934 | PIN_SLP(gpa0-7, INPUT, UP); | |
935 | ||
936 | PIN_SLP(gpa1-0, INPUT, DOWN); | |
937 | PIN_SLP(gpa1-1, INPUT, DOWN); | |
938 | PIN_SLP(gpa1-2, INPUT, DOWN); | |
939 | PIN_SLP(gpa1-3, INPUT, DOWN); | |
940 | PIN_SLP(gpa1-4, INPUT, DOWN); | |
941 | PIN_SLP(gpa1-5, INPUT, DOWN); | |
942 | ||
943 | PIN_SLP(gpb-0, INPUT, NONE); | |
944 | PIN_SLP(gpb-1, INPUT, NONE); | |
945 | PIN_SLP(gpb-2, INPUT, NONE); | |
946 | PIN_SLP(gpb-3, INPUT, NONE); | |
947 | PIN_SLP(gpb-4, INPUT, DOWN); | |
948 | PIN_SLP(gpb-5, INPUT, UP); | |
949 | PIN_SLP(gpb-6, INPUT, DOWN); | |
950 | PIN_SLP(gpb-7, INPUT, DOWN); | |
951 | ||
952 | PIN_SLP(gpc0-0, INPUT, DOWN); | |
953 | PIN_SLP(gpc0-1, INPUT, DOWN); | |
954 | PIN_SLP(gpc0-2, INPUT, DOWN); | |
955 | PIN_SLP(gpc0-3, INPUT, DOWN); | |
956 | PIN_SLP(gpc0-4, INPUT, DOWN); | |
957 | ||
958 | PIN_SLP(gpc1-0, INPUT, NONE); | |
959 | PIN_SLP(gpc1-1, PREV, NONE); | |
960 | PIN_SLP(gpc1-2, INPUT, NONE); | |
961 | PIN_SLP(gpc1-3, INPUT, NONE); | |
962 | PIN_SLP(gpc1-4, INPUT, NONE); | |
963 | ||
964 | PIN_SLP(gpd0-0, INPUT, DOWN); | |
965 | PIN_SLP(gpd0-1, INPUT, DOWN); | |
966 | PIN_SLP(gpd0-2, INPUT, NONE); | |
967 | PIN_SLP(gpd0-3, INPUT, NONE); | |
968 | ||
969 | PIN_SLP(gpd1-0, INPUT, DOWN); | |
970 | PIN_SLP(gpd1-1, INPUT, DOWN); | |
971 | PIN_SLP(gpd1-2, INPUT, NONE); | |
972 | PIN_SLP(gpd1-3, INPUT, NONE); | |
973 | ||
974 | PIN_SLP(gpf0-0, INPUT, NONE); | |
975 | PIN_SLP(gpf0-1, INPUT, NONE); | |
976 | PIN_SLP(gpf0-2, INPUT, DOWN); | |
977 | PIN_SLP(gpf0-3, INPUT, DOWN); | |
978 | PIN_SLP(gpf0-4, INPUT, NONE); | |
979 | PIN_SLP(gpf0-5, INPUT, DOWN); | |
980 | PIN_SLP(gpf0-6, INPUT, NONE); | |
981 | PIN_SLP(gpf0-7, INPUT, DOWN); | |
982 | ||
983 | PIN_SLP(gpf1-0, INPUT, DOWN); | |
984 | PIN_SLP(gpf1-1, INPUT, DOWN); | |
985 | PIN_SLP(gpf1-2, INPUT, DOWN); | |
986 | PIN_SLP(gpf1-3, INPUT, DOWN); | |
987 | PIN_SLP(gpf1-4, INPUT, NONE); | |
988 | PIN_SLP(gpf1-5, INPUT, NONE); | |
989 | PIN_SLP(gpf1-6, INPUT, DOWN); | |
990 | PIN_SLP(gpf1-7, PREV, NONE); | |
991 | ||
992 | PIN_SLP(gpf2-0, PREV, NONE); | |
993 | PIN_SLP(gpf2-1, INPUT, DOWN); | |
994 | PIN_SLP(gpf2-2, INPUT, DOWN); | |
995 | PIN_SLP(gpf2-3, INPUT, DOWN); | |
996 | PIN_SLP(gpf2-4, INPUT, DOWN); | |
997 | PIN_SLP(gpf2-5, INPUT, DOWN); | |
998 | PIN_SLP(gpf2-6, INPUT, NONE); | |
999 | PIN_SLP(gpf2-7, INPUT, NONE); | |
1000 | ||
1001 | PIN_SLP(gpf3-0, INPUT, NONE); | |
1002 | PIN_SLP(gpf3-1, PREV, NONE); | |
1003 | PIN_SLP(gpf3-2, PREV, NONE); | |
1004 | PIN_SLP(gpf3-3, PREV, NONE); | |
1005 | PIN_SLP(gpf3-4, OUT1, NONE); | |
1006 | PIN_SLP(gpf3-5, INPUT, DOWN); | |
1007 | ||
1008 | PIN_SLP(gpj0-0, PREV, NONE); | |
1009 | PIN_SLP(gpj0-1, PREV, NONE); | |
1010 | PIN_SLP(gpj0-2, PREV, NONE); | |
1011 | PIN_SLP(gpj0-3, INPUT, DOWN); | |
1012 | PIN_SLP(gpj0-4, PREV, NONE); | |
1013 | PIN_SLP(gpj0-5, PREV, NONE); | |
1014 | PIN_SLP(gpj0-6, INPUT, DOWN); | |
1015 | PIN_SLP(gpj0-7, INPUT, DOWN); | |
1016 | ||
1017 | PIN_SLP(gpj1-0, INPUT, DOWN); | |
1018 | PIN_SLP(gpj1-1, PREV, NONE); | |
1019 | PIN_SLP(gpj1-2, PREV, NONE); | |
1020 | PIN_SLP(gpj1-3, INPUT, DOWN); | |
1021 | PIN_SLP(gpj1-4, INPUT, DOWN); | |
1022 | }; | |
1023 | }; | |
1024 | ||
1025 | &pinctrl_1 { | |
1026 | pinctrl-names = "default"; | |
1027 | pinctrl-0 = <&sleep1>; | |
1028 | ||
1029 | sleep1: sleep-states { | |
1030 | PIN_SLP(gpk0-0, PREV, NONE); | |
1031 | PIN_SLP(gpk0-1, PREV, NONE); | |
1032 | PIN_SLP(gpk0-2, OUT0, NONE); | |
1033 | PIN_SLP(gpk0-3, PREV, NONE); | |
1034 | PIN_SLP(gpk0-4, PREV, NONE); | |
1035 | PIN_SLP(gpk0-5, PREV, NONE); | |
1036 | PIN_SLP(gpk0-6, PREV, NONE); | |
1037 | ||
1038 | PIN_SLP(gpk1-0, INPUT, DOWN); | |
1039 | PIN_SLP(gpk1-1, INPUT, DOWN); | |
1040 | PIN_SLP(gpk1-2, INPUT, DOWN); | |
1041 | PIN_SLP(gpk1-3, PREV, NONE); | |
1042 | PIN_SLP(gpk1-4, PREV, NONE); | |
1043 | PIN_SLP(gpk1-5, PREV, NONE); | |
1044 | PIN_SLP(gpk1-6, PREV, NONE); | |
1045 | ||
1046 | PIN_SLP(gpk2-0, INPUT, DOWN); | |
1047 | PIN_SLP(gpk2-1, INPUT, DOWN); | |
1048 | PIN_SLP(gpk2-2, INPUT, DOWN); | |
1049 | PIN_SLP(gpk2-3, INPUT, DOWN); | |
1050 | PIN_SLP(gpk2-4, INPUT, DOWN); | |
1051 | PIN_SLP(gpk2-5, INPUT, DOWN); | |
1052 | PIN_SLP(gpk2-6, INPUT, DOWN); | |
1053 | ||
1054 | PIN_SLP(gpk3-0, OUT0, NONE); | |
1055 | PIN_SLP(gpk3-1, INPUT, NONE); | |
1056 | PIN_SLP(gpk3-2, INPUT, DOWN); | |
1057 | PIN_SLP(gpk3-3, INPUT, NONE); | |
1058 | PIN_SLP(gpk3-4, INPUT, NONE); | |
1059 | PIN_SLP(gpk3-5, INPUT, NONE); | |
1060 | PIN_SLP(gpk3-6, INPUT, NONE); | |
1061 | ||
1062 | PIN_SLP(gpl0-0, INPUT, DOWN); | |
1063 | PIN_SLP(gpl0-1, INPUT, DOWN); | |
1064 | PIN_SLP(gpl0-2, INPUT, DOWN); | |
1065 | PIN_SLP(gpl0-3, INPUT, DOWN); | |
1066 | PIN_SLP(gpl0-4, PREV, NONE); | |
1067 | PIN_SLP(gpl0-6, PREV, NONE); | |
1068 | ||
1069 | PIN_SLP(gpl1-0, INPUT, DOWN); | |
1070 | PIN_SLP(gpl1-1, INPUT, DOWN); | |
1071 | PIN_SLP(gpl2-0, INPUT, DOWN); | |
1072 | PIN_SLP(gpl2-1, INPUT, DOWN); | |
1073 | PIN_SLP(gpl2-2, INPUT, DOWN); | |
1074 | PIN_SLP(gpl2-3, INPUT, DOWN); | |
1075 | PIN_SLP(gpl2-4, INPUT, DOWN); | |
1076 | PIN_SLP(gpl2-5, INPUT, DOWN); | |
1077 | PIN_SLP(gpl2-6, PREV, NONE); | |
1078 | PIN_SLP(gpl2-7, INPUT, DOWN); | |
1079 | ||
1080 | PIN_SLP(gpm0-0, INPUT, DOWN); | |
1081 | PIN_SLP(gpm0-1, INPUT, DOWN); | |
1082 | PIN_SLP(gpm0-2, INPUT, DOWN); | |
1083 | PIN_SLP(gpm0-3, INPUT, DOWN); | |
1084 | PIN_SLP(gpm0-4, INPUT, DOWN); | |
1085 | PIN_SLP(gpm0-5, INPUT, DOWN); | |
1086 | PIN_SLP(gpm0-6, INPUT, DOWN); | |
1087 | PIN_SLP(gpm0-7, INPUT, DOWN); | |
1088 | ||
1089 | PIN_SLP(gpm1-0, INPUT, DOWN); | |
1090 | PIN_SLP(gpm1-1, INPUT, DOWN); | |
1091 | PIN_SLP(gpm1-2, INPUT, NONE); | |
1092 | PIN_SLP(gpm1-3, INPUT, NONE); | |
1093 | PIN_SLP(gpm1-4, INPUT, NONE); | |
1094 | PIN_SLP(gpm1-5, INPUT, NONE); | |
1095 | PIN_SLP(gpm1-6, INPUT, DOWN); | |
1096 | ||
1097 | PIN_SLP(gpm2-0, INPUT, NONE); | |
1098 | PIN_SLP(gpm2-1, INPUT, NONE); | |
1099 | PIN_SLP(gpm2-2, INPUT, DOWN); | |
1100 | PIN_SLP(gpm2-3, INPUT, DOWN); | |
1101 | PIN_SLP(gpm2-4, INPUT, DOWN); | |
1102 | ||
1103 | PIN_SLP(gpm3-0, PREV, NONE); | |
1104 | PIN_SLP(gpm3-1, PREV, NONE); | |
1105 | PIN_SLP(gpm3-2, PREV, NONE); | |
1106 | PIN_SLP(gpm3-3, OUT1, NONE); | |
1107 | PIN_SLP(gpm3-4, INPUT, DOWN); | |
1108 | PIN_SLP(gpm3-5, INPUT, DOWN); | |
1109 | PIN_SLP(gpm3-6, INPUT, DOWN); | |
1110 | PIN_SLP(gpm3-7, INPUT, DOWN); | |
1111 | ||
1112 | PIN_SLP(gpm4-0, INPUT, DOWN); | |
1113 | PIN_SLP(gpm4-1, INPUT, DOWN); | |
1114 | PIN_SLP(gpm4-2, INPUT, DOWN); | |
1115 | PIN_SLP(gpm4-3, INPUT, DOWN); | |
1116 | PIN_SLP(gpm4-4, INPUT, DOWN); | |
1117 | PIN_SLP(gpm4-5, INPUT, DOWN); | |
1118 | PIN_SLP(gpm4-6, INPUT, DOWN); | |
1119 | PIN_SLP(gpm4-7, INPUT, DOWN); | |
1120 | ||
1121 | PIN_SLP(gpy0-0, INPUT, DOWN); | |
1122 | PIN_SLP(gpy0-1, INPUT, DOWN); | |
1123 | PIN_SLP(gpy0-2, INPUT, DOWN); | |
1124 | PIN_SLP(gpy0-3, INPUT, DOWN); | |
1125 | PIN_SLP(gpy0-4, INPUT, DOWN); | |
1126 | PIN_SLP(gpy0-5, INPUT, DOWN); | |
1127 | ||
1128 | PIN_SLP(gpy1-0, INPUT, DOWN); | |
1129 | PIN_SLP(gpy1-1, INPUT, DOWN); | |
1130 | PIN_SLP(gpy1-2, INPUT, DOWN); | |
1131 | PIN_SLP(gpy1-3, INPUT, DOWN); | |
1132 | ||
1133 | PIN_SLP(gpy2-0, PREV, NONE); | |
1134 | PIN_SLP(gpy2-1, INPUT, DOWN); | |
1135 | PIN_SLP(gpy2-2, INPUT, NONE); | |
1136 | PIN_SLP(gpy2-3, INPUT, NONE); | |
1137 | PIN_SLP(gpy2-4, INPUT, NONE); | |
1138 | PIN_SLP(gpy2-5, INPUT, NONE); | |
1139 | ||
1140 | PIN_SLP(gpy3-0, INPUT, DOWN); | |
1141 | PIN_SLP(gpy3-1, INPUT, DOWN); | |
1142 | PIN_SLP(gpy3-2, INPUT, DOWN); | |
1143 | PIN_SLP(gpy3-3, INPUT, DOWN); | |
1144 | PIN_SLP(gpy3-4, INPUT, DOWN); | |
1145 | PIN_SLP(gpy3-5, INPUT, DOWN); | |
1146 | PIN_SLP(gpy3-6, INPUT, DOWN); | |
1147 | PIN_SLP(gpy3-7, INPUT, DOWN); | |
1148 | ||
1149 | PIN_SLP(gpy4-0, INPUT, DOWN); | |
1150 | PIN_SLP(gpy4-1, INPUT, DOWN); | |
1151 | PIN_SLP(gpy4-2, INPUT, DOWN); | |
1152 | PIN_SLP(gpy4-3, INPUT, DOWN); | |
1153 | PIN_SLP(gpy4-4, INPUT, DOWN); | |
1154 | PIN_SLP(gpy4-5, INPUT, DOWN); | |
1155 | PIN_SLP(gpy4-6, INPUT, DOWN); | |
1156 | PIN_SLP(gpy4-7, INPUT, DOWN); | |
1157 | ||
1158 | PIN_SLP(gpy5-0, INPUT, DOWN); | |
1159 | PIN_SLP(gpy5-1, INPUT, DOWN); | |
1160 | PIN_SLP(gpy5-2, INPUT, DOWN); | |
1161 | PIN_SLP(gpy5-3, INPUT, DOWN); | |
1162 | PIN_SLP(gpy5-4, INPUT, DOWN); | |
1163 | PIN_SLP(gpy5-5, INPUT, DOWN); | |
1164 | PIN_SLP(gpy5-6, INPUT, DOWN); | |
1165 | PIN_SLP(gpy5-7, INPUT, DOWN); | |
1166 | ||
1167 | PIN_SLP(gpy6-0, INPUT, DOWN); | |
1168 | PIN_SLP(gpy6-1, INPUT, DOWN); | |
1169 | PIN_SLP(gpy6-2, INPUT, DOWN); | |
1170 | PIN_SLP(gpy6-3, INPUT, DOWN); | |
1171 | PIN_SLP(gpy6-4, INPUT, DOWN); | |
1172 | PIN_SLP(gpy6-5, INPUT, DOWN); | |
1173 | PIN_SLP(gpy6-6, INPUT, DOWN); | |
1174 | PIN_SLP(gpy6-7, INPUT, DOWN); | |
1175 | }; | |
1176 | }; | |
1177 | ||
1178 | &pinctrl_2 { | |
1179 | pinctrl-names = "default"; | |
1180 | pinctrl-0 = <&sleep2>; | |
1181 | ||
1182 | sleep2: sleep-states { | |
1183 | PIN_SLP(gpz-0, INPUT, DOWN); | |
1184 | PIN_SLP(gpz-1, INPUT, DOWN); | |
1185 | PIN_SLP(gpz-2, INPUT, DOWN); | |
1186 | PIN_SLP(gpz-3, INPUT, DOWN); | |
1187 | PIN_SLP(gpz-4, INPUT, DOWN); | |
1188 | PIN_SLP(gpz-5, INPUT, DOWN); | |
1189 | PIN_SLP(gpz-6, INPUT, DOWN); | |
1190 | }; | |
1191 | }; | |
1192 | ||
1193 | &pinctrl_3 { | |
1194 | pinctrl-names = "default"; | |
1195 | pinctrl-0 = <&sleep3>; | |
1196 | ||
1197 | sleep3: sleep-states { | |
1198 | PIN_SLP(gpv0-0, INPUT, DOWN); | |
1199 | PIN_SLP(gpv0-1, INPUT, DOWN); | |
1200 | PIN_SLP(gpv0-2, INPUT, DOWN); | |
1201 | PIN_SLP(gpv0-3, INPUT, DOWN); | |
1202 | PIN_SLP(gpv0-4, INPUT, DOWN); | |
1203 | PIN_SLP(gpv0-5, INPUT, DOWN); | |
1204 | PIN_SLP(gpv0-6, INPUT, DOWN); | |
1205 | PIN_SLP(gpv0-7, INPUT, DOWN); | |
1206 | ||
1207 | PIN_SLP(gpv1-0, INPUT, DOWN); | |
1208 | PIN_SLP(gpv1-1, INPUT, DOWN); | |
1209 | PIN_SLP(gpv1-2, INPUT, DOWN); | |
1210 | PIN_SLP(gpv1-3, INPUT, DOWN); | |
1211 | PIN_SLP(gpv1-4, INPUT, DOWN); | |
1212 | PIN_SLP(gpv1-5, INPUT, DOWN); | |
1213 | PIN_SLP(gpv1-6, INPUT, DOWN); | |
1214 | PIN_SLP(gpv1-7, INPUT, DOWN); | |
1215 | ||
1216 | PIN_SLP(gpv2-0, INPUT, DOWN); | |
1217 | PIN_SLP(gpv2-1, INPUT, DOWN); | |
1218 | PIN_SLP(gpv2-2, INPUT, DOWN); | |
1219 | PIN_SLP(gpv2-3, INPUT, DOWN); | |
1220 | PIN_SLP(gpv2-4, INPUT, DOWN); | |
1221 | PIN_SLP(gpv2-5, INPUT, DOWN); | |
1222 | PIN_SLP(gpv2-6, INPUT, DOWN); | |
1223 | PIN_SLP(gpv2-7, INPUT, DOWN); | |
1224 | ||
1225 | PIN_SLP(gpv3-0, INPUT, DOWN); | |
1226 | PIN_SLP(gpv3-1, INPUT, DOWN); | |
1227 | PIN_SLP(gpv3-2, INPUT, DOWN); | |
1228 | PIN_SLP(gpv3-3, INPUT, DOWN); | |
1229 | PIN_SLP(gpv3-4, INPUT, DOWN); | |
1230 | PIN_SLP(gpv3-5, INPUT, DOWN); | |
1231 | PIN_SLP(gpv3-6, INPUT, DOWN); | |
1232 | PIN_SLP(gpv3-7, INPUT, DOWN); | |
1233 | ||
1234 | PIN_SLP(gpv4-0, INPUT, DOWN); | |
1235 | }; | |
1236 | }; | |
ce9940a9 | 1237 | |
1fe9a942 KK |
1238 | &pwm { |
1239 | pinctrl-0 = <&pwm0_out>; | |
1240 | pinctrl-names = "default"; | |
1241 | samsung,pwm-outputs = <0>; | |
1242 | status = "okay"; | |
1243 | }; | |
1244 | ||
ce9940a9 KK |
1245 | &rtc { |
1246 | status = "okay"; | |
1247 | clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; | |
1248 | clock-names = "rtc", "rtc_src"; | |
1249 | }; | |
1fe9a942 KK |
1250 | |
1251 | &sdhci_2 { | |
1252 | bus-width = <4>; | |
c10d3290 | 1253 | cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
1254 | cd-inverted; |
1255 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; | |
1256 | pinctrl-names = "default"; | |
1257 | vmmc-supply = <&ldo21_reg>; | |
1258 | status = "okay"; | |
1259 | }; | |
1260 | ||
1261 | &serial_0 { | |
1262 | status = "okay"; | |
1263 | }; | |
1264 | ||
1265 | &serial_1 { | |
1266 | status = "okay"; | |
1267 | }; | |
1268 | ||
1269 | &serial_2 { | |
1270 | status = "okay"; | |
1271 | }; | |
1272 | ||
1273 | &serial_3 { | |
1274 | status = "okay"; | |
1275 | }; | |
1276 | ||
1277 | &spi_1 { | |
1278 | pinctrl-names = "default"; | |
1279 | pinctrl-0 = <&spi1_bus>; | |
c10d3290 | 1280 | cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
1281 | status = "okay"; |
1282 | ||
26ee29a6 | 1283 | s5c73m3_spi: s5c73m3@0 { |
1fe9a942 KK |
1284 | compatible = "samsung,s5c73m3"; |
1285 | spi-max-frequency = <50000000>; | |
1286 | reg = <0>; | |
1287 | controller-data { | |
1288 | samsung,spi-feedback-delay = <2>; | |
1289 | }; | |
1290 | }; | |
1291 | }; | |
1292 | ||
1293 | &tmu { | |
1294 | vtmu-supply = <&ldo10_reg>; | |
1295 | status = "okay"; | |
1296 | }; |