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0f7238a1 TF |
1 | /* |
2 | * Samsung's Exynos4412 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412 | |
8 | * based board files can include this file and provide values for board specfic | |
9 | * bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional | |
13 | * nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
3799279f | 20 | #include "exynos4x12.dtsi" |
0f7238a1 TF |
21 | |
22 | / { | |
8bdb31b4 | 23 | compatible = "samsung,exynos4412", "samsung,exynos4"; |
0f7238a1 | 24 | |
8bdfa203 | 25 | combiner: interrupt-controller@10440000 { |
30269ddf | 26 | samsung,combiner-nr = <20>; |
30269ddf AB |
27 | }; |
28 | ||
6f4b82a3 CP |
29 | pmu { |
30 | interrupts = <2 2>, <3 2>, <18 2>, <19 2>; | |
31 | }; | |
32 | ||
8bdfa203 CC |
33 | gic: interrupt-controller@10490000 { |
34 | cpu-offset = <0x4000>; | |
35 | }; | |
7b9613ac CP |
36 | |
37 | pmu_system_controller: system-controller@10020000 { | |
38 | compatible = "samsung,exynos4412-pmu", "syscon"; | |
39 | }; | |
0f7238a1 | 40 | }; |