[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / exynos5250.dtsi

/*
 * SAMSUNG EXYNOS5250 SoC device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
 * EXYNOS5250 based board files can include this file and provide
 * values for board specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
 * additional nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

/include/ "skeleton.dtsi"
/include/ "exynos5250-pinctrl.dtsi"

/ {
	compatible = "samsung,exynos5250";
	interrupt-parent = <&gic>;

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
		gsc0 = &gsc_0;
		gsc1 = &gsc_1;
		gsc2 = &gsc_2;
		gsc3 = &gsc_3;
		mshc0 = &dwmmc_0;
		mshc1 = &dwmmc_1;
		mshc2 = &dwmmc_2;
		mshc3 = &dwmmc_3;
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
		i2c8 = &i2c_8;
		pinctrl0 = &pinctrl_0;
		pinctrl1 = &pinctrl_1;
		pinctrl2 = &pinctrl_2;
		pinctrl3 = &pinctrl_3;
	};

	pd_gsc: gsc-power-domain@0x10044000 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10044000 0x20>;
	};

	pd_mfc: mfc-power-domain@0x10044040 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10044040 0x20>;
	};

	clock: clock-controller@0x10010000 {
		compatible = "samsung,exynos5250-clock";
		reg = <0x10010000 0x30000>;
		#clock-cells = <1>;
	};

	gic:interrupt-controller@10481000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x10481000 0x1000>,
		      <0x10482000 0x1000>,
		      <0x10484000 0x2000>,
		      <0x10486000 0x2000>;
		interrupts = <1 9 0xf04>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 13 0xf08>,
			     <1 14 0xf08>,
			     <1 11 0xf08>,
			     <1 10 0xf08>;
	};

	combiner:interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		samsung,combiner-nr = <32>;
		reg = <0x10440000 0x1000>;
		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
			     <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
			     <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
			     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
			     <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
			     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	};

	mct@101C0000 {
		compatible = "samsung,exynos4210-mct";
		reg = <0x101C0000 0x800>;
		interrupt-controller;
		#interrups-cells = <2>;
		interrupt-parent = <&mct_map>;
		interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
			     <4 0>, <5 0>;
		clocks = <&clock 1>, <&clock 335>;
		clock-names = "fin_pll", "mct";

		mct_map: mct-map {
			#interrupt-cells = <2>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <0x0 0 &combiner 23 3>,
					<0x1 0 &combiner 23 4>,
					<0x2 0 &combiner 25 2>,
					<0x3 0 &combiner 25 3>,
					<0x4 0 &gic 0 120 0>,
					<0x5 0 &gic 0 121 0>;
		};
	};

	pinctrl_0: pinctrl@11400000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x11400000 0x1000>;
		interrupts = <0 46 0>;

		wakup_eint: wakeup-interrupt-controller {
			compatible = "samsung,exynos4210-wakeup-eint";
			interrupt-parent = <&gic>;
			interrupts = <0 32 0>;
		};
	};

	pinctrl_1: pinctrl@13400000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x13400000 0x1000>;
		interrupts = <0 45 0>;
	};

	pinctrl_2: pinctrl@10d10000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x10d10000 0x1000>;
		interrupts = <0 50 0>;
	};

	pinctrl_3: pinctrl@03680000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x0368000 0x1000>;
		interrupts = <0 47 0>;
	};

	watchdog {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x101D0000 0x100>;
		interrupts = <0 42 0>;
		clocks = <&clock 336>;
		clock-names = "watchdog";
	};

	codec@11000000 {
		compatible = "samsung,mfc-v6";
		reg = <0x11000000 0x10000>;
		interrupts = <0 96 0>;
		samsung,power-domain = <&pd_mfc>;
	};

	rtc {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x101E0000 0x100>;
		interrupts = <0 43 0>, <0 44 0>;
		clocks = <&clock 337>;
		clock-names = "rtc";
	};

	tmu@10060000 {
		compatible = "samsung,exynos5250-tmu";
		reg = <0x10060000 0x100>;
		interrupts = <0 65 0>;
		clocks = <&clock 338>;
		clock-names = "tmu_apbif";
	};

	serial@12C00000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C00000 0x100>;
		interrupts = <0 51 0>;
		clocks = <&clock 289>, <&clock 146>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C10000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C10000 0x100>;
		interrupts = <0 52 0>;
		clocks = <&clock 290>, <&clock 147>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C20000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C20000 0x100>;
		interrupts = <0 53 0>;
		clocks = <&clock 291>, <&clock 148>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C30000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C30000 0x100>;
		interrupts = <0 54 0>;
		clocks = <&clock 292>, <&clock 149>;
		clock-names = "uart", "clk_uart_baud0";
	};

	sata@122F0000 {
		compatible = "samsung,exynos5-sata-ahci";
		reg = <0x122F0000 0x1ff>;
		interrupts = <0 115 0>;
		clocks = <&clock 277>, <&clock 143>;
		clock-names = "sata", "sclk_sata";
	};

	sata-phy@12170000 {
		compatible = "samsung,exynos5-sata-phy";
		reg = <0x12170000 0x1ff>;
	};

	i2c_0: i2c@12C60000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C60000 0x100>;
		interrupts = <0 56 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 294>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
	};

	i2c_1: i2c@12C70000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C70000 0x100>;
		interrupts = <0 57 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 295>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
	};

	i2c_2: i2c@12C80000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C80000 0x100>;
		interrupts = <0 58 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 296>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c2_bus>;
	};

	i2c_3: i2c@12C90000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C90000 0x100>;
		interrupts = <0 59 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 297>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c3_bus>;
	};

	i2c_4: i2c@12CA0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CA0000 0x100>;
		interrupts = <0 60 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 298>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c4_bus>;
	};

	i2c_5: i2c@12CB0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CB0000 0x100>;
		interrupts = <0 61 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 299>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c5_bus>;
	};

	i2c_6: i2c@12CC0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CC0000 0x100>;
		interrupts = <0 62 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 300>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c6_bus>;
	};

	i2c_7: i2c@12CD0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CD0000 0x100>;
		interrupts = <0 63 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 301>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c7_bus>;
	};

	i2c_8: i2c@12CE0000 {
		compatible = "samsung,s3c2440-hdmiphy-i2c";
		reg = <0x12CE0000 0x1000>;
		interrupts = <0 64 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 302>;
		clock-names = "i2c";
	};

	i2c@121D0000 {
                compatible = "samsung,exynos5-sata-phy-i2c";
                reg = <0x121D0000 0x100>;
                #address-cells = <1>;
                #size-cells = <0>;
		clocks = <&clock 288>;
		clock-names = "i2c";
	};

	spi_0: spi@12d20000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d20000 0x100>;
		interrupts = <0 66 0>;
		dmas = <&pdma0 5
			&pdma0 4>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 304>, <&clock 154>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
	};

	spi_1: spi@12d30000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d30000 0x100>;
		interrupts = <0 67 0>;
		dmas = <&pdma1 5
			&pdma1 4>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 305>, <&clock 155>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
	};

	spi_2: spi@12d40000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d40000 0x100>;
		interrupts = <0 68 0>;
		dmas = <&pdma0 7
			&pdma0 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 306>, <&clock 156>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
	};

	dwmmc_0: dwmmc0@12200000 {
		compatible = "samsung,exynos5250-dw-mshc";
		reg = <0x12200000 0x1000>;
		interrupts = <0 75 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 280>, <&clock 139>;
		clock-names = "biu", "ciu";
	};

	dwmmc_1: dwmmc1@12210000 {
		compatible = "samsung,exynos5250-dw-mshc";
		reg = <0x12210000 0x1000>;
		interrupts = <0 76 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 281>, <&clock 140>;
		clock-names = "biu", "ciu";
	};

	dwmmc_2: dwmmc2@12220000 {
		compatible = "samsung,exynos5250-dw-mshc";
		reg = <0x12220000 0x1000>;
		interrupts = <0 77 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 282>, <&clock 141>;
		clock-names = "biu", "ciu";
	};

	dwmmc_3: dwmmc3@12230000 {
		compatible = "samsung,exynos5250-dw-mshc";
		reg = <0x12230000 0x1000>;
		interrupts = <0 78 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 283>, <&clock 142>;
		clock-names = "biu", "ciu";
	};

	i2s0: i2s@03830000 {
		compatible = "samsung,i2s-v5";
		reg = <0x03830000 0x100>;
		dmas = <&pdma0 10
			&pdma0 9
			&pdma0 8>;
		dma-names = "tx", "rx", "tx-sec";
		samsung,supports-6ch;
		samsung,supports-rstclr;
		samsung,supports-secdai;
		samsung,idma-addr = <0x03000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&i2s0_bus>;
	};

	i2s1: i2s@12D60000 {
		compatible = "samsung,i2s-v5";
		reg = <0x12D60000 0x100>;
		dmas = <&pdma1 12
			&pdma1 11>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <&i2s1_bus>;
	};

	i2s2: i2s@12D70000 {
		compatible = "samsung,i2s-v5";
		reg = <0x12D70000 0x100>;
		dmas = <&pdma0 12
			&pdma0 11>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <&i2s2_bus>;
	};

	usb@12110000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12110000 0x100>;
		interrupts = <0 71 0>;
	};

	usb@12120000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12120000 0x100>;
		interrupts = <0 71 0>;
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@121A0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x121A0000 0x1000>;
			interrupts = <0 34 0>;
			clocks = <&clock 275>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		pdma1: pdma@121B0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x121B0000 0x1000>;
			interrupts = <0 35 0>;
			clocks = <&clock 276>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		mdma0: mdma@10800000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x10800000 0x1000>;
			interrupts = <0 33 0>;
			clocks = <&clock 271>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};

		mdma1: mdma@11C10000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x11C10000 0x1000>;
			interrupts = <0 124 0>;
			clocks = <&clock 271>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};
	};

	gsc_0:  gsc@0x13e00000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e00000 0x1000>;
		interrupts = <0 85 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 256>;
		clock-names = "gscl";
	};

	gsc_1:  gsc@0x13e10000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e10000 0x1000>;
		interrupts = <0 86 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 257>;
		clock-names = "gscl";
	};

	gsc_2:  gsc@0x13e20000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e20000 0x1000>;
		interrupts = <0 87 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 258>;
		clock-names = "gscl";
	};

	gsc_3:  gsc@0x13e30000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e30000 0x1000>;
		interrupts = <0 88 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 259>;
		clock-names = "gscl";
	};

	hdmi {
		compatible = "samsung,exynos5-hdmi";
		reg = <0x14530000 0x70000>;
		interrupts = <0 95 0>;
		clocks = <&clock 333>, <&clock 136>, <&clock 137>,
				<&clock 333>, <&clock 333>;
		clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
				"sclk_hdmiphy", "hdmiphy";
	};

	mixer {
		compatible = "samsung,exynos5-mixer";
		reg = <0x14450000 0x10000>;
		interrupts = <0 94 0>;
	};

	dp-controller {
		compatible = "samsung,exynos5-dp";
		reg = <0x145b0000 0x1000>;
		interrupts = <10 3>;
		interrupt-parent = <&combiner>;
		#address-cells = <1>;
		#size-cells = <0>;

		dptx-phy {
			reg = <0x10040720>;
			samsung,enable-mask = <1>;
		};
	};
};
Commit	Line	Data
b074abb7 KK	1	/*
	2	* SAMSUNG EXYNOS5250 SoC device tree source
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	*
	7	* SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
	8	* EXYNOS5250 based board files can include this file and provide
	9	* values for board specfic bindings.
	10	*
	11	* Note: This file does not include device nodes for all the controllers in
	12	* EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
	13	* additional nodes can be added to this file.
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License version 2 as
	17	* published by the Free Software Foundation.
	18	*/
	19
	20	/include/ "skeleton.dtsi"
f8bfe2b0	21	/include/ "exynos5250-pinctrl.dtsi"
b074abb7 KK	22
	23	/ {
	24	compatible = "samsung,exynos5250";
	25	interrupt-parent = <&gic>;
	26
79989ba3 TA	27	aliases {
	28	spi0 = &spi_0;
	29	spi1 = &spi_1;
	30	spi2 = &spi_2;
1128658a SAB	31	gsc0 = &gsc_0;
	32	gsc1 = &gsc_1;
	33	gsc2 = &gsc_2;
	34	gsc3 = &gsc_3;
de0f42be DA	35	mshc0 = &dwmmc_0;
	36	mshc1 = &dwmmc_1;
	37	mshc2 = &dwmmc_2;
	38	mshc3 = &dwmmc_3;
b9fa3e7b AK	39	i2c0 = &i2c_0;
	40	i2c1 = &i2c_1;
	41	i2c2 = &i2c_2;
	42	i2c3 = &i2c_3;
	43	i2c4 = &i2c_4;
	44	i2c5 = &i2c_5;
	45	i2c6 = &i2c_6;
	46	i2c7 = &i2c_7;
	47	i2c8 = &i2c_8;
f8bfe2b0 TA	48	pinctrl0 = &pinctrl_0;
	49	pinctrl1 = &pinctrl_1;
	50	pinctrl2 = &pinctrl_2;
	51	pinctrl3 = &pinctrl_3;
79989ba3 TA	52	};
79989ba3 TA	53
6f9e95e6 PK	54	pd_gsc: gsc-power-domain@0x10044000 {
	55	compatible = "samsung,exynos4210-pd";
	56	reg = <0x10044000 0x20>;
	57	};
	58
	59	pd_mfc: mfc-power-domain@0x10044040 {
	60	compatible = "samsung,exynos4210-pd";
	61	reg = <0x10044040 0x20>;
	62	};
	63
d8bafc87 TA	64	clock: clock-controller@0x10010000 {
	65	compatible = "samsung,exynos5250-clock";
	66	reg = <0x10010000 0x30000>;
	67	#clock-cells = <1>;
	68	};
	69
009f7c9f	70	gic:interrupt-controller@10481000 {
849ff89b	71	compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
b074abb7 KK	72	#interrupt-cells = <3>;
b074abb7 KK	73	interrupt-controller;
849ff89b AG	74	reg = <0x10481000 0x1000>,
	75	<0x10482000 0x1000>,
	76	<0x10484000 0x2000>,
	77	<0x10486000 0x2000>;
	78	interrupts = <1 9 0xf04>;
b074abb7 KK	79	};
b074abb7 KK	80
2b7da988 AG	81	timer {
	82	compatible = "arm,armv7-timer";
	83	interrupts = <1 13 0xf08>,
	84	<1 14 0xf08>,
	85	<1 11 0xf08>,
	86	<1 10 0xf08>;
	87	};
	88
fe84cdf6 TA	89	combiner:interrupt-controller@10440000 {
	90	compatible = "samsung,exynos4210-combiner";
	91	#interrupt-cells = <2>;
	92	interrupt-controller;
	93	samsung,combiner-nr = <32>;
	94	reg = <0x10440000 0x1000>;
	95	interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
	96	<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
	97	<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
	98	<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
	99	<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
	100	<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
	101	<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
	102	<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	103	};
	104
bbd9700a TA	105	mct@101C0000 {
	106	compatible = "samsung,exynos4210-mct";
	107	reg = <0x101C0000 0x800>;
	108	interrupt-controller;
	109	#interrups-cells = <2>;
	110	interrupt-parent = <&mct_map>;
	111	interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
	112	<4 0>, <5 0>;
2de6847c TA	113	clocks = <&clock 1>, <&clock 335>;
2de6847c TA	114	clock-names = "fin_pll", "mct";
bbd9700a TA	115
	116	mct_map: mct-map {
	117	#interrupt-cells = <2>;
	118	#address-cells = <0>;
	119	#size-cells = <0>;
	120	interrupt-map = <0x0 0 &combiner 23 3>,
	121	<0x1 0 &combiner 23 4>,
	122	<0x2 0 &combiner 25 2>,
	123	<0x3 0 &combiner 25 3>,
	124	<0x4 0 &gic 0 120 0>,
	125	<0x5 0 &gic 0 121 0>;
	126	};
	127	};
	128
f8bfe2b0 TA	129	pinctrl_0: pinctrl@11400000 {
	130	compatible = "samsung,exynos5250-pinctrl";
	131	reg = <0x11400000 0x1000>;
	132	interrupts = <0 46 0>;
	133
	134	wakup_eint: wakeup-interrupt-controller {
	135	compatible = "samsung,exynos4210-wakeup-eint";
	136	interrupt-parent = <&gic>;
	137	interrupts = <0 32 0>;
	138	};
	139	};
	140
	141	pinctrl_1: pinctrl@13400000 {
	142	compatible = "samsung,exynos5250-pinctrl";
	143	reg = <0x13400000 0x1000>;
	144	interrupts = <0 45 0>;
	145	};
	146
	147	pinctrl_2: pinctrl@10d10000 {
	148	compatible = "samsung,exynos5250-pinctrl";
	149	reg = <0x10d10000 0x1000>;
	150	interrupts = <0 50 0>;
	151	};
	152
	153	pinctrl_3: pinctrl@03680000 {
	154	compatible = "samsung,exynos5250-pinctrl";
	155	reg = <0x0368000 0x1000>;
	156	interrupts = <0 47 0>;
	157	};
	158
b074abb7 KK	159	watchdog {
	160	compatible = "samsung,s3c2410-wdt";
	161	reg = <0x101D0000 0x100>;
	162	interrupts = <0 42 0>;
2de6847c TA	163	clocks = <&clock 336>;
2de6847c TA	164	clock-names = "watchdog";
b074abb7 KK	165	};
b074abb7 KK	166
2eae613b AK	167	codec@11000000 {
	168	compatible = "samsung,mfc-v6";
	169	reg = <0x11000000 0x10000>;
	170	interrupts = <0 96 0>;
6f9e95e6	171	samsung,power-domain = <&pd_mfc>;
2eae613b AK	172	};
2eae613b AK	173
b074abb7 KK	174	rtc {
	175	compatible = "samsung,s3c6410-rtc";
	176	reg = <0x101E0000 0x100>;
	177	interrupts = <0 43 0>, <0 44 0>;
2de6847c TA	178	clocks = <&clock 337>;
2de6847c TA	179	clock-names = "rtc";
b074abb7 KK	180	};
b074abb7 KK	181
ef405e04 ADK	182	tmu@10060000 {
	183	compatible = "samsung,exynos5250-tmu";
	184	reg = <0x10060000 0x100>;
	185	interrupts = <0 65 0>;
2de6847c TA	186	clocks = <&clock 338>;
2de6847c TA	187	clock-names = "tmu_apbif";
ef405e04 ADK	188	};
ef405e04 ADK	189
b074abb7 KK	190	serial@12C00000 {
	191	compatible = "samsung,exynos4210-uart";
	192	reg = <0x12C00000 0x100>;
	193	interrupts = <0 51 0>;
2de6847c TA	194	clocks = <&clock 289>, <&clock 146>;
2de6847c TA	195	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	196	};
	197
	198	serial@12C10000 {
	199	compatible = "samsung,exynos4210-uart";
	200	reg = <0x12C10000 0x100>;
	201	interrupts = <0 52 0>;
2de6847c TA	202	clocks = <&clock 290>, <&clock 147>;
2de6847c TA	203	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	204	};
	205
	206	serial@12C20000 {
	207	compatible = "samsung,exynos4210-uart";
	208	reg = <0x12C20000 0x100>;
	209	interrupts = <0 53 0>;
2de6847c TA	210	clocks = <&clock 291>, <&clock 148>;
2de6847c TA	211	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	212	};
	213
	214	serial@12C30000 {
	215	compatible = "samsung,exynos4210-uart";
	216	reg = <0x12C30000 0x100>;
	217	interrupts = <0 54 0>;
2de6847c TA	218	clocks = <&clock 292>, <&clock 149>;
2de6847c TA	219	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	220	};
b074abb7 KK	221
c47d244a VA	222	sata@122F0000 {
	223	compatible = "samsung,exynos5-sata-ahci";
	224	reg = <0x122F0000 0x1ff>;
	225	interrupts = <0 115 0>;
2de6847c TA	226	clocks = <&clock 277>, <&clock 143>;
2de6847c TA	227	clock-names = "sata", "sclk_sata";
c47d244a VA	228	};
	229
	230	sata-phy@12170000 {
	231	compatible = "samsung,exynos5-sata-phy";
	232	reg = <0x12170000 0x1ff>;
	233	};
	234
b9fa3e7b	235	i2c_0: i2c@12C60000 {
b074abb7 KK	236	compatible = "samsung,s3c2440-i2c";
	237	reg = <0x12C60000 0x100>;
	238	interrupts = <0 56 0>;
009f7c9f TA	239	#address-cells = <1>;
009f7c9f TA	240	#size-cells = <0>;
2de6847c TA	241	clocks = <&clock 294>;
2de6847c TA	242	clock-names = "i2c";
f8bfe2b0 TA	243	pinctrl-names = "default";
f8bfe2b0 TA	244	pinctrl-0 = <&i2c0_bus>;
b074abb7 KK	245	};
b074abb7 KK	246
b9fa3e7b	247	i2c_1: i2c@12C70000 {
b074abb7 KK	248	compatible = "samsung,s3c2440-i2c";
	249	reg = <0x12C70000 0x100>;
	250	interrupts = <0 57 0>;
009f7c9f TA	251	#address-cells = <1>;
009f7c9f TA	252	#size-cells = <0>;
2de6847c TA	253	clocks = <&clock 295>;
2de6847c TA	254	clock-names = "i2c";
f8bfe2b0 TA	255	pinctrl-names = "default";
f8bfe2b0 TA	256	pinctrl-0 = <&i2c1_bus>;
b074abb7 KK	257	};
b074abb7 KK	258
b9fa3e7b	259	i2c_2: i2c@12C80000 {
b074abb7 KK	260	compatible = "samsung,s3c2440-i2c";
	261	reg = <0x12C80000 0x100>;
	262	interrupts = <0 58 0>;
009f7c9f TA	263	#address-cells = <1>;
009f7c9f TA	264	#size-cells = <0>;
2de6847c TA	265	clocks = <&clock 296>;
2de6847c TA	266	clock-names = "i2c";
f8bfe2b0 TA	267	pinctrl-names = "default";
f8bfe2b0 TA	268	pinctrl-0 = <&i2c2_bus>;
b074abb7 KK	269	};
b074abb7 KK	270
b9fa3e7b	271	i2c_3: i2c@12C90000 {
b074abb7 KK	272	compatible = "samsung,s3c2440-i2c";
	273	reg = <0x12C90000 0x100>;
	274	interrupts = <0 59 0>;
009f7c9f TA	275	#address-cells = <1>;
009f7c9f TA	276	#size-cells = <0>;
2de6847c TA	277	clocks = <&clock 297>;
2de6847c TA	278	clock-names = "i2c";
f8bfe2b0 TA	279	pinctrl-names = "default";
f8bfe2b0 TA	280	pinctrl-0 = <&i2c3_bus>;
b074abb7 KK	281	};
b074abb7 KK	282
b9fa3e7b	283	i2c_4: i2c@12CA0000 {
b074abb7 KK	284	compatible = "samsung,s3c2440-i2c";
	285	reg = <0x12CA0000 0x100>;
	286	interrupts = <0 60 0>;
009f7c9f TA	287	#address-cells = <1>;
009f7c9f TA	288	#size-cells = <0>;
2de6847c TA	289	clocks = <&clock 298>;
2de6847c TA	290	clock-names = "i2c";
f8bfe2b0 TA	291	pinctrl-names = "default";
f8bfe2b0 TA	292	pinctrl-0 = <&i2c4_bus>;
b074abb7 KK	293	};
b074abb7 KK	294
b9fa3e7b	295	i2c_5: i2c@12CB0000 {
b074abb7 KK	296	compatible = "samsung,s3c2440-i2c";
	297	reg = <0x12CB0000 0x100>;
	298	interrupts = <0 61 0>;
009f7c9f TA	299	#address-cells = <1>;
009f7c9f TA	300	#size-cells = <0>;
2de6847c TA	301	clocks = <&clock 299>;
2de6847c TA	302	clock-names = "i2c";
f8bfe2b0 TA	303	pinctrl-names = "default";
f8bfe2b0 TA	304	pinctrl-0 = <&i2c5_bus>;
b074abb7 KK	305	};
b074abb7 KK	306
b9fa3e7b	307	i2c_6: i2c@12CC0000 {
b074abb7 KK	308	compatible = "samsung,s3c2440-i2c";
	309	reg = <0x12CC0000 0x100>;
	310	interrupts = <0 62 0>;
009f7c9f TA	311	#address-cells = <1>;
009f7c9f TA	312	#size-cells = <0>;
2de6847c TA	313	clocks = <&clock 300>;
2de6847c TA	314	clock-names = "i2c";
f8bfe2b0 TA	315	pinctrl-names = "default";
f8bfe2b0 TA	316	pinctrl-0 = <&i2c6_bus>;
b074abb7 KK	317	};
b074abb7 KK	318
b9fa3e7b	319	i2c_7: i2c@12CD0000 {
b074abb7 KK	320	compatible = "samsung,s3c2440-i2c";
	321	reg = <0x12CD0000 0x100>;
	322	interrupts = <0 63 0>;
009f7c9f TA	323	#address-cells = <1>;
009f7c9f TA	324	#size-cells = <0>;
2de6847c TA	325	clocks = <&clock 301>;
2de6847c TA	326	clock-names = "i2c";
f8bfe2b0 TA	327	pinctrl-names = "default";
f8bfe2b0 TA	328	pinctrl-0 = <&i2c7_bus>;
3e3e9ce4 RS	329	};
3e3e9ce4 RS	330
b9fa3e7b	331	i2c_8: i2c@12CE0000 {
3e3e9ce4 RS	332	compatible = "samsung,s3c2440-hdmiphy-i2c";
	333	reg = <0x12CE0000 0x1000>;
	334	interrupts = <0 64 0>;
	335	#address-cells = <1>;
	336	#size-cells = <0>;
2de6847c TA	337	clocks = <&clock 302>;
2de6847c TA	338	clock-names = "i2c";
24025f6f OJ	339	};
24025f6f OJ	340
c47d244a VA	341	i2c@121D0000 {
	342	compatible = "samsung,exynos5-sata-phy-i2c";
	343	reg = <0x121D0000 0x100>;
	344	#address-cells = <1>;
	345	#size-cells = <0>;
2de6847c TA	346	clocks = <&clock 288>;
2de6847c TA	347	clock-names = "i2c";
b074abb7 KK	348	};
b074abb7 KK	349
79989ba3 TA	350	spi_0: spi@12d20000 {
	351	compatible = "samsung,exynos4210-spi";
	352	reg = <0x12d20000 0x100>;
	353	interrupts = <0 66 0>;
a4a8a9d3 PV	354	dmas = <&pdma0 5
	355	&pdma0 4>;
	356	dma-names = "tx", "rx";
79989ba3 TA	357	#address-cells = <1>;
79989ba3 TA	358	#size-cells = <0>;
2de6847c TA	359	clocks = <&clock 304>, <&clock 154>;
2de6847c TA	360	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	361	pinctrl-names = "default";
f8bfe2b0 TA	362	pinctrl-0 = <&spi0_bus>;
79989ba3 TA	363	};
	364
	365	spi_1: spi@12d30000 {
	366	compatible = "samsung,exynos4210-spi";
	367	reg = <0x12d30000 0x100>;
	368	interrupts = <0 67 0>;
a4a8a9d3 PV	369	dmas = <&pdma1 5
	370	&pdma1 4>;
	371	dma-names = "tx", "rx";
79989ba3 TA	372	#address-cells = <1>;
79989ba3 TA	373	#size-cells = <0>;
2de6847c TA	374	clocks = <&clock 305>, <&clock 155>;
2de6847c TA	375	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	376	pinctrl-names = "default";
f8bfe2b0 TA	377	pinctrl-0 = <&spi1_bus>;
79989ba3 TA	378	};
	379
	380	spi_2: spi@12d40000 {
	381	compatible = "samsung,exynos4210-spi";
	382	reg = <0x12d40000 0x100>;
	383	interrupts = <0 68 0>;
a4a8a9d3 PV	384	dmas = <&pdma0 7
	385	&pdma0 6>;
	386	dma-names = "tx", "rx";
79989ba3 TA	387	#address-cells = <1>;
79989ba3 TA	388	#size-cells = <0>;
2de6847c TA	389	clocks = <&clock 306>, <&clock 156>;
2de6847c TA	390	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	391	pinctrl-names = "default";
f8bfe2b0 TA	392	pinctrl-0 = <&spi2_bus>;
79989ba3 TA	393	};
79989ba3 TA	394
de0f42be	395	dwmmc_0: dwmmc0@12200000 {
84bd48a0 TA	396	compatible = "samsung,exynos5250-dw-mshc";
	397	reg = <0x12200000 0x1000>;
	398	interrupts = <0 75 0>;
	399	#address-cells = <1>;
	400	#size-cells = <0>;
2de6847c TA	401	clocks = <&clock 280>, <&clock 139>;
2de6847c TA	402	clock-names = "biu", "ciu";
84bd48a0 TA	403	};
84bd48a0 TA	404
de0f42be	405	dwmmc_1: dwmmc1@12210000 {
84bd48a0 TA	406	compatible = "samsung,exynos5250-dw-mshc";
	407	reg = <0x12210000 0x1000>;
	408	interrupts = <0 76 0>;
	409	#address-cells = <1>;
	410	#size-cells = <0>;
2de6847c TA	411	clocks = <&clock 281>, <&clock 140>;
2de6847c TA	412	clock-names = "biu", "ciu";
84bd48a0 TA	413	};
84bd48a0 TA	414
de0f42be	415	dwmmc_2: dwmmc2@12220000 {
84bd48a0 TA	416	compatible = "samsung,exynos5250-dw-mshc";
	417	reg = <0x12220000 0x1000>;
	418	interrupts = <0 77 0>;
	419	#address-cells = <1>;
	420	#size-cells = <0>;
2de6847c TA	421	clocks = <&clock 282>, <&clock 141>;
2de6847c TA	422	clock-names = "biu", "ciu";
84bd48a0 TA	423	};
84bd48a0 TA	424
de0f42be	425	dwmmc_3: dwmmc3@12230000 {
84bd48a0 TA	426	compatible = "samsung,exynos5250-dw-mshc";
	427	reg = <0x12230000 0x1000>;
	428	interrupts = <0 78 0>;
	429	#address-cells = <1>;
	430	#size-cells = <0>;
2de6847c TA	431	clocks = <&clock 283>, <&clock 142>;
2de6847c TA	432	clock-names = "biu", "ciu";
84bd48a0 TA	433	};
84bd48a0 TA	434
28a48058	435	i2s0: i2s@03830000 {
4c4c7463 PV	436	compatible = "samsung,i2s-v5";
	437	reg = <0x03830000 0x100>;
	438	dmas = <&pdma0 10
	439	&pdma0 9
	440	&pdma0 8>;
	441	dma-names = "tx", "rx", "tx-sec";
	442	samsung,supports-6ch;
	443	samsung,supports-rstclr;
	444	samsung,supports-secdai;
	445	samsung,idma-addr = <0x03000000>;
f8bfe2b0 TA	446	pinctrl-names = "default";
f8bfe2b0 TA	447	pinctrl-0 = <&i2s0_bus>;
4c4c7463 PV	448	};
4c4c7463 PV	449
28a48058	450	i2s1: i2s@12D60000 {
4c4c7463 PV	451	compatible = "samsung,i2s-v5";
	452	reg = <0x12D60000 0x100>;
	453	dmas = <&pdma1 12
	454	&pdma1 11>;
	455	dma-names = "tx", "rx";
f8bfe2b0 TA	456	pinctrl-names = "default";
f8bfe2b0 TA	457	pinctrl-0 = <&i2s1_bus>;
4c4c7463 PV	458	};
4c4c7463 PV	459
28a48058	460	i2s2: i2s@12D70000 {
4c4c7463 PV	461	compatible = "samsung,i2s-v5";
	462	reg = <0x12D70000 0x100>;
	463	dmas = <&pdma0 12
	464	&pdma0 11>;
	465	dma-names = "tx", "rx";
f8bfe2b0 TA	466	pinctrl-names = "default";
f8bfe2b0 TA	467	pinctrl-0 = <&i2s2_bus>;
4c4c7463 PV	468	};
4c4c7463 PV	469
13cbd1e3 VG	470	usb@12110000 {
	471	compatible = "samsung,exynos4210-ehci";
	472	reg = <0x12110000 0x100>;
	473	interrupts = <0 71 0>;
	474	};
	475
7d40d867 VG	476	usb@12120000 {
	477	compatible = "samsung,exynos4210-ohci";
	478	reg = <0x12120000 0x100>;
	479	interrupts = <0 71 0>;
	480	};
	481
b074abb7 KK	482	amba {
	483	#address-cells = <1>;
	484	#size-cells = <1>;
	485	compatible = "arm,amba-bus";
	486	interrupt-parent = <&gic>;
	487	ranges;
	488
	489	pdma0: pdma@121A0000 {
	490	compatible = "arm,pl330", "arm,primecell";
	491	reg = <0x121A0000 0x1000>;
	492	interrupts = <0 34 0>;
2de6847c TA	493	clocks = <&clock 275>;
2de6847c TA	494	clock-names = "apb_pclk";
42cf2098 PV	495	#dma-cells = <1>;
	496	#dma-channels = <8>;
	497	#dma-requests = <32>;
b074abb7 KK	498	};
	499
	500	pdma1: pdma@121B0000 {
	501	compatible = "arm,pl330", "arm,primecell";
	502	reg = <0x121B0000 0x1000>;
	503	interrupts = <0 35 0>;
2de6847c TA	504	clocks = <&clock 276>;
2de6847c TA	505	clock-names = "apb_pclk";
42cf2098 PV	506	#dma-cells = <1>;
	507	#dma-channels = <8>;
	508	#dma-requests = <32>;
b074abb7 KK	509	};
b074abb7 KK	510
009f7c9f	511	mdma0: mdma@10800000 {
b074abb7 KK	512	compatible = "arm,pl330", "arm,primecell";
	513	reg = <0x10800000 0x1000>;
	514	interrupts = <0 33 0>;
2de6847c TA	515	clocks = <&clock 271>;
2de6847c TA	516	clock-names = "apb_pclk";
42cf2098 PV	517	#dma-cells = <1>;
	518	#dma-channels = <8>;
	519	#dma-requests = <1>;
b074abb7 KK	520	};
b074abb7 KK	521
009f7c9f	522	mdma1: mdma@11C10000 {
b074abb7 KK	523	compatible = "arm,pl330", "arm,primecell";
	524	reg = <0x11C10000 0x1000>;
	525	interrupts = <0 124 0>;
2de6847c TA	526	clocks = <&clock 271>;
2de6847c TA	527	clock-names = "apb_pclk";
42cf2098 PV	528	#dma-cells = <1>;
	529	#dma-channels = <8>;
	530	#dma-requests = <1>;
b074abb7 KK	531	};
	532	};
	533
1128658a SAB	534	gsc_0: gsc@0x13e00000 {
	535	compatible = "samsung,exynos5-gsc";
	536	reg = <0x13e00000 0x1000>;
	537	interrupts = <0 85 0>;
6f9e95e6	538	samsung,power-domain = <&pd_gsc>;
2de6847c TA	539	clocks = <&clock 256>;
2de6847c TA	540	clock-names = "gscl";
1128658a SAB	541	};
	542
	543	gsc_1: gsc@0x13e10000 {
	544	compatible = "samsung,exynos5-gsc";
	545	reg = <0x13e10000 0x1000>;
	546	interrupts = <0 86 0>;
6f9e95e6	547	samsung,power-domain = <&pd_gsc>;
2de6847c TA	548	clocks = <&clock 257>;
2de6847c TA	549	clock-names = "gscl";
1128658a SAB	550	};
	551
	552	gsc_2: gsc@0x13e20000 {
	553	compatible = "samsung,exynos5-gsc";
	554	reg = <0x13e20000 0x1000>;
	555	interrupts = <0 87 0>;
6f9e95e6	556	samsung,power-domain = <&pd_gsc>;
2de6847c TA	557	clocks = <&clock 258>;
2de6847c TA	558	clock-names = "gscl";
1128658a SAB	559	};
	560
	561	gsc_3: gsc@0x13e30000 {
	562	compatible = "samsung,exynos5-gsc";
	563	reg = <0x13e30000 0x1000>;
	564	interrupts = <0 88 0>;
6f9e95e6	565	samsung,power-domain = <&pd_gsc>;
2de6847c TA	566	clocks = <&clock 259>;
2de6847c TA	567	clock-names = "gscl";
1128658a	568	};
566cf8ee RS	569
	570	hdmi {
	571	compatible = "samsung,exynos5-hdmi";
101250ce	572	reg = <0x14530000 0x70000>;
566cf8ee	573	interrupts = <0 95 0>;
2de6847c TA	574	clocks = <&clock 333>, <&clock 136>, <&clock 137>,
	575	<&clock 333>, <&clock 333>;
	576	clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
	577	"sclk_hdmiphy", "hdmiphy";
566cf8ee	578	};
5af0d8a3 RS	579
	580	mixer {
	581	compatible = "samsung,exynos5-mixer";
	582	reg = <0x14450000 0x10000>;
	583	interrupts = <0 94 0>;
	584	};
ad4aebe1 JH	585
	586	dp-controller {
	587	compatible = "samsung,exynos5-dp";
	588	reg = <0x145b0000 0x1000>;
	589	interrupts = <10 3>;
	590	interrupt-parent = <&combiner>;
	591	#address-cells = <1>;
	592	#size-cells = <0>;
	593
	594	dptx-phy {
	595	reg = <0x10040720>;
	596	samsung,enable-mask = <1>;
	597	};
	598	};
b074abb7	599	};