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b074abb7 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5250 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. | |
8 | * EXYNOS5250 based board files can include this file and provide | |
9 | * values for board specfic bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, | |
13 | * additional nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
fe273c3e | 20 | #include <dt-bindings/clock/exynos5250.h> |
e6c21cba | 21 | #include "exynos5.dtsi" |
3799279f | 22 | #include "exynos5250-pinctrl.dtsi" |
b074abb7 | 23 | |
602408e3 | 24 | #include <dt-bindings/clock/exynos-audss-clk.h> |
b074abb7 KK |
25 | |
26 | / { | |
8bdb31b4 | 27 | compatible = "samsung,exynos5250", "samsung,exynos5"; |
b074abb7 | 28 | |
79989ba3 TA |
29 | aliases { |
30 | spi0 = &spi_0; | |
31 | spi1 = &spi_1; | |
32 | spi2 = &spi_2; | |
1128658a SAB |
33 | gsc0 = &gsc_0; |
34 | gsc1 = &gsc_1; | |
35 | gsc2 = &gsc_2; | |
36 | gsc3 = &gsc_3; | |
c8149df0 YK |
37 | mshc0 = &mmc_0; |
38 | mshc1 = &mmc_1; | |
39 | mshc2 = &mmc_2; | |
40 | mshc3 = &mmc_3; | |
b9fa3e7b AK |
41 | i2c0 = &i2c_0; |
42 | i2c1 = &i2c_1; | |
43 | i2c2 = &i2c_2; | |
44 | i2c3 = &i2c_3; | |
45 | i2c4 = &i2c_4; | |
46 | i2c5 = &i2c_5; | |
47 | i2c6 = &i2c_6; | |
48 | i2c7 = &i2c_7; | |
49 | i2c8 = &i2c_8; | |
ba0d7ed3 | 50 | i2c9 = &i2c_9; |
f8bfe2b0 TA |
51 | pinctrl0 = &pinctrl_0; |
52 | pinctrl1 = &pinctrl_1; | |
53 | pinctrl2 = &pinctrl_2; | |
54 | pinctrl3 = &pinctrl_3; | |
79989ba3 TA |
55 | }; |
56 | ||
1897d2f3 CK |
57 | cpus { |
58 | #address-cells = <1>; | |
59 | #size-cells = <0>; | |
60 | ||
61 | cpu@0 { | |
62 | device_type = "cpu"; | |
63 | compatible = "arm,cortex-a15"; | |
64 | reg = <0>; | |
0da80563 | 65 | clock-frequency = <1700000000>; |
1897d2f3 CK |
66 | }; |
67 | cpu@1 { | |
68 | device_type = "cpu"; | |
69 | compatible = "arm,cortex-a15"; | |
70 | reg = <1>; | |
0da80563 | 71 | clock-frequency = <1700000000>; |
1897d2f3 | 72 | }; |
79989ba3 TA |
73 | }; |
74 | ||
c31f566d | 75 | pd_gsc: gsc-power-domain@10044000 { |
6f9e95e6 PK |
76 | compatible = "samsung,exynos4210-pd"; |
77 | reg = <0x10044000 0x20>; | |
78 | }; | |
79 | ||
c31f566d | 80 | pd_mfc: mfc-power-domain@10044040 { |
6f9e95e6 PK |
81 | compatible = "samsung,exynos4210-pd"; |
82 | reg = <0x10044040 0x20>; | |
83 | }; | |
84 | ||
c31f566d | 85 | clock: clock-controller@10010000 { |
d8bafc87 TA |
86 | compatible = "samsung,exynos5250-clock"; |
87 | reg = <0x10010000 0x30000>; | |
88 | #clock-cells = <1>; | |
89 | }; | |
90 | ||
bba23d95 PV |
91 | clock_audss: audss-clock-controller@3810000 { |
92 | compatible = "samsung,exynos5250-audss-clock"; | |
93 | reg = <0x03810000 0x0C>; | |
94 | #clock-cells = <1>; | |
fe273c3e AH |
95 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, |
96 | <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>; | |
c08ceea3 | 97 | clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; |
bba23d95 PV |
98 | }; |
99 | ||
2b7da988 AG |
100 | timer { |
101 | compatible = "arm,armv7-timer"; | |
102 | interrupts = <1 13 0xf08>, | |
103 | <1 14 0xf08>, | |
104 | <1 11 0xf08>, | |
105 | <1 10 0xf08>; | |
4d594dd3 YK |
106 | /* Unfortunately we need this since some versions of U-Boot |
107 | * on Exynos don't set the CNTFRQ register, so we need the | |
108 | * value from DT. | |
109 | */ | |
110 | clock-frequency = <24000000>; | |
b074abb7 KK |
111 | }; |
112 | ||
bbd9700a TA |
113 | mct@101C0000 { |
114 | compatible = "samsung,exynos4210-mct"; | |
115 | reg = <0x101C0000 0x800>; | |
116 | interrupt-controller; | |
117 | #interrups-cells = <2>; | |
118 | interrupt-parent = <&mct_map>; | |
119 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, | |
120 | <4 0>, <5 0>; | |
fe273c3e | 121 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; |
2de6847c | 122 | clock-names = "fin_pll", "mct"; |
bbd9700a TA |
123 | |
124 | mct_map: mct-map { | |
125 | #interrupt-cells = <2>; | |
126 | #address-cells = <0>; | |
127 | #size-cells = <0>; | |
128 | interrupt-map = <0x0 0 &combiner 23 3>, | |
129 | <0x1 0 &combiner 23 4>, | |
130 | <0x2 0 &combiner 25 2>, | |
131 | <0x3 0 &combiner 25 3>, | |
132 | <0x4 0 &gic 0 120 0>, | |
133 | <0x5 0 &gic 0 121 0>; | |
134 | }; | |
135 | }; | |
136 | ||
4f801e59 CP |
137 | pmu { |
138 | compatible = "arm,cortex-a15-pmu"; | |
139 | interrupt-parent = <&combiner>; | |
140 | interrupts = <1 2>, <22 4>; | |
141 | }; | |
142 | ||
f8bfe2b0 TA |
143 | pinctrl_0: pinctrl@11400000 { |
144 | compatible = "samsung,exynos5250-pinctrl"; | |
145 | reg = <0x11400000 0x1000>; | |
146 | interrupts = <0 46 0>; | |
147 | ||
148 | wakup_eint: wakeup-interrupt-controller { | |
149 | compatible = "samsung,exynos4210-wakeup-eint"; | |
150 | interrupt-parent = <&gic>; | |
151 | interrupts = <0 32 0>; | |
152 | }; | |
153 | }; | |
154 | ||
155 | pinctrl_1: pinctrl@13400000 { | |
156 | compatible = "samsung,exynos5250-pinctrl"; | |
157 | reg = <0x13400000 0x1000>; | |
158 | interrupts = <0 45 0>; | |
159 | }; | |
160 | ||
161 | pinctrl_2: pinctrl@10d10000 { | |
162 | compatible = "samsung,exynos5250-pinctrl"; | |
163 | reg = <0x10d10000 0x1000>; | |
164 | interrupts = <0 50 0>; | |
165 | }; | |
166 | ||
0abb6aea | 167 | pinctrl_3: pinctrl@03860000 { |
f8bfe2b0 | 168 | compatible = "samsung,exynos5250-pinctrl"; |
0abb6aea | 169 | reg = <0x03860000 0x1000>; |
f8bfe2b0 TA |
170 | interrupts = <0 47 0>; |
171 | }; | |
172 | ||
c680036a LKA |
173 | pmu_system_controller: system-controller@10040000 { |
174 | compatible = "samsung,exynos5250-pmu", "syscon"; | |
175 | reg = <0x10040000 0x5000>; | |
176 | }; | |
177 | ||
1d287620 LKA |
178 | watchdog@101D0000 { |
179 | compatible = "samsung,exynos5250-wdt"; | |
180 | reg = <0x101D0000 0x100>; | |
181 | interrupts = <0 42 0>; | |
fe273c3e | 182 | clocks = <&clock CLK_WDT>; |
2de6847c | 183 | clock-names = "watchdog"; |
1d287620 | 184 | samsung,syscon-phandle = <&pmu_system_controller>; |
b074abb7 KK |
185 | }; |
186 | ||
21aa5217 SK |
187 | g2d@10850000 { |
188 | compatible = "samsung,exynos5250-g2d"; | |
189 | reg = <0x10850000 0x1000>; | |
190 | interrupts = <0 91 0>; | |
fe273c3e | 191 | clocks = <&clock CLK_G2D>; |
21aa5217 SK |
192 | clock-names = "fimg2d"; |
193 | }; | |
194 | ||
2eae613b AK |
195 | codec@11000000 { |
196 | compatible = "samsung,mfc-v6"; | |
197 | reg = <0x11000000 0x10000>; | |
198 | interrupts = <0 96 0>; | |
6f9e95e6 | 199 | samsung,power-domain = <&pd_mfc>; |
fe273c3e | 200 | clocks = <&clock CLK_MFC>; |
8b6bea33 | 201 | clock-names = "mfc"; |
2eae613b AK |
202 | }; |
203 | ||
24b44d24 | 204 | rtc@101E0000 { |
fe273c3e | 205 | clocks = <&clock CLK_RTC>; |
2de6847c | 206 | clock-names = "rtc"; |
65cedf0e | 207 | status = "disabled"; |
b074abb7 KK |
208 | }; |
209 | ||
ef405e04 ADK |
210 | tmu@10060000 { |
211 | compatible = "samsung,exynos5250-tmu"; | |
212 | reg = <0x10060000 0x100>; | |
213 | interrupts = <0 65 0>; | |
fe273c3e | 214 | clocks = <&clock CLK_TMU>; |
2de6847c | 215 | clock-names = "tmu_apbif"; |
ef405e04 ADK |
216 | }; |
217 | ||
b074abb7 | 218 | serial@12C00000 { |
fe273c3e | 219 | clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; |
2de6847c | 220 | clock-names = "uart", "clk_uart_baud0"; |
b074abb7 KK |
221 | }; |
222 | ||
223 | serial@12C10000 { | |
fe273c3e | 224 | clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; |
2de6847c | 225 | clock-names = "uart", "clk_uart_baud0"; |
b074abb7 KK |
226 | }; |
227 | ||
228 | serial@12C20000 { | |
fe273c3e | 229 | clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; |
2de6847c | 230 | clock-names = "uart", "clk_uart_baud0"; |
b074abb7 KK |
231 | }; |
232 | ||
233 | serial@12C30000 { | |
fe273c3e | 234 | clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; |
2de6847c | 235 | clock-names = "uart", "clk_uart_baud0"; |
b074abb7 KK |
236 | }; |
237 | ||
c47d244a | 238 | sata@122F0000 { |
ba0d7ed3 YK |
239 | compatible = "snps,dwc-ahci"; |
240 | samsung,sata-freq = <66>; | |
c47d244a VA |
241 | reg = <0x122F0000 0x1ff>; |
242 | interrupts = <0 115 0>; | |
fe273c3e | 243 | clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; |
2de6847c | 244 | clock-names = "sata", "sclk_sata"; |
ba0d7ed3 YK |
245 | phys = <&sata_phy>; |
246 | phy-names = "sata-phy"; | |
247 | status = "disabled"; | |
c47d244a VA |
248 | }; |
249 | ||
ba0d7ed3 YK |
250 | sata_phy: sata-phy@12170000 { |
251 | compatible = "samsung,exynos5250-sata-phy"; | |
c47d244a | 252 | reg = <0x12170000 0x1ff>; |
ba0d7ed3 YK |
253 | clocks = <&clock 287>; |
254 | clock-names = "sata_phyctrl"; | |
255 | #phy-cells = <0>; | |
256 | samsung,syscon-phandle = <&pmu_system_controller>; | |
257 | status = "disabled"; | |
c47d244a VA |
258 | }; |
259 | ||
b9fa3e7b | 260 | i2c_0: i2c@12C60000 { |
b074abb7 KK |
261 | compatible = "samsung,s3c2440-i2c"; |
262 | reg = <0x12C60000 0x100>; | |
263 | interrupts = <0 56 0>; | |
009f7c9f TA |
264 | #address-cells = <1>; |
265 | #size-cells = <0>; | |
fe273c3e | 266 | clocks = <&clock CLK_I2C0>; |
2de6847c | 267 | clock-names = "i2c"; |
f8bfe2b0 TA |
268 | pinctrl-names = "default"; |
269 | pinctrl-0 = <&i2c0_bus>; | |
6ad8ebff | 270 | status = "disabled"; |
b074abb7 KK |
271 | }; |
272 | ||
b9fa3e7b | 273 | i2c_1: i2c@12C70000 { |
b074abb7 KK |
274 | compatible = "samsung,s3c2440-i2c"; |
275 | reg = <0x12C70000 0x100>; | |
276 | interrupts = <0 57 0>; | |
009f7c9f TA |
277 | #address-cells = <1>; |
278 | #size-cells = <0>; | |
fe273c3e | 279 | clocks = <&clock CLK_I2C1>; |
2de6847c | 280 | clock-names = "i2c"; |
f8bfe2b0 TA |
281 | pinctrl-names = "default"; |
282 | pinctrl-0 = <&i2c1_bus>; | |
6ad8ebff | 283 | status = "disabled"; |
b074abb7 KK |
284 | }; |
285 | ||
b9fa3e7b | 286 | i2c_2: i2c@12C80000 { |
b074abb7 KK |
287 | compatible = "samsung,s3c2440-i2c"; |
288 | reg = <0x12C80000 0x100>; | |
289 | interrupts = <0 58 0>; | |
009f7c9f TA |
290 | #address-cells = <1>; |
291 | #size-cells = <0>; | |
fe273c3e | 292 | clocks = <&clock CLK_I2C2>; |
2de6847c | 293 | clock-names = "i2c"; |
f8bfe2b0 TA |
294 | pinctrl-names = "default"; |
295 | pinctrl-0 = <&i2c2_bus>; | |
6ad8ebff | 296 | status = "disabled"; |
b074abb7 KK |
297 | }; |
298 | ||
b9fa3e7b | 299 | i2c_3: i2c@12C90000 { |
b074abb7 KK |
300 | compatible = "samsung,s3c2440-i2c"; |
301 | reg = <0x12C90000 0x100>; | |
302 | interrupts = <0 59 0>; | |
009f7c9f TA |
303 | #address-cells = <1>; |
304 | #size-cells = <0>; | |
fe273c3e | 305 | clocks = <&clock CLK_I2C3>; |
2de6847c | 306 | clock-names = "i2c"; |
f8bfe2b0 TA |
307 | pinctrl-names = "default"; |
308 | pinctrl-0 = <&i2c3_bus>; | |
6ad8ebff | 309 | status = "disabled"; |
b074abb7 KK |
310 | }; |
311 | ||
b9fa3e7b | 312 | i2c_4: i2c@12CA0000 { |
b074abb7 KK |
313 | compatible = "samsung,s3c2440-i2c"; |
314 | reg = <0x12CA0000 0x100>; | |
315 | interrupts = <0 60 0>; | |
009f7c9f TA |
316 | #address-cells = <1>; |
317 | #size-cells = <0>; | |
fe273c3e | 318 | clocks = <&clock CLK_I2C4>; |
2de6847c | 319 | clock-names = "i2c"; |
f8bfe2b0 TA |
320 | pinctrl-names = "default"; |
321 | pinctrl-0 = <&i2c4_bus>; | |
6ad8ebff | 322 | status = "disabled"; |
b074abb7 KK |
323 | }; |
324 | ||
b9fa3e7b | 325 | i2c_5: i2c@12CB0000 { |
b074abb7 KK |
326 | compatible = "samsung,s3c2440-i2c"; |
327 | reg = <0x12CB0000 0x100>; | |
328 | interrupts = <0 61 0>; | |
009f7c9f TA |
329 | #address-cells = <1>; |
330 | #size-cells = <0>; | |
fe273c3e | 331 | clocks = <&clock CLK_I2C5>; |
2de6847c | 332 | clock-names = "i2c"; |
f8bfe2b0 TA |
333 | pinctrl-names = "default"; |
334 | pinctrl-0 = <&i2c5_bus>; | |
6ad8ebff | 335 | status = "disabled"; |
b074abb7 KK |
336 | }; |
337 | ||
b9fa3e7b | 338 | i2c_6: i2c@12CC0000 { |
b074abb7 KK |
339 | compatible = "samsung,s3c2440-i2c"; |
340 | reg = <0x12CC0000 0x100>; | |
341 | interrupts = <0 62 0>; | |
009f7c9f TA |
342 | #address-cells = <1>; |
343 | #size-cells = <0>; | |
fe273c3e | 344 | clocks = <&clock CLK_I2C6>; |
2de6847c | 345 | clock-names = "i2c"; |
f8bfe2b0 TA |
346 | pinctrl-names = "default"; |
347 | pinctrl-0 = <&i2c6_bus>; | |
6ad8ebff | 348 | status = "disabled"; |
b074abb7 KK |
349 | }; |
350 | ||
b9fa3e7b | 351 | i2c_7: i2c@12CD0000 { |
b074abb7 KK |
352 | compatible = "samsung,s3c2440-i2c"; |
353 | reg = <0x12CD0000 0x100>; | |
354 | interrupts = <0 63 0>; | |
009f7c9f TA |
355 | #address-cells = <1>; |
356 | #size-cells = <0>; | |
fe273c3e | 357 | clocks = <&clock CLK_I2C7>; |
2de6847c | 358 | clock-names = "i2c"; |
f8bfe2b0 TA |
359 | pinctrl-names = "default"; |
360 | pinctrl-0 = <&i2c7_bus>; | |
6ad8ebff | 361 | status = "disabled"; |
3e3e9ce4 RS |
362 | }; |
363 | ||
b9fa3e7b | 364 | i2c_8: i2c@12CE0000 { |
3e3e9ce4 RS |
365 | compatible = "samsung,s3c2440-hdmiphy-i2c"; |
366 | reg = <0x12CE0000 0x1000>; | |
367 | interrupts = <0 64 0>; | |
368 | #address-cells = <1>; | |
369 | #size-cells = <0>; | |
fe273c3e | 370 | clocks = <&clock CLK_I2C_HDMI>; |
2de6847c | 371 | clock-names = "i2c"; |
6ad8ebff | 372 | status = "disabled"; |
24025f6f OJ |
373 | }; |
374 | ||
ba0d7ed3 | 375 | i2c_9: i2c@121D0000 { |
c47d244a VA |
376 | compatible = "samsung,exynos5-sata-phy-i2c"; |
377 | reg = <0x121D0000 0x100>; | |
378 | #address-cells = <1>; | |
379 | #size-cells = <0>; | |
fe273c3e | 380 | clocks = <&clock CLK_SATA_PHYI2C>; |
2de6847c | 381 | clock-names = "i2c"; |
6ad8ebff | 382 | status = "disabled"; |
b074abb7 KK |
383 | }; |
384 | ||
79989ba3 TA |
385 | spi_0: spi@12d20000 { |
386 | compatible = "samsung,exynos4210-spi"; | |
fae93f7c | 387 | status = "disabled"; |
79989ba3 TA |
388 | reg = <0x12d20000 0x100>; |
389 | interrupts = <0 66 0>; | |
a4a8a9d3 PV |
390 | dmas = <&pdma0 5 |
391 | &pdma0 4>; | |
392 | dma-names = "tx", "rx"; | |
79989ba3 TA |
393 | #address-cells = <1>; |
394 | #size-cells = <0>; | |
fe273c3e | 395 | clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; |
2de6847c | 396 | clock-names = "spi", "spi_busclk0"; |
f8bfe2b0 TA |
397 | pinctrl-names = "default"; |
398 | pinctrl-0 = <&spi0_bus>; | |
79989ba3 TA |
399 | }; |
400 | ||
401 | spi_1: spi@12d30000 { | |
402 | compatible = "samsung,exynos4210-spi"; | |
fae93f7c | 403 | status = "disabled"; |
79989ba3 TA |
404 | reg = <0x12d30000 0x100>; |
405 | interrupts = <0 67 0>; | |
a4a8a9d3 PV |
406 | dmas = <&pdma1 5 |
407 | &pdma1 4>; | |
408 | dma-names = "tx", "rx"; | |
79989ba3 TA |
409 | #address-cells = <1>; |
410 | #size-cells = <0>; | |
fe273c3e | 411 | clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; |
2de6847c | 412 | clock-names = "spi", "spi_busclk0"; |
f8bfe2b0 TA |
413 | pinctrl-names = "default"; |
414 | pinctrl-0 = <&spi1_bus>; | |
79989ba3 TA |
415 | }; |
416 | ||
417 | spi_2: spi@12d40000 { | |
418 | compatible = "samsung,exynos4210-spi"; | |
fae93f7c | 419 | status = "disabled"; |
79989ba3 TA |
420 | reg = <0x12d40000 0x100>; |
421 | interrupts = <0 68 0>; | |
a4a8a9d3 PV |
422 | dmas = <&pdma0 7 |
423 | &pdma0 6>; | |
424 | dma-names = "tx", "rx"; | |
79989ba3 TA |
425 | #address-cells = <1>; |
426 | #size-cells = <0>; | |
fe273c3e | 427 | clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; |
2de6847c | 428 | clock-names = "spi", "spi_busclk0"; |
f8bfe2b0 TA |
429 | pinctrl-names = "default"; |
430 | pinctrl-0 = <&spi2_bus>; | |
79989ba3 TA |
431 | }; |
432 | ||
c8149df0 | 433 | mmc_0: mmc@12200000 { |
906fd84e YK |
434 | compatible = "samsung,exynos5250-dw-mshc"; |
435 | interrupts = <0 75 0>; | |
436 | #address-cells = <1>; | |
437 | #size-cells = <0>; | |
84bd48a0 | 438 | reg = <0x12200000 0x1000>; |
fe273c3e | 439 | clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; |
2de6847c | 440 | clock-names = "biu", "ciu"; |
46285a90 | 441 | fifo-depth = <0x80>; |
e908d5c5 | 442 | status = "disabled"; |
84bd48a0 TA |
443 | }; |
444 | ||
c8149df0 | 445 | mmc_1: mmc@12210000 { |
906fd84e YK |
446 | compatible = "samsung,exynos5250-dw-mshc"; |
447 | interrupts = <0 76 0>; | |
448 | #address-cells = <1>; | |
449 | #size-cells = <0>; | |
84bd48a0 | 450 | reg = <0x12210000 0x1000>; |
fe273c3e | 451 | clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; |
2de6847c | 452 | clock-names = "biu", "ciu"; |
46285a90 | 453 | fifo-depth = <0x80>; |
e908d5c5 | 454 | status = "disabled"; |
84bd48a0 TA |
455 | }; |
456 | ||
c8149df0 | 457 | mmc_2: mmc@12220000 { |
906fd84e YK |
458 | compatible = "samsung,exynos5250-dw-mshc"; |
459 | interrupts = <0 77 0>; | |
460 | #address-cells = <1>; | |
461 | #size-cells = <0>; | |
84bd48a0 | 462 | reg = <0x12220000 0x1000>; |
fe273c3e | 463 | clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; |
2de6847c | 464 | clock-names = "biu", "ciu"; |
46285a90 | 465 | fifo-depth = <0x80>; |
e908d5c5 | 466 | status = "disabled"; |
84bd48a0 TA |
467 | }; |
468 | ||
c8149df0 | 469 | mmc_3: mmc@12230000 { |
84bd48a0 TA |
470 | compatible = "samsung,exynos5250-dw-mshc"; |
471 | reg = <0x12230000 0x1000>; | |
472 | interrupts = <0 78 0>; | |
473 | #address-cells = <1>; | |
474 | #size-cells = <0>; | |
fe273c3e | 475 | clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; |
2de6847c | 476 | clock-names = "biu", "ciu"; |
46285a90 | 477 | fifo-depth = <0x80>; |
e908d5c5 | 478 | status = "disabled"; |
84bd48a0 TA |
479 | }; |
480 | ||
28a48058 | 481 | i2s0: i2s@03830000 { |
64183656 | 482 | compatible = "samsung,s5pv210-i2s"; |
328aee4b | 483 | status = "disabled"; |
a0b5f81e | 484 | reg = <0x03830000 0x100>; |
4c4c7463 PV |
485 | dmas = <&pdma0 10 |
486 | &pdma0 9 | |
487 | &pdma0 8>; | |
488 | dma-names = "tx", "rx", "tx-sec"; | |
916ec47e PV |
489 | clocks = <&clock_audss EXYNOS_I2S_BUS>, |
490 | <&clock_audss EXYNOS_I2S_BUS>, | |
491 | <&clock_audss EXYNOS_SCLK_I2S>; | |
492 | clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; | |
a0b5f81e | 493 | samsung,idma-addr = <0x03000000>; |
f8bfe2b0 TA |
494 | pinctrl-names = "default"; |
495 | pinctrl-0 = <&i2s0_bus>; | |
4c4c7463 PV |
496 | }; |
497 | ||
28a48058 | 498 | i2s1: i2s@12D60000 { |
64183656 | 499 | compatible = "samsung,s3c6410-i2s"; |
328aee4b | 500 | status = "disabled"; |
a0b5f81e MB |
501 | reg = <0x12D60000 0x100>; |
502 | dmas = <&pdma1 12 | |
503 | &pdma1 11>; | |
504 | dma-names = "tx", "rx"; | |
fe273c3e | 505 | clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>; |
916ec47e | 506 | clock-names = "iis", "i2s_opclk0"; |
f8bfe2b0 TA |
507 | pinctrl-names = "default"; |
508 | pinctrl-0 = <&i2s1_bus>; | |
4c4c7463 PV |
509 | }; |
510 | ||
28a48058 | 511 | i2s2: i2s@12D70000 { |
64183656 | 512 | compatible = "samsung,s3c6410-i2s"; |
328aee4b | 513 | status = "disabled"; |
a0b5f81e MB |
514 | reg = <0x12D70000 0x100>; |
515 | dmas = <&pdma0 12 | |
516 | &pdma0 11>; | |
517 | dma-names = "tx", "rx"; | |
fe273c3e | 518 | clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>; |
916ec47e | 519 | clock-names = "iis", "i2s_opclk0"; |
f8bfe2b0 TA |
520 | pinctrl-names = "default"; |
521 | pinctrl-0 = <&i2s2_bus>; | |
4c4c7463 PV |
522 | }; |
523 | ||
0b3dc97e VG |
524 | usb@12000000 { |
525 | compatible = "samsung,exynos5250-dwusb3"; | |
fe273c3e | 526 | clocks = <&clock CLK_USB3>; |
0b3dc97e VG |
527 | clock-names = "usbdrd30"; |
528 | #address-cells = <1>; | |
529 | #size-cells = <1>; | |
530 | ranges; | |
531 | ||
532 | dwc3 { | |
533 | compatible = "synopsys,dwc3"; | |
534 | reg = <0x12000000 0x10000>; | |
535 | interrupts = <0 72 0>; | |
536 | usb-phy = <&usb2_phy &usb3_phy>; | |
537 | }; | |
538 | }; | |
539 | ||
540 | usb3_phy: usbphy@12100000 { | |
896db3b3 VG |
541 | compatible = "samsung,exynos5250-usb3phy"; |
542 | reg = <0x12100000 0x100>; | |
fe273c3e | 543 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>; |
896db3b3 VG |
544 | clock-names = "ext_xtal", "usbdrd30"; |
545 | #address-cells = <1>; | |
546 | #size-cells = <1>; | |
547 | ranges; | |
548 | ||
549 | usbphy-sys { | |
550 | reg = <0x10040704 0x8>; | |
551 | }; | |
552 | }; | |
553 | ||
13cbd1e3 VG |
554 | usb@12110000 { |
555 | compatible = "samsung,exynos4210-ehci"; | |
556 | reg = <0x12110000 0x100>; | |
557 | interrupts = <0 71 0>; | |
b3cd7d87 | 558 | |
fe273c3e | 559 | clocks = <&clock CLK_USB2>; |
b3cd7d87 | 560 | clock-names = "usbhost"; |
13cbd1e3 VG |
561 | }; |
562 | ||
7d40d867 VG |
563 | usb@12120000 { |
564 | compatible = "samsung,exynos4210-ohci"; | |
565 | reg = <0x12120000 0x100>; | |
566 | interrupts = <0 71 0>; | |
b3cd7d87 | 567 | |
fe273c3e | 568 | clocks = <&clock CLK_USB2>; |
b3cd7d87 | 569 | clock-names = "usbhost"; |
7d40d867 VG |
570 | }; |
571 | ||
0b3dc97e | 572 | usb2_phy: usbphy@12130000 { |
7ec892ef VG |
573 | compatible = "samsung,exynos5250-usb2phy"; |
574 | reg = <0x12130000 0x100>; | |
fe273c3e | 575 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB2>; |
7ec892ef VG |
576 | clock-names = "ext_xtal", "usbhost"; |
577 | #address-cells = <1>; | |
578 | #size-cells = <1>; | |
579 | ranges; | |
580 | ||
581 | usbphy-sys { | |
582 | reg = <0x10040704 0x8>, | |
583 | <0x10050230 0x4>; | |
584 | }; | |
585 | }; | |
586 | ||
022cf308 LKA |
587 | pwm: pwm@12dd0000 { |
588 | compatible = "samsung,exynos4210-pwm"; | |
589 | reg = <0x12dd0000 0x100>; | |
590 | samsung,pwm-outputs = <0>, <1>, <2>, <3>; | |
591 | #pwm-cells = <3>; | |
fe273c3e | 592 | clocks = <&clock CLK_PWM>; |
022cf308 LKA |
593 | clock-names = "timers"; |
594 | }; | |
595 | ||
b074abb7 KK |
596 | amba { |
597 | #address-cells = <1>; | |
598 | #size-cells = <1>; | |
599 | compatible = "arm,amba-bus"; | |
600 | interrupt-parent = <&gic>; | |
601 | ranges; | |
602 | ||
603 | pdma0: pdma@121A0000 { | |
604 | compatible = "arm,pl330", "arm,primecell"; | |
605 | reg = <0x121A0000 0x1000>; | |
606 | interrupts = <0 34 0>; | |
fe273c3e | 607 | clocks = <&clock CLK_PDMA0>; |
2de6847c | 608 | clock-names = "apb_pclk"; |
42cf2098 PV |
609 | #dma-cells = <1>; |
610 | #dma-channels = <8>; | |
611 | #dma-requests = <32>; | |
b074abb7 KK |
612 | }; |
613 | ||
614 | pdma1: pdma@121B0000 { | |
615 | compatible = "arm,pl330", "arm,primecell"; | |
616 | reg = <0x121B0000 0x1000>; | |
617 | interrupts = <0 35 0>; | |
fe273c3e | 618 | clocks = <&clock CLK_PDMA1>; |
2de6847c | 619 | clock-names = "apb_pclk"; |
42cf2098 PV |
620 | #dma-cells = <1>; |
621 | #dma-channels = <8>; | |
622 | #dma-requests = <32>; | |
b074abb7 KK |
623 | }; |
624 | ||
009f7c9f | 625 | mdma0: mdma@10800000 { |
b074abb7 KK |
626 | compatible = "arm,pl330", "arm,primecell"; |
627 | reg = <0x10800000 0x1000>; | |
628 | interrupts = <0 33 0>; | |
fe273c3e | 629 | clocks = <&clock CLK_MDMA0>; |
2de6847c | 630 | clock-names = "apb_pclk"; |
42cf2098 PV |
631 | #dma-cells = <1>; |
632 | #dma-channels = <8>; | |
633 | #dma-requests = <1>; | |
b074abb7 KK |
634 | }; |
635 | ||
009f7c9f | 636 | mdma1: mdma@11C10000 { |
b074abb7 KK |
637 | compatible = "arm,pl330", "arm,primecell"; |
638 | reg = <0x11C10000 0x1000>; | |
639 | interrupts = <0 124 0>; | |
fe273c3e | 640 | clocks = <&clock CLK_MDMA1>; |
2de6847c | 641 | clock-names = "apb_pclk"; |
42cf2098 PV |
642 | #dma-cells = <1>; |
643 | #dma-channels = <8>; | |
644 | #dma-requests = <1>; | |
b074abb7 KK |
645 | }; |
646 | }; | |
647 | ||
c31f566d | 648 | gsc_0: gsc@13e00000 { |
1128658a SAB |
649 | compatible = "samsung,exynos5-gsc"; |
650 | reg = <0x13e00000 0x1000>; | |
651 | interrupts = <0 85 0>; | |
6f9e95e6 | 652 | samsung,power-domain = <&pd_gsc>; |
fe273c3e | 653 | clocks = <&clock CLK_GSCL0>; |
2de6847c | 654 | clock-names = "gscl"; |
1128658a SAB |
655 | }; |
656 | ||
c31f566d | 657 | gsc_1: gsc@13e10000 { |
1128658a SAB |
658 | compatible = "samsung,exynos5-gsc"; |
659 | reg = <0x13e10000 0x1000>; | |
660 | interrupts = <0 86 0>; | |
6f9e95e6 | 661 | samsung,power-domain = <&pd_gsc>; |
fe273c3e | 662 | clocks = <&clock CLK_GSCL1>; |
2de6847c | 663 | clock-names = "gscl"; |
1128658a SAB |
664 | }; |
665 | ||
c31f566d | 666 | gsc_2: gsc@13e20000 { |
1128658a SAB |
667 | compatible = "samsung,exynos5-gsc"; |
668 | reg = <0x13e20000 0x1000>; | |
669 | interrupts = <0 87 0>; | |
6f9e95e6 | 670 | samsung,power-domain = <&pd_gsc>; |
fe273c3e | 671 | clocks = <&clock CLK_GSCL2>; |
2de6847c | 672 | clock-names = "gscl"; |
1128658a SAB |
673 | }; |
674 | ||
c31f566d | 675 | gsc_3: gsc@13e30000 { |
1128658a SAB |
676 | compatible = "samsung,exynos5-gsc"; |
677 | reg = <0x13e30000 0x1000>; | |
678 | interrupts = <0 88 0>; | |
6f9e95e6 | 679 | samsung,power-domain = <&pd_gsc>; |
fe273c3e | 680 | clocks = <&clock CLK_GSCL3>; |
2de6847c | 681 | clock-names = "gscl"; |
1128658a | 682 | }; |
566cf8ee RS |
683 | |
684 | hdmi { | |
0d1fc829 | 685 | compatible = "samsung,exynos4212-hdmi"; |
101250ce | 686 | reg = <0x14530000 0x70000>; |
566cf8ee | 687 | interrupts = <0 95 0>; |
fe273c3e AH |
688 | clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, |
689 | <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, | |
690 | <&clock CLK_MOUT_HDMI>; | |
2de6847c | 691 | clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", |
27c16d19 | 692 | "sclk_hdmiphy", "mout_hdmi"; |
566cf8ee | 693 | }; |
5af0d8a3 RS |
694 | |
695 | mixer { | |
0d1fc829 | 696 | compatible = "samsung,exynos5250-mixer"; |
5af0d8a3 RS |
697 | reg = <0x14450000 0x10000>; |
698 | interrupts = <0 94 0>; | |
fe273c3e | 699 | clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; |
18fe6ef0 | 700 | clock-names = "mixer", "sclk_hdmi"; |
5af0d8a3 | 701 | }; |
ad4aebe1 | 702 | |
77899d53 VS |
703 | dp_phy: video-phy@10040720 { |
704 | compatible = "samsung,exynos5250-dp-video-phy"; | |
705 | reg = <0x10040720 4>; | |
706 | #phy-cells = <0>; | |
707 | }; | |
708 | ||
709 | dp-controller@145B0000 { | |
fe273c3e | 710 | clocks = <&clock CLK_DP>; |
0f72a9ec | 711 | clock-names = "dp"; |
77899d53 VS |
712 | phys = <&dp_phy>; |
713 | phy-names = "dp"; | |
ad4aebe1 | 714 | }; |
a7389cb1 | 715 | |
9ee35a5b | 716 | fimd@14400000 { |
fe273c3e | 717 | clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; |
a7389cb1 LKA |
718 | clock-names = "sclk_fimd", "fimd"; |
719 | }; | |
f408f9db NKC |
720 | |
721 | adc: adc@12D10000 { | |
722 | compatible = "samsung,exynos-adc-v1"; | |
723 | reg = <0x12D10000 0x100>, <0x10040718 0x4>; | |
724 | interrupts = <0 106 0>; | |
fe273c3e | 725 | clocks = <&clock CLK_ADC>; |
f408f9db NKC |
726 | clock-names = "adc"; |
727 | #io-channel-cells = <1>; | |
728 | io-channel-ranges; | |
729 | status = "disabled"; | |
730 | }; | |
183af252 NKC |
731 | |
732 | sss@10830000 { | |
733 | compatible = "samsung,exynos4210-secss"; | |
734 | reg = <0x10830000 0x10000>; | |
735 | interrupts = <0 112 0>; | |
736 | clocks = <&clock 348>; | |
737 | clock-names = "secss"; | |
738 | }; | |
b074abb7 | 739 | }; |