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b074abb7 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5250 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. | |
8 | * EXYNOS5250 based board files can include this file and provide | |
9 | * values for board specfic bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, | |
13 | * additional nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
20 | /include/ "skeleton.dtsi" | |
f8bfe2b0 | 21 | /include/ "exynos5250-pinctrl.dtsi" |
b074abb7 KK |
22 | |
23 | / { | |
24 | compatible = "samsung,exynos5250"; | |
25 | interrupt-parent = <&gic>; | |
26 | ||
79989ba3 TA |
27 | aliases { |
28 | spi0 = &spi_0; | |
29 | spi1 = &spi_1; | |
30 | spi2 = &spi_2; | |
1128658a SAB |
31 | gsc0 = &gsc_0; |
32 | gsc1 = &gsc_1; | |
33 | gsc2 = &gsc_2; | |
34 | gsc3 = &gsc_3; | |
de0f42be DA |
35 | mshc0 = &dwmmc_0; |
36 | mshc1 = &dwmmc_1; | |
37 | mshc2 = &dwmmc_2; | |
38 | mshc3 = &dwmmc_3; | |
b9fa3e7b AK |
39 | i2c0 = &i2c_0; |
40 | i2c1 = &i2c_1; | |
41 | i2c2 = &i2c_2; | |
42 | i2c3 = &i2c_3; | |
43 | i2c4 = &i2c_4; | |
44 | i2c5 = &i2c_5; | |
45 | i2c6 = &i2c_6; | |
46 | i2c7 = &i2c_7; | |
47 | i2c8 = &i2c_8; | |
f8bfe2b0 TA |
48 | pinctrl0 = &pinctrl_0; |
49 | pinctrl1 = &pinctrl_1; | |
50 | pinctrl2 = &pinctrl_2; | |
51 | pinctrl3 = &pinctrl_3; | |
79989ba3 TA |
52 | }; |
53 | ||
6f9e95e6 PK |
54 | pd_gsc: gsc-power-domain@0x10044000 { |
55 | compatible = "samsung,exynos4210-pd"; | |
56 | reg = <0x10044000 0x20>; | |
57 | }; | |
58 | ||
59 | pd_mfc: mfc-power-domain@0x10044040 { | |
60 | compatible = "samsung,exynos4210-pd"; | |
61 | reg = <0x10044040 0x20>; | |
62 | }; | |
63 | ||
d8bafc87 TA |
64 | clock: clock-controller@0x10010000 { |
65 | compatible = "samsung,exynos5250-clock"; | |
66 | reg = <0x10010000 0x30000>; | |
67 | #clock-cells = <1>; | |
68 | }; | |
69 | ||
009f7c9f | 70 | gic:interrupt-controller@10481000 { |
849ff89b | 71 | compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; |
b074abb7 KK |
72 | #interrupt-cells = <3>; |
73 | interrupt-controller; | |
849ff89b AG |
74 | reg = <0x10481000 0x1000>, |
75 | <0x10482000 0x1000>, | |
76 | <0x10484000 0x2000>, | |
77 | <0x10486000 0x2000>; | |
78 | interrupts = <1 9 0xf04>; | |
b074abb7 KK |
79 | }; |
80 | ||
fe84cdf6 TA |
81 | combiner:interrupt-controller@10440000 { |
82 | compatible = "samsung,exynos4210-combiner"; | |
83 | #interrupt-cells = <2>; | |
84 | interrupt-controller; | |
85 | samsung,combiner-nr = <32>; | |
86 | reg = <0x10440000 0x1000>; | |
87 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | |
88 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | |
89 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | |
90 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, | |
91 | <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | |
92 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, | |
93 | <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | |
94 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | |
95 | }; | |
96 | ||
bbd9700a TA |
97 | mct@101C0000 { |
98 | compatible = "samsung,exynos4210-mct"; | |
99 | reg = <0x101C0000 0x800>; | |
100 | interrupt-controller; | |
101 | #interrups-cells = <2>; | |
102 | interrupt-parent = <&mct_map>; | |
103 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, | |
104 | <4 0>, <5 0>; | |
2de6847c TA |
105 | clocks = <&clock 1>, <&clock 335>; |
106 | clock-names = "fin_pll", "mct"; | |
bbd9700a TA |
107 | |
108 | mct_map: mct-map { | |
109 | #interrupt-cells = <2>; | |
110 | #address-cells = <0>; | |
111 | #size-cells = <0>; | |
112 | interrupt-map = <0x0 0 &combiner 23 3>, | |
113 | <0x1 0 &combiner 23 4>, | |
114 | <0x2 0 &combiner 25 2>, | |
115 | <0x3 0 &combiner 25 3>, | |
116 | <0x4 0 &gic 0 120 0>, | |
117 | <0x5 0 &gic 0 121 0>; | |
118 | }; | |
119 | }; | |
120 | ||
f8bfe2b0 TA |
121 | pinctrl_0: pinctrl@11400000 { |
122 | compatible = "samsung,exynos5250-pinctrl"; | |
123 | reg = <0x11400000 0x1000>; | |
124 | interrupts = <0 46 0>; | |
125 | ||
126 | wakup_eint: wakeup-interrupt-controller { | |
127 | compatible = "samsung,exynos4210-wakeup-eint"; | |
128 | interrupt-parent = <&gic>; | |
129 | interrupts = <0 32 0>; | |
130 | }; | |
131 | }; | |
132 | ||
133 | pinctrl_1: pinctrl@13400000 { | |
134 | compatible = "samsung,exynos5250-pinctrl"; | |
135 | reg = <0x13400000 0x1000>; | |
136 | interrupts = <0 45 0>; | |
137 | }; | |
138 | ||
139 | pinctrl_2: pinctrl@10d10000 { | |
140 | compatible = "samsung,exynos5250-pinctrl"; | |
141 | reg = <0x10d10000 0x1000>; | |
142 | interrupts = <0 50 0>; | |
143 | }; | |
144 | ||
145 | pinctrl_3: pinctrl@03680000 { | |
146 | compatible = "samsung,exynos5250-pinctrl"; | |
147 | reg = <0x0368000 0x1000>; | |
148 | interrupts = <0 47 0>; | |
149 | }; | |
150 | ||
b074abb7 KK |
151 | watchdog { |
152 | compatible = "samsung,s3c2410-wdt"; | |
153 | reg = <0x101D0000 0x100>; | |
154 | interrupts = <0 42 0>; | |
2de6847c TA |
155 | clocks = <&clock 336>; |
156 | clock-names = "watchdog"; | |
b074abb7 KK |
157 | }; |
158 | ||
2eae613b AK |
159 | codec@11000000 { |
160 | compatible = "samsung,mfc-v6"; | |
161 | reg = <0x11000000 0x10000>; | |
162 | interrupts = <0 96 0>; | |
6f9e95e6 | 163 | samsung,power-domain = <&pd_mfc>; |
2eae613b AK |
164 | }; |
165 | ||
b074abb7 KK |
166 | rtc { |
167 | compatible = "samsung,s3c6410-rtc"; | |
168 | reg = <0x101E0000 0x100>; | |
169 | interrupts = <0 43 0>, <0 44 0>; | |
2de6847c TA |
170 | clocks = <&clock 337>; |
171 | clock-names = "rtc"; | |
b074abb7 KK |
172 | }; |
173 | ||
ef405e04 ADK |
174 | tmu@10060000 { |
175 | compatible = "samsung,exynos5250-tmu"; | |
176 | reg = <0x10060000 0x100>; | |
177 | interrupts = <0 65 0>; | |
2de6847c TA |
178 | clocks = <&clock 338>; |
179 | clock-names = "tmu_apbif"; | |
ef405e04 ADK |
180 | }; |
181 | ||
b074abb7 KK |
182 | serial@12C00000 { |
183 | compatible = "samsung,exynos4210-uart"; | |
184 | reg = <0x12C00000 0x100>; | |
185 | interrupts = <0 51 0>; | |
2de6847c TA |
186 | clocks = <&clock 289>, <&clock 146>; |
187 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
188 | }; |
189 | ||
190 | serial@12C10000 { | |
191 | compatible = "samsung,exynos4210-uart"; | |
192 | reg = <0x12C10000 0x100>; | |
193 | interrupts = <0 52 0>; | |
2de6847c TA |
194 | clocks = <&clock 290>, <&clock 147>; |
195 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
196 | }; |
197 | ||
198 | serial@12C20000 { | |
199 | compatible = "samsung,exynos4210-uart"; | |
200 | reg = <0x12C20000 0x100>; | |
201 | interrupts = <0 53 0>; | |
2de6847c TA |
202 | clocks = <&clock 291>, <&clock 148>; |
203 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
204 | }; |
205 | ||
206 | serial@12C30000 { | |
207 | compatible = "samsung,exynos4210-uart"; | |
208 | reg = <0x12C30000 0x100>; | |
209 | interrupts = <0 54 0>; | |
2de6847c TA |
210 | clocks = <&clock 292>, <&clock 149>; |
211 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
212 | }; |
213 | ||
c47d244a VA |
214 | sata@122F0000 { |
215 | compatible = "samsung,exynos5-sata-ahci"; | |
216 | reg = <0x122F0000 0x1ff>; | |
217 | interrupts = <0 115 0>; | |
2de6847c TA |
218 | clocks = <&clock 277>, <&clock 143>; |
219 | clock-names = "sata", "sclk_sata"; | |
c47d244a VA |
220 | }; |
221 | ||
222 | sata-phy@12170000 { | |
223 | compatible = "samsung,exynos5-sata-phy"; | |
224 | reg = <0x12170000 0x1ff>; | |
225 | }; | |
226 | ||
b9fa3e7b | 227 | i2c_0: i2c@12C60000 { |
b074abb7 KK |
228 | compatible = "samsung,s3c2440-i2c"; |
229 | reg = <0x12C60000 0x100>; | |
230 | interrupts = <0 56 0>; | |
009f7c9f TA |
231 | #address-cells = <1>; |
232 | #size-cells = <0>; | |
2de6847c TA |
233 | clocks = <&clock 294>; |
234 | clock-names = "i2c"; | |
f8bfe2b0 TA |
235 | pinctrl-names = "default"; |
236 | pinctrl-0 = <&i2c0_bus>; | |
b074abb7 KK |
237 | }; |
238 | ||
b9fa3e7b | 239 | i2c_1: i2c@12C70000 { |
b074abb7 KK |
240 | compatible = "samsung,s3c2440-i2c"; |
241 | reg = <0x12C70000 0x100>; | |
242 | interrupts = <0 57 0>; | |
009f7c9f TA |
243 | #address-cells = <1>; |
244 | #size-cells = <0>; | |
2de6847c TA |
245 | clocks = <&clock 295>; |
246 | clock-names = "i2c"; | |
f8bfe2b0 TA |
247 | pinctrl-names = "default"; |
248 | pinctrl-0 = <&i2c1_bus>; | |
b074abb7 KK |
249 | }; |
250 | ||
b9fa3e7b | 251 | i2c_2: i2c@12C80000 { |
b074abb7 KK |
252 | compatible = "samsung,s3c2440-i2c"; |
253 | reg = <0x12C80000 0x100>; | |
254 | interrupts = <0 58 0>; | |
009f7c9f TA |
255 | #address-cells = <1>; |
256 | #size-cells = <0>; | |
2de6847c TA |
257 | clocks = <&clock 296>; |
258 | clock-names = "i2c"; | |
f8bfe2b0 TA |
259 | pinctrl-names = "default"; |
260 | pinctrl-0 = <&i2c2_bus>; | |
b074abb7 KK |
261 | }; |
262 | ||
b9fa3e7b | 263 | i2c_3: i2c@12C90000 { |
b074abb7 KK |
264 | compatible = "samsung,s3c2440-i2c"; |
265 | reg = <0x12C90000 0x100>; | |
266 | interrupts = <0 59 0>; | |
009f7c9f TA |
267 | #address-cells = <1>; |
268 | #size-cells = <0>; | |
2de6847c TA |
269 | clocks = <&clock 297>; |
270 | clock-names = "i2c"; | |
f8bfe2b0 TA |
271 | pinctrl-names = "default"; |
272 | pinctrl-0 = <&i2c3_bus>; | |
b074abb7 KK |
273 | }; |
274 | ||
b9fa3e7b | 275 | i2c_4: i2c@12CA0000 { |
b074abb7 KK |
276 | compatible = "samsung,s3c2440-i2c"; |
277 | reg = <0x12CA0000 0x100>; | |
278 | interrupts = <0 60 0>; | |
009f7c9f TA |
279 | #address-cells = <1>; |
280 | #size-cells = <0>; | |
2de6847c TA |
281 | clocks = <&clock 298>; |
282 | clock-names = "i2c"; | |
f8bfe2b0 TA |
283 | pinctrl-names = "default"; |
284 | pinctrl-0 = <&i2c4_bus>; | |
b074abb7 KK |
285 | }; |
286 | ||
b9fa3e7b | 287 | i2c_5: i2c@12CB0000 { |
b074abb7 KK |
288 | compatible = "samsung,s3c2440-i2c"; |
289 | reg = <0x12CB0000 0x100>; | |
290 | interrupts = <0 61 0>; | |
009f7c9f TA |
291 | #address-cells = <1>; |
292 | #size-cells = <0>; | |
2de6847c TA |
293 | clocks = <&clock 299>; |
294 | clock-names = "i2c"; | |
f8bfe2b0 TA |
295 | pinctrl-names = "default"; |
296 | pinctrl-0 = <&i2c5_bus>; | |
b074abb7 KK |
297 | }; |
298 | ||
b9fa3e7b | 299 | i2c_6: i2c@12CC0000 { |
b074abb7 KK |
300 | compatible = "samsung,s3c2440-i2c"; |
301 | reg = <0x12CC0000 0x100>; | |
302 | interrupts = <0 62 0>; | |
009f7c9f TA |
303 | #address-cells = <1>; |
304 | #size-cells = <0>; | |
2de6847c TA |
305 | clocks = <&clock 300>; |
306 | clock-names = "i2c"; | |
f8bfe2b0 TA |
307 | pinctrl-names = "default"; |
308 | pinctrl-0 = <&i2c6_bus>; | |
b074abb7 KK |
309 | }; |
310 | ||
b9fa3e7b | 311 | i2c_7: i2c@12CD0000 { |
b074abb7 KK |
312 | compatible = "samsung,s3c2440-i2c"; |
313 | reg = <0x12CD0000 0x100>; | |
314 | interrupts = <0 63 0>; | |
009f7c9f TA |
315 | #address-cells = <1>; |
316 | #size-cells = <0>; | |
2de6847c TA |
317 | clocks = <&clock 301>; |
318 | clock-names = "i2c"; | |
f8bfe2b0 TA |
319 | pinctrl-names = "default"; |
320 | pinctrl-0 = <&i2c7_bus>; | |
3e3e9ce4 RS |
321 | }; |
322 | ||
b9fa3e7b | 323 | i2c_8: i2c@12CE0000 { |
3e3e9ce4 RS |
324 | compatible = "samsung,s3c2440-hdmiphy-i2c"; |
325 | reg = <0x12CE0000 0x1000>; | |
326 | interrupts = <0 64 0>; | |
327 | #address-cells = <1>; | |
328 | #size-cells = <0>; | |
2de6847c TA |
329 | clocks = <&clock 302>; |
330 | clock-names = "i2c"; | |
24025f6f OJ |
331 | }; |
332 | ||
c47d244a VA |
333 | i2c@121D0000 { |
334 | compatible = "samsung,exynos5-sata-phy-i2c"; | |
335 | reg = <0x121D0000 0x100>; | |
336 | #address-cells = <1>; | |
337 | #size-cells = <0>; | |
2de6847c TA |
338 | clocks = <&clock 288>; |
339 | clock-names = "i2c"; | |
b074abb7 KK |
340 | }; |
341 | ||
79989ba3 TA |
342 | spi_0: spi@12d20000 { |
343 | compatible = "samsung,exynos4210-spi"; | |
344 | reg = <0x12d20000 0x100>; | |
345 | interrupts = <0 66 0>; | |
a4a8a9d3 PV |
346 | dmas = <&pdma0 5 |
347 | &pdma0 4>; | |
348 | dma-names = "tx", "rx"; | |
79989ba3 TA |
349 | #address-cells = <1>; |
350 | #size-cells = <0>; | |
2de6847c TA |
351 | clocks = <&clock 304>, <&clock 154>; |
352 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
353 | pinctrl-names = "default"; |
354 | pinctrl-0 = <&spi0_bus>; | |
79989ba3 TA |
355 | }; |
356 | ||
357 | spi_1: spi@12d30000 { | |
358 | compatible = "samsung,exynos4210-spi"; | |
359 | reg = <0x12d30000 0x100>; | |
360 | interrupts = <0 67 0>; | |
a4a8a9d3 PV |
361 | dmas = <&pdma1 5 |
362 | &pdma1 4>; | |
363 | dma-names = "tx", "rx"; | |
79989ba3 TA |
364 | #address-cells = <1>; |
365 | #size-cells = <0>; | |
2de6847c TA |
366 | clocks = <&clock 305>, <&clock 155>; |
367 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
368 | pinctrl-names = "default"; |
369 | pinctrl-0 = <&spi1_bus>; | |
79989ba3 TA |
370 | }; |
371 | ||
372 | spi_2: spi@12d40000 { | |
373 | compatible = "samsung,exynos4210-spi"; | |
374 | reg = <0x12d40000 0x100>; | |
375 | interrupts = <0 68 0>; | |
a4a8a9d3 PV |
376 | dmas = <&pdma0 7 |
377 | &pdma0 6>; | |
378 | dma-names = "tx", "rx"; | |
79989ba3 TA |
379 | #address-cells = <1>; |
380 | #size-cells = <0>; | |
2de6847c TA |
381 | clocks = <&clock 306>, <&clock 156>; |
382 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
383 | pinctrl-names = "default"; |
384 | pinctrl-0 = <&spi2_bus>; | |
79989ba3 TA |
385 | }; |
386 | ||
de0f42be | 387 | dwmmc_0: dwmmc0@12200000 { |
84bd48a0 TA |
388 | compatible = "samsung,exynos5250-dw-mshc"; |
389 | reg = <0x12200000 0x1000>; | |
390 | interrupts = <0 75 0>; | |
391 | #address-cells = <1>; | |
392 | #size-cells = <0>; | |
2de6847c TA |
393 | clocks = <&clock 280>, <&clock 139>; |
394 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
395 | }; |
396 | ||
de0f42be | 397 | dwmmc_1: dwmmc1@12210000 { |
84bd48a0 TA |
398 | compatible = "samsung,exynos5250-dw-mshc"; |
399 | reg = <0x12210000 0x1000>; | |
400 | interrupts = <0 76 0>; | |
401 | #address-cells = <1>; | |
402 | #size-cells = <0>; | |
2de6847c TA |
403 | clocks = <&clock 281>, <&clock 140>; |
404 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
405 | }; |
406 | ||
de0f42be | 407 | dwmmc_2: dwmmc2@12220000 { |
84bd48a0 TA |
408 | compatible = "samsung,exynos5250-dw-mshc"; |
409 | reg = <0x12220000 0x1000>; | |
410 | interrupts = <0 77 0>; | |
411 | #address-cells = <1>; | |
412 | #size-cells = <0>; | |
2de6847c TA |
413 | clocks = <&clock 282>, <&clock 141>; |
414 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
415 | }; |
416 | ||
de0f42be | 417 | dwmmc_3: dwmmc3@12230000 { |
84bd48a0 TA |
418 | compatible = "samsung,exynos5250-dw-mshc"; |
419 | reg = <0x12230000 0x1000>; | |
420 | interrupts = <0 78 0>; | |
421 | #address-cells = <1>; | |
422 | #size-cells = <0>; | |
2de6847c TA |
423 | clocks = <&clock 283>, <&clock 142>; |
424 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
425 | }; |
426 | ||
28a48058 | 427 | i2s0: i2s@03830000 { |
4c4c7463 PV |
428 | compatible = "samsung,i2s-v5"; |
429 | reg = <0x03830000 0x100>; | |
430 | dmas = <&pdma0 10 | |
431 | &pdma0 9 | |
432 | &pdma0 8>; | |
433 | dma-names = "tx", "rx", "tx-sec"; | |
434 | samsung,supports-6ch; | |
435 | samsung,supports-rstclr; | |
436 | samsung,supports-secdai; | |
437 | samsung,idma-addr = <0x03000000>; | |
f8bfe2b0 TA |
438 | pinctrl-names = "default"; |
439 | pinctrl-0 = <&i2s0_bus>; | |
4c4c7463 PV |
440 | }; |
441 | ||
28a48058 | 442 | i2s1: i2s@12D60000 { |
4c4c7463 PV |
443 | compatible = "samsung,i2s-v5"; |
444 | reg = <0x12D60000 0x100>; | |
445 | dmas = <&pdma1 12 | |
446 | &pdma1 11>; | |
447 | dma-names = "tx", "rx"; | |
f8bfe2b0 TA |
448 | pinctrl-names = "default"; |
449 | pinctrl-0 = <&i2s1_bus>; | |
4c4c7463 PV |
450 | }; |
451 | ||
28a48058 | 452 | i2s2: i2s@12D70000 { |
4c4c7463 PV |
453 | compatible = "samsung,i2s-v5"; |
454 | reg = <0x12D70000 0x100>; | |
455 | dmas = <&pdma0 12 | |
456 | &pdma0 11>; | |
457 | dma-names = "tx", "rx"; | |
f8bfe2b0 TA |
458 | pinctrl-names = "default"; |
459 | pinctrl-0 = <&i2s2_bus>; | |
4c4c7463 PV |
460 | }; |
461 | ||
13cbd1e3 VG |
462 | usb@12110000 { |
463 | compatible = "samsung,exynos4210-ehci"; | |
464 | reg = <0x12110000 0x100>; | |
465 | interrupts = <0 71 0>; | |
466 | }; | |
467 | ||
7d40d867 VG |
468 | usb@12120000 { |
469 | compatible = "samsung,exynos4210-ohci"; | |
470 | reg = <0x12120000 0x100>; | |
471 | interrupts = <0 71 0>; | |
472 | }; | |
473 | ||
b074abb7 KK |
474 | amba { |
475 | #address-cells = <1>; | |
476 | #size-cells = <1>; | |
477 | compatible = "arm,amba-bus"; | |
478 | interrupt-parent = <&gic>; | |
479 | ranges; | |
480 | ||
481 | pdma0: pdma@121A0000 { | |
482 | compatible = "arm,pl330", "arm,primecell"; | |
483 | reg = <0x121A0000 0x1000>; | |
484 | interrupts = <0 34 0>; | |
2de6847c TA |
485 | clocks = <&clock 275>; |
486 | clock-names = "apb_pclk"; | |
42cf2098 PV |
487 | #dma-cells = <1>; |
488 | #dma-channels = <8>; | |
489 | #dma-requests = <32>; | |
b074abb7 KK |
490 | }; |
491 | ||
492 | pdma1: pdma@121B0000 { | |
493 | compatible = "arm,pl330", "arm,primecell"; | |
494 | reg = <0x121B0000 0x1000>; | |
495 | interrupts = <0 35 0>; | |
2de6847c TA |
496 | clocks = <&clock 276>; |
497 | clock-names = "apb_pclk"; | |
42cf2098 PV |
498 | #dma-cells = <1>; |
499 | #dma-channels = <8>; | |
500 | #dma-requests = <32>; | |
b074abb7 KK |
501 | }; |
502 | ||
009f7c9f | 503 | mdma0: mdma@10800000 { |
b074abb7 KK |
504 | compatible = "arm,pl330", "arm,primecell"; |
505 | reg = <0x10800000 0x1000>; | |
506 | interrupts = <0 33 0>; | |
2de6847c TA |
507 | clocks = <&clock 271>; |
508 | clock-names = "apb_pclk"; | |
42cf2098 PV |
509 | #dma-cells = <1>; |
510 | #dma-channels = <8>; | |
511 | #dma-requests = <1>; | |
b074abb7 KK |
512 | }; |
513 | ||
009f7c9f | 514 | mdma1: mdma@11C10000 { |
b074abb7 KK |
515 | compatible = "arm,pl330", "arm,primecell"; |
516 | reg = <0x11C10000 0x1000>; | |
517 | interrupts = <0 124 0>; | |
2de6847c TA |
518 | clocks = <&clock 271>; |
519 | clock-names = "apb_pclk"; | |
42cf2098 PV |
520 | #dma-cells = <1>; |
521 | #dma-channels = <8>; | |
522 | #dma-requests = <1>; | |
b074abb7 KK |
523 | }; |
524 | }; | |
525 | ||
1128658a SAB |
526 | gsc_0: gsc@0x13e00000 { |
527 | compatible = "samsung,exynos5-gsc"; | |
528 | reg = <0x13e00000 0x1000>; | |
529 | interrupts = <0 85 0>; | |
6f9e95e6 | 530 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
531 | clocks = <&clock 256>; |
532 | clock-names = "gscl"; | |
1128658a SAB |
533 | }; |
534 | ||
535 | gsc_1: gsc@0x13e10000 { | |
536 | compatible = "samsung,exynos5-gsc"; | |
537 | reg = <0x13e10000 0x1000>; | |
538 | interrupts = <0 86 0>; | |
6f9e95e6 | 539 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
540 | clocks = <&clock 257>; |
541 | clock-names = "gscl"; | |
1128658a SAB |
542 | }; |
543 | ||
544 | gsc_2: gsc@0x13e20000 { | |
545 | compatible = "samsung,exynos5-gsc"; | |
546 | reg = <0x13e20000 0x1000>; | |
547 | interrupts = <0 87 0>; | |
6f9e95e6 | 548 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
549 | clocks = <&clock 258>; |
550 | clock-names = "gscl"; | |
1128658a SAB |
551 | }; |
552 | ||
553 | gsc_3: gsc@0x13e30000 { | |
554 | compatible = "samsung,exynos5-gsc"; | |
555 | reg = <0x13e30000 0x1000>; | |
556 | interrupts = <0 88 0>; | |
6f9e95e6 | 557 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
558 | clocks = <&clock 259>; |
559 | clock-names = "gscl"; | |
1128658a | 560 | }; |
566cf8ee RS |
561 | |
562 | hdmi { | |
563 | compatible = "samsung,exynos5-hdmi"; | |
101250ce | 564 | reg = <0x14530000 0x70000>; |
566cf8ee | 565 | interrupts = <0 95 0>; |
2de6847c TA |
566 | clocks = <&clock 333>, <&clock 136>, <&clock 137>, |
567 | <&clock 333>, <&clock 333>; | |
568 | clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", | |
569 | "sclk_hdmiphy", "hdmiphy"; | |
566cf8ee | 570 | }; |
5af0d8a3 RS |
571 | |
572 | mixer { | |
573 | compatible = "samsung,exynos5-mixer"; | |
574 | reg = <0x14450000 0x10000>; | |
575 | interrupts = <0 94 0>; | |
576 | }; | |
ad4aebe1 JH |
577 | |
578 | dp-controller { | |
579 | compatible = "samsung,exynos5-dp"; | |
580 | reg = <0x145b0000 0x1000>; | |
581 | interrupts = <10 3>; | |
582 | interrupt-parent = <&combiner>; | |
583 | #address-cells = <1>; | |
584 | #size-cells = <0>; | |
585 | ||
586 | dptx-phy { | |
587 | reg = <0x10040720>; | |
588 | samsung,enable-mask = <1>; | |
589 | }; | |
590 | }; | |
b074abb7 | 591 | }; |