[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / exynos5250.dtsi

/*
 * SAMSUNG EXYNOS5250 SoC device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
 * EXYNOS5250 based board files can include this file and provide
 * values for board specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
 * additional nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include "exynos5.dtsi"
#include "exynos5250-pinctrl.dtsi"

#include <dt-bindings/clk/exynos-audss-clk.h>

/ {
	compatible = "samsung,exynos5250";

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
		gsc0 = &gsc_0;
		gsc1 = &gsc_1;
		gsc2 = &gsc_2;
		gsc3 = &gsc_3;
		mshc0 = &dwmmc_0;
		mshc1 = &dwmmc_1;
		mshc2 = &dwmmc_2;
		mshc3 = &dwmmc_3;
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
		i2c8 = &i2c_8;
		pinctrl0 = &pinctrl_0;
		pinctrl1 = &pinctrl_1;
		pinctrl2 = &pinctrl_2;
		pinctrl3 = &pinctrl_3;
	};

	pd_gsc: gsc-power-domain@0x10044000 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10044000 0x20>;
	};

	pd_mfc: mfc-power-domain@0x10044040 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10044040 0x20>;
	};

	clock: clock-controller@0x10010000 {
		compatible = "samsung,exynos5250-clock";
		reg = <0x10010000 0x30000>;
		#clock-cells = <1>;
	};

	clock_audss: audss-clock-controller@3810000 {
		compatible = "samsung,exynos5250-audss-clock";
		reg = <0x03810000 0x0C>;
		#clock-cells = <1>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 13 0xf08>,
			     <1 14 0xf08>,
			     <1 11 0xf08>,
			     <1 10 0xf08>;
	};

	mct@101C0000 {
		compatible = "samsung,exynos4210-mct";
		reg = <0x101C0000 0x800>;
		interrupt-controller;
		#interrups-cells = <2>;
		interrupt-parent = <&mct_map>;
		interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
			     <4 0>, <5 0>;
		clocks = <&clock 1>, <&clock 335>;
		clock-names = "fin_pll", "mct";

		mct_map: mct-map {
			#interrupt-cells = <2>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <0x0 0 &combiner 23 3>,
					<0x1 0 &combiner 23 4>,
					<0x2 0 &combiner 25 2>,
					<0x3 0 &combiner 25 3>,
					<0x4 0 &gic 0 120 0>,
					<0x5 0 &gic 0 121 0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupt-parent = <&combiner>;
		interrupts = <1 2>, <22 4>;
	};

	pinctrl_0: pinctrl@11400000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x11400000 0x1000>;
		interrupts = <0 46 0>;

		wakup_eint: wakeup-interrupt-controller {
			compatible = "samsung,exynos4210-wakeup-eint";
			interrupt-parent = <&gic>;
			interrupts = <0 32 0>;
		};
	};

	pinctrl_1: pinctrl@13400000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x13400000 0x1000>;
		interrupts = <0 45 0>;
	};

	pinctrl_2: pinctrl@10d10000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x10d10000 0x1000>;
		interrupts = <0 50 0>;
	};

	pinctrl_3: pinctrl@03680000 {
		compatible = "samsung,exynos5250-pinctrl";
		reg = <0x0368000 0x1000>;
		interrupts = <0 47 0>;
	};

	watchdog {
		clocks = <&clock 336>;
		clock-names = "watchdog";
	};

	codec@11000000 {
		compatible = "samsung,mfc-v6";
		reg = <0x11000000 0x10000>;
		interrupts = <0 96 0>;
		samsung,power-domain = <&pd_mfc>;
	};

	rtc {
		clocks = <&clock 337>;
		clock-names = "rtc";
	};

	tmu@10060000 {
		compatible = "samsung,exynos5250-tmu";
		reg = <0x10060000 0x100>;
		interrupts = <0 65 0>;
		clocks = <&clock 338>;
		clock-names = "tmu_apbif";
	};

	serial@12C00000 {
		clocks = <&clock 289>, <&clock 146>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C10000 {
		clocks = <&clock 290>, <&clock 147>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C20000 {
		clocks = <&clock 291>, <&clock 148>;
		clock-names = "uart", "clk_uart_baud0";
	};

	serial@12C30000 {
		clocks = <&clock 292>, <&clock 149>;
		clock-names = "uart", "clk_uart_baud0";
	};

	sata@122F0000 {
		compatible = "samsung,exynos5-sata-ahci";
		reg = <0x122F0000 0x1ff>;
		interrupts = <0 115 0>;
		clocks = <&clock 277>, <&clock 143>;
		clock-names = "sata", "sclk_sata";
	};

	sata-phy@12170000 {
		compatible = "samsung,exynos5-sata-phy";
		reg = <0x12170000 0x1ff>;
	};

	i2c_0: i2c@12C60000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C60000 0x100>;
		interrupts = <0 56 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 294>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
	};

	i2c_1: i2c@12C70000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C70000 0x100>;
		interrupts = <0 57 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 295>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
	};

	i2c_2: i2c@12C80000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C80000 0x100>;
		interrupts = <0 58 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 296>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c2_bus>;
	};

	i2c_3: i2c@12C90000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C90000 0x100>;
		interrupts = <0 59 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 297>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c3_bus>;
	};

	i2c_4: i2c@12CA0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CA0000 0x100>;
		interrupts = <0 60 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 298>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c4_bus>;
	};

	i2c_5: i2c@12CB0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CB0000 0x100>;
		interrupts = <0 61 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 299>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c5_bus>;
	};

	i2c_6: i2c@12CC0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CC0000 0x100>;
		interrupts = <0 62 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 300>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c6_bus>;
	};

	i2c_7: i2c@12CD0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CD0000 0x100>;
		interrupts = <0 63 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 301>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c7_bus>;
	};

	i2c_8: i2c@12CE0000 {
		compatible = "samsung,s3c2440-hdmiphy-i2c";
		reg = <0x12CE0000 0x1000>;
		interrupts = <0 64 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 302>;
		clock-names = "i2c";
	};

	i2c@121D0000 {
                compatible = "samsung,exynos5-sata-phy-i2c";
                reg = <0x121D0000 0x100>;
                #address-cells = <1>;
                #size-cells = <0>;
		clocks = <&clock 288>;
		clock-names = "i2c";
	};

	spi_0: spi@12d20000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d20000 0x100>;
		interrupts = <0 66 0>;
		dmas = <&pdma0 5
			&pdma0 4>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 304>, <&clock 154>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
	};

	spi_1: spi@12d30000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d30000 0x100>;
		interrupts = <0 67 0>;
		dmas = <&pdma1 5
			&pdma1 4>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 305>, <&clock 155>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
	};

	spi_2: spi@12d40000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x12d40000 0x100>;
		interrupts = <0 68 0>;
		dmas = <&pdma0 7
			&pdma0 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 306>, <&clock 156>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
	};

	dwmmc_0: dwmmc0@12200000 {
		reg = <0x12200000 0x1000>;
		clocks = <&clock 280>, <&clock 139>;
		clock-names = "biu", "ciu";
	};

	dwmmc_1: dwmmc1@12210000 {
		reg = <0x12210000 0x1000>;
		clocks = <&clock 281>, <&clock 140>;
		clock-names = "biu", "ciu";
	};

	dwmmc_2: dwmmc2@12220000 {
		reg = <0x12220000 0x1000>;
		clocks = <&clock 282>, <&clock 141>;
		clock-names = "biu", "ciu";
	};

	dwmmc_3: dwmmc3@12230000 {
		compatible = "samsung,exynos5250-dw-mshc";
		reg = <0x12230000 0x1000>;
		interrupts = <0 78 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock 283>, <&clock 142>;
		clock-names = "biu", "ciu";
	};

	i2s0: i2s@03830000 {
		compatible = "samsung,i2s-v5";
		reg = <0x03830000 0x100>;
		dmas = <&pdma0 10
			&pdma0 9
			&pdma0 8>;
		dma-names = "tx", "rx", "tx-sec";
		clocks = <&clock_audss EXYNOS_I2S_BUS>,
			<&clock_audss EXYNOS_I2S_BUS>,
			<&clock_audss EXYNOS_SCLK_I2S>;
		clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
		samsung,supports-6ch;
		samsung,supports-rstclr;
		samsung,supports-secdai;
		samsung,idma-addr = <0x03000000>;
		pinctrl-names = "default";
		pinctrl-0 = <&i2s0_bus>;
	};

	i2s1: i2s@12D60000 {
		compatible = "samsung,i2s-v5";
		reg = <0x12D60000 0x100>;
		dmas = <&pdma1 12
			&pdma1 11>;
		dma-names = "tx", "rx";
		clocks = <&clock 307>, <&clock 157>;
		clock-names = "iis", "i2s_opclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&i2s1_bus>;
	};

	i2s2: i2s@12D70000 {
		compatible = "samsung,i2s-v5";
		reg = <0x12D70000 0x100>;
		dmas = <&pdma0 12
			&pdma0 11>;
		dma-names = "tx", "rx";
		clocks = <&clock 308>, <&clock 158>;
		clock-names = "iis", "i2s_opclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&i2s2_bus>;
	};

	usb@12000000 {
		compatible = "samsung,exynos5250-dwusb3";
		clocks = <&clock 286>;
		clock-names = "usbdrd30";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		dwc3 {
			compatible = "synopsys,dwc3";
			reg = <0x12000000 0x10000>;
			interrupts = <0 72 0>;
			usb-phy = <&usb2_phy &usb3_phy>;
		};
	};

	usb3_phy: usbphy@12100000 {
		compatible = "samsung,exynos5250-usb3phy";
		reg = <0x12100000 0x100>;
		clocks = <&clock 1>, <&clock 286>;
		clock-names = "ext_xtal", "usbdrd30";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		usbphy-sys {
			reg = <0x10040704 0x8>;
		};
	};

	usb@12110000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12110000 0x100>;
		interrupts = <0 71 0>;

		clocks = <&clock 285>;
		clock-names = "usbhost";
	};

	usb@12120000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12120000 0x100>;
		interrupts = <0 71 0>;

		clocks = <&clock 285>;
		clock-names = "usbhost";
	};

	usb2_phy: usbphy@12130000 {
		compatible = "samsung,exynos5250-usb2phy";
		reg = <0x12130000 0x100>;
		clocks = <&clock 1>, <&clock 285>;
		clock-names = "ext_xtal", "usbhost";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		usbphy-sys {
			reg = <0x10040704 0x8>,
			      <0x10050230 0x4>;
		};
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@121A0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x121A0000 0x1000>;
			interrupts = <0 34 0>;
			clocks = <&clock 275>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		pdma1: pdma@121B0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x121B0000 0x1000>;
			interrupts = <0 35 0>;
			clocks = <&clock 276>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		mdma0: mdma@10800000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x10800000 0x1000>;
			interrupts = <0 33 0>;
			clocks = <&clock 271>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};

		mdma1: mdma@11C10000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x11C10000 0x1000>;
			interrupts = <0 124 0>;
			clocks = <&clock 271>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};
	};

	gsc_0:  gsc@0x13e00000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e00000 0x1000>;
		interrupts = <0 85 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 256>;
		clock-names = "gscl";
	};

	gsc_1:  gsc@0x13e10000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e10000 0x1000>;
		interrupts = <0 86 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 257>;
		clock-names = "gscl";
	};

	gsc_2:  gsc@0x13e20000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e20000 0x1000>;
		interrupts = <0 87 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 258>;
		clock-names = "gscl";
	};

	gsc_3:  gsc@0x13e30000 {
		compatible = "samsung,exynos5-gsc";
		reg = <0x13e30000 0x1000>;
		interrupts = <0 88 0>;
		samsung,power-domain = <&pd_gsc>;
		clocks = <&clock 259>;
		clock-names = "gscl";
	};

	hdmi {
		compatible = "samsung,exynos5-hdmi";
		reg = <0x14530000 0x70000>;
		interrupts = <0 95 0>;
		clocks = <&clock 333>, <&clock 136>, <&clock 137>,
				<&clock 333>, <&clock 333>;
		clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
				"sclk_hdmiphy", "hdmiphy";
	};

	mixer {
		compatible = "samsung,exynos5-mixer";
		reg = <0x14450000 0x10000>;
		interrupts = <0 94 0>;
	};

	dp-controller {
		compatible = "samsung,exynos5-dp";
		reg = <0x145b0000 0x1000>;
		interrupts = <10 3>;
		interrupt-parent = <&combiner>;
		clocks = <&clock 342>;
		clock-names = "dp";
		#address-cells = <1>;
		#size-cells = <0>;

		dptx-phy {
			reg = <0x10040720>;
			samsung,enable-mask = <1>;
		};
	};

	fimd {
		compatible = "samsung,exynos5250-fimd";
		interrupt-parent = <&combiner>;
		reg = <0x14400000 0x40000>;
		interrupt-names = "fifo", "vsync", "lcd_sys";
		interrupts = <18 4>, <18 5>, <18 6>;
		clocks = <&clock 133>, <&clock 339>;
		clock-names = "sclk_fimd", "fimd";
	};
};
Commit	Line	Data
b074abb7 KK	1	/*
	2	* SAMSUNG EXYNOS5250 SoC device tree source
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	*
	7	* SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
	8	* EXYNOS5250 based board files can include this file and provide
	9	* values for board specfic bindings.
	10	*
	11	* Note: This file does not include device nodes for all the controllers in
	12	* EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
	13	* additional nodes can be added to this file.
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License version 2 as
	17	* published by the Free Software Foundation.
	18	*/
	19
e6c21cba	20	#include "exynos5.dtsi"
3799279f	21	#include "exynos5250-pinctrl.dtsi"
b074abb7	22
916ec47e PV	23	#include <dt-bindings/clk/exynos-audss-clk.h>
916ec47e PV	24
b074abb7 KK	25	/ {
b074abb7 KK	26	compatible = "samsung,exynos5250";
b074abb7	27
79989ba3 TA	28	aliases {
	29	spi0 = &spi_0;
	30	spi1 = &spi_1;
	31	spi2 = &spi_2;
1128658a SAB	32	gsc0 = &gsc_0;
	33	gsc1 = &gsc_1;
	34	gsc2 = &gsc_2;
	35	gsc3 = &gsc_3;
de0f42be DA	36	mshc0 = &dwmmc_0;
	37	mshc1 = &dwmmc_1;
	38	mshc2 = &dwmmc_2;
	39	mshc3 = &dwmmc_3;
b9fa3e7b AK	40	i2c0 = &i2c_0;
	41	i2c1 = &i2c_1;
	42	i2c2 = &i2c_2;
	43	i2c3 = &i2c_3;
	44	i2c4 = &i2c_4;
	45	i2c5 = &i2c_5;
	46	i2c6 = &i2c_6;
	47	i2c7 = &i2c_7;
	48	i2c8 = &i2c_8;
f8bfe2b0 TA	49	pinctrl0 = &pinctrl_0;
	50	pinctrl1 = &pinctrl_1;
	51	pinctrl2 = &pinctrl_2;
	52	pinctrl3 = &pinctrl_3;
79989ba3 TA	53	};
79989ba3 TA	54
6f9e95e6 PK	55	pd_gsc: gsc-power-domain@0x10044000 {
	56	compatible = "samsung,exynos4210-pd";
	57	reg = <0x10044000 0x20>;
	58	};
	59
	60	pd_mfc: mfc-power-domain@0x10044040 {
	61	compatible = "samsung,exynos4210-pd";
	62	reg = <0x10044040 0x20>;
	63	};
	64
d8bafc87 TA	65	clock: clock-controller@0x10010000 {
	66	compatible = "samsung,exynos5250-clock";
	67	reg = <0x10010000 0x30000>;
	68	#clock-cells = <1>;
	69	};
	70
bba23d95 PV	71	clock_audss: audss-clock-controller@3810000 {
	72	compatible = "samsung,exynos5250-audss-clock";
	73	reg = <0x03810000 0x0C>;
	74	#clock-cells = <1>;
	75	};
	76
2b7da988 AG	77	timer {
	78	compatible = "arm,armv7-timer";
	79	interrupts = <1 13 0xf08>,
	80	<1 14 0xf08>,
	81	<1 11 0xf08>,
	82	<1 10 0xf08>;
b074abb7 KK	83	};
b074abb7 KK	84
bbd9700a TA	85	mct@101C0000 {
	86	compatible = "samsung,exynos4210-mct";
	87	reg = <0x101C0000 0x800>;
	88	interrupt-controller;
	89	#interrups-cells = <2>;
	90	interrupt-parent = <&mct_map>;
	91	interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
	92	<4 0>, <5 0>;
2de6847c TA	93	clocks = <&clock 1>, <&clock 335>;
2de6847c TA	94	clock-names = "fin_pll", "mct";
bbd9700a TA	95
	96	mct_map: mct-map {
	97	#interrupt-cells = <2>;
	98	#address-cells = <0>;
	99	#size-cells = <0>;
	100	interrupt-map = <0x0 0 &combiner 23 3>,
	101	<0x1 0 &combiner 23 4>,
	102	<0x2 0 &combiner 25 2>,
	103	<0x3 0 &combiner 25 3>,
	104	<0x4 0 &gic 0 120 0>,
	105	<0x5 0 &gic 0 121 0>;
	106	};
	107	};
	108
4f801e59 CP	109	pmu {
	110	compatible = "arm,cortex-a15-pmu";
	111	interrupt-parent = <&combiner>;
	112	interrupts = <1 2>, <22 4>;
	113	};
	114
f8bfe2b0 TA	115	pinctrl_0: pinctrl@11400000 {
	116	compatible = "samsung,exynos5250-pinctrl";
	117	reg = <0x11400000 0x1000>;
	118	interrupts = <0 46 0>;
	119
	120	wakup_eint: wakeup-interrupt-controller {
	121	compatible = "samsung,exynos4210-wakeup-eint";
	122	interrupt-parent = <&gic>;
	123	interrupts = <0 32 0>;
	124	};
	125	};
	126
	127	pinctrl_1: pinctrl@13400000 {
	128	compatible = "samsung,exynos5250-pinctrl";
	129	reg = <0x13400000 0x1000>;
	130	interrupts = <0 45 0>;
	131	};
	132
	133	pinctrl_2: pinctrl@10d10000 {
	134	compatible = "samsung,exynos5250-pinctrl";
	135	reg = <0x10d10000 0x1000>;
	136	interrupts = <0 50 0>;
	137	};
	138
	139	pinctrl_3: pinctrl@03680000 {
	140	compatible = "samsung,exynos5250-pinctrl";
	141	reg = <0x0368000 0x1000>;
	142	interrupts = <0 47 0>;
	143	};
	144
b074abb7	145	watchdog {
2de6847c TA	146	clocks = <&clock 336>;
2de6847c TA	147	clock-names = "watchdog";
b074abb7 KK	148	};
b074abb7 KK	149
2eae613b AK	150	codec@11000000 {
	151	compatible = "samsung,mfc-v6";
	152	reg = <0x11000000 0x10000>;
	153	interrupts = <0 96 0>;
6f9e95e6	154	samsung,power-domain = <&pd_mfc>;
2eae613b AK	155	};
2eae613b AK	156
b074abb7	157	rtc {
2de6847c TA	158	clocks = <&clock 337>;
2de6847c TA	159	clock-names = "rtc";
b074abb7 KK	160	};
b074abb7 KK	161
ef405e04 ADK	162	tmu@10060000 {
	163	compatible = "samsung,exynos5250-tmu";
	164	reg = <0x10060000 0x100>;
	165	interrupts = <0 65 0>;
2de6847c TA	166	clocks = <&clock 338>;
2de6847c TA	167	clock-names = "tmu_apbif";
ef405e04 ADK	168	};
ef405e04 ADK	169
b074abb7	170	serial@12C00000 {
2de6847c TA	171	clocks = <&clock 289>, <&clock 146>;
2de6847c TA	172	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	173	};
	174
	175	serial@12C10000 {
2de6847c TA	176	clocks = <&clock 290>, <&clock 147>;
2de6847c TA	177	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	178	};
	179
	180	serial@12C20000 {
2de6847c TA	181	clocks = <&clock 291>, <&clock 148>;
2de6847c TA	182	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	183	};
	184
	185	serial@12C30000 {
2de6847c TA	186	clocks = <&clock 292>, <&clock 149>;
2de6847c TA	187	clock-names = "uart", "clk_uart_baud0";
b074abb7 KK	188	};
b074abb7 KK	189
c47d244a VA	190	sata@122F0000 {
	191	compatible = "samsung,exynos5-sata-ahci";
	192	reg = <0x122F0000 0x1ff>;
	193	interrupts = <0 115 0>;
2de6847c TA	194	clocks = <&clock 277>, <&clock 143>;
2de6847c TA	195	clock-names = "sata", "sclk_sata";
c47d244a VA	196	};
	197
	198	sata-phy@12170000 {
	199	compatible = "samsung,exynos5-sata-phy";
	200	reg = <0x12170000 0x1ff>;
	201	};
	202
b9fa3e7b	203	i2c_0: i2c@12C60000 {
b074abb7 KK	204	compatible = "samsung,s3c2440-i2c";
	205	reg = <0x12C60000 0x100>;
	206	interrupts = <0 56 0>;
009f7c9f TA	207	#address-cells = <1>;
009f7c9f TA	208	#size-cells = <0>;
2de6847c TA	209	clocks = <&clock 294>;
2de6847c TA	210	clock-names = "i2c";
f8bfe2b0 TA	211	pinctrl-names = "default";
f8bfe2b0 TA	212	pinctrl-0 = <&i2c0_bus>;
b074abb7 KK	213	};
b074abb7 KK	214
b9fa3e7b	215	i2c_1: i2c@12C70000 {
b074abb7 KK	216	compatible = "samsung,s3c2440-i2c";
	217	reg = <0x12C70000 0x100>;
	218	interrupts = <0 57 0>;
009f7c9f TA	219	#address-cells = <1>;
009f7c9f TA	220	#size-cells = <0>;
2de6847c TA	221	clocks = <&clock 295>;
2de6847c TA	222	clock-names = "i2c";
f8bfe2b0 TA	223	pinctrl-names = "default";
f8bfe2b0 TA	224	pinctrl-0 = <&i2c1_bus>;
b074abb7 KK	225	};
b074abb7 KK	226
b9fa3e7b	227	i2c_2: i2c@12C80000 {
b074abb7 KK	228	compatible = "samsung,s3c2440-i2c";
	229	reg = <0x12C80000 0x100>;
	230	interrupts = <0 58 0>;
009f7c9f TA	231	#address-cells = <1>;
009f7c9f TA	232	#size-cells = <0>;
2de6847c TA	233	clocks = <&clock 296>;
2de6847c TA	234	clock-names = "i2c";
f8bfe2b0 TA	235	pinctrl-names = "default";
f8bfe2b0 TA	236	pinctrl-0 = <&i2c2_bus>;
b074abb7 KK	237	};
b074abb7 KK	238
b9fa3e7b	239	i2c_3: i2c@12C90000 {
b074abb7 KK	240	compatible = "samsung,s3c2440-i2c";
	241	reg = <0x12C90000 0x100>;
	242	interrupts = <0 59 0>;
009f7c9f TA	243	#address-cells = <1>;
009f7c9f TA	244	#size-cells = <0>;
2de6847c TA	245	clocks = <&clock 297>;
2de6847c TA	246	clock-names = "i2c";
f8bfe2b0 TA	247	pinctrl-names = "default";
f8bfe2b0 TA	248	pinctrl-0 = <&i2c3_bus>;
b074abb7 KK	249	};
b074abb7 KK	250
b9fa3e7b	251	i2c_4: i2c@12CA0000 {
b074abb7 KK	252	compatible = "samsung,s3c2440-i2c";
	253	reg = <0x12CA0000 0x100>;
	254	interrupts = <0 60 0>;
009f7c9f TA	255	#address-cells = <1>;
009f7c9f TA	256	#size-cells = <0>;
2de6847c TA	257	clocks = <&clock 298>;
2de6847c TA	258	clock-names = "i2c";
f8bfe2b0 TA	259	pinctrl-names = "default";
f8bfe2b0 TA	260	pinctrl-0 = <&i2c4_bus>;
b074abb7 KK	261	};
b074abb7 KK	262
b9fa3e7b	263	i2c_5: i2c@12CB0000 {
b074abb7 KK	264	compatible = "samsung,s3c2440-i2c";
	265	reg = <0x12CB0000 0x100>;
	266	interrupts = <0 61 0>;
009f7c9f TA	267	#address-cells = <1>;
009f7c9f TA	268	#size-cells = <0>;
2de6847c TA	269	clocks = <&clock 299>;
2de6847c TA	270	clock-names = "i2c";
f8bfe2b0 TA	271	pinctrl-names = "default";
f8bfe2b0 TA	272	pinctrl-0 = <&i2c5_bus>;
b074abb7 KK	273	};
b074abb7 KK	274
b9fa3e7b	275	i2c_6: i2c@12CC0000 {
b074abb7 KK	276	compatible = "samsung,s3c2440-i2c";
	277	reg = <0x12CC0000 0x100>;
	278	interrupts = <0 62 0>;
009f7c9f TA	279	#address-cells = <1>;
009f7c9f TA	280	#size-cells = <0>;
2de6847c TA	281	clocks = <&clock 300>;
2de6847c TA	282	clock-names = "i2c";
f8bfe2b0 TA	283	pinctrl-names = "default";
f8bfe2b0 TA	284	pinctrl-0 = <&i2c6_bus>;
b074abb7 KK	285	};
b074abb7 KK	286
b9fa3e7b	287	i2c_7: i2c@12CD0000 {
b074abb7 KK	288	compatible = "samsung,s3c2440-i2c";
	289	reg = <0x12CD0000 0x100>;
	290	interrupts = <0 63 0>;
009f7c9f TA	291	#address-cells = <1>;
009f7c9f TA	292	#size-cells = <0>;
2de6847c TA	293	clocks = <&clock 301>;
2de6847c TA	294	clock-names = "i2c";
f8bfe2b0 TA	295	pinctrl-names = "default";
f8bfe2b0 TA	296	pinctrl-0 = <&i2c7_bus>;
3e3e9ce4 RS	297	};
3e3e9ce4 RS	298
b9fa3e7b	299	i2c_8: i2c@12CE0000 {
3e3e9ce4 RS	300	compatible = "samsung,s3c2440-hdmiphy-i2c";
	301	reg = <0x12CE0000 0x1000>;
	302	interrupts = <0 64 0>;
	303	#address-cells = <1>;
	304	#size-cells = <0>;
2de6847c TA	305	clocks = <&clock 302>;
2de6847c TA	306	clock-names = "i2c";
24025f6f OJ	307	};
24025f6f OJ	308
c47d244a VA	309	i2c@121D0000 {
	310	compatible = "samsung,exynos5-sata-phy-i2c";
	311	reg = <0x121D0000 0x100>;
	312	#address-cells = <1>;
	313	#size-cells = <0>;
2de6847c TA	314	clocks = <&clock 288>;
2de6847c TA	315	clock-names = "i2c";
b074abb7 KK	316	};
b074abb7 KK	317
79989ba3 TA	318	spi_0: spi@12d20000 {
	319	compatible = "samsung,exynos4210-spi";
	320	reg = <0x12d20000 0x100>;
	321	interrupts = <0 66 0>;
a4a8a9d3 PV	322	dmas = <&pdma0 5
	323	&pdma0 4>;
	324	dma-names = "tx", "rx";
79989ba3 TA	325	#address-cells = <1>;
79989ba3 TA	326	#size-cells = <0>;
2de6847c TA	327	clocks = <&clock 304>, <&clock 154>;
2de6847c TA	328	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	329	pinctrl-names = "default";
f8bfe2b0 TA	330	pinctrl-0 = <&spi0_bus>;
79989ba3 TA	331	};
	332
	333	spi_1: spi@12d30000 {
	334	compatible = "samsung,exynos4210-spi";
	335	reg = <0x12d30000 0x100>;
	336	interrupts = <0 67 0>;
a4a8a9d3 PV	337	dmas = <&pdma1 5
	338	&pdma1 4>;
	339	dma-names = "tx", "rx";
79989ba3 TA	340	#address-cells = <1>;
79989ba3 TA	341	#size-cells = <0>;
2de6847c TA	342	clocks = <&clock 305>, <&clock 155>;
2de6847c TA	343	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	344	pinctrl-names = "default";
f8bfe2b0 TA	345	pinctrl-0 = <&spi1_bus>;
79989ba3 TA	346	};
	347
	348	spi_2: spi@12d40000 {
	349	compatible = "samsung,exynos4210-spi";
	350	reg = <0x12d40000 0x100>;
	351	interrupts = <0 68 0>;
a4a8a9d3 PV	352	dmas = <&pdma0 7
	353	&pdma0 6>;
	354	dma-names = "tx", "rx";
79989ba3 TA	355	#address-cells = <1>;
79989ba3 TA	356	#size-cells = <0>;
2de6847c TA	357	clocks = <&clock 306>, <&clock 156>;
2de6847c TA	358	clock-names = "spi", "spi_busclk0";
f8bfe2b0 TA	359	pinctrl-names = "default";
f8bfe2b0 TA	360	pinctrl-0 = <&spi2_bus>;
79989ba3 TA	361	};
79989ba3 TA	362
de0f42be	363	dwmmc_0: dwmmc0@12200000 {
84bd48a0	364	reg = <0x12200000 0x1000>;
2de6847c TA	365	clocks = <&clock 280>, <&clock 139>;
2de6847c TA	366	clock-names = "biu", "ciu";
84bd48a0 TA	367	};
84bd48a0 TA	368
de0f42be	369	dwmmc_1: dwmmc1@12210000 {
84bd48a0	370	reg = <0x12210000 0x1000>;
2de6847c TA	371	clocks = <&clock 281>, <&clock 140>;
2de6847c TA	372	clock-names = "biu", "ciu";
84bd48a0 TA	373	};
84bd48a0 TA	374
de0f42be	375	dwmmc_2: dwmmc2@12220000 {
84bd48a0	376	reg = <0x12220000 0x1000>;
2de6847c TA	377	clocks = <&clock 282>, <&clock 141>;
2de6847c TA	378	clock-names = "biu", "ciu";
84bd48a0 TA	379	};
84bd48a0 TA	380
de0f42be	381	dwmmc_3: dwmmc3@12230000 {
84bd48a0 TA	382	compatible = "samsung,exynos5250-dw-mshc";
	383	reg = <0x12230000 0x1000>;
	384	interrupts = <0 78 0>;
	385	#address-cells = <1>;
	386	#size-cells = <0>;
2de6847c TA	387	clocks = <&clock 283>, <&clock 142>;
2de6847c TA	388	clock-names = "biu", "ciu";
84bd48a0 TA	389	};
84bd48a0 TA	390
28a48058	391	i2s0: i2s@03830000 {
4c4c7463 PV	392	compatible = "samsung,i2s-v5";
	393	reg = <0x03830000 0x100>;
	394	dmas = <&pdma0 10
	395	&pdma0 9
	396	&pdma0 8>;
	397	dma-names = "tx", "rx", "tx-sec";
916ec47e PV	398	clocks = <&clock_audss EXYNOS_I2S_BUS>,
	399	<&clock_audss EXYNOS_I2S_BUS>,
	400	<&clock_audss EXYNOS_SCLK_I2S>;
	401	clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
4c4c7463 PV	402	samsung,supports-6ch;
	403	samsung,supports-rstclr;
	404	samsung,supports-secdai;
	405	samsung,idma-addr = <0x03000000>;
f8bfe2b0 TA	406	pinctrl-names = "default";
f8bfe2b0 TA	407	pinctrl-0 = <&i2s0_bus>;
4c4c7463 PV	408	};
4c4c7463 PV	409
28a48058	410	i2s1: i2s@12D60000 {
4c4c7463 PV	411	compatible = "samsung,i2s-v5";
	412	reg = <0x12D60000 0x100>;
	413	dmas = <&pdma1 12
	414	&pdma1 11>;
	415	dma-names = "tx", "rx";
916ec47e PV	416	clocks = <&clock 307>, <&clock 157>;
916ec47e PV	417	clock-names = "iis", "i2s_opclk0";
f8bfe2b0 TA	418	pinctrl-names = "default";
f8bfe2b0 TA	419	pinctrl-0 = <&i2s1_bus>;
4c4c7463 PV	420	};
4c4c7463 PV	421
28a48058	422	i2s2: i2s@12D70000 {
4c4c7463 PV	423	compatible = "samsung,i2s-v5";
	424	reg = <0x12D70000 0x100>;
	425	dmas = <&pdma0 12
	426	&pdma0 11>;
	427	dma-names = "tx", "rx";
916ec47e PV	428	clocks = <&clock 308>, <&clock 158>;
916ec47e PV	429	clock-names = "iis", "i2s_opclk0";
f8bfe2b0 TA	430	pinctrl-names = "default";
f8bfe2b0 TA	431	pinctrl-0 = <&i2s2_bus>;
4c4c7463 PV	432	};
4c4c7463 PV	433
0b3dc97e VG	434	usb@12000000 {
	435	compatible = "samsung,exynos5250-dwusb3";
	436	clocks = <&clock 286>;
	437	clock-names = "usbdrd30";
	438	#address-cells = <1>;
	439	#size-cells = <1>;
	440	ranges;
	441
	442	dwc3 {
	443	compatible = "synopsys,dwc3";
	444	reg = <0x12000000 0x10000>;
	445	interrupts = <0 72 0>;
	446	usb-phy = <&usb2_phy &usb3_phy>;
	447	};
	448	};
	449
	450	usb3_phy: usbphy@12100000 {
896db3b3 VG	451	compatible = "samsung,exynos5250-usb3phy";
	452	reg = <0x12100000 0x100>;
	453	clocks = <&clock 1>, <&clock 286>;
	454	clock-names = "ext_xtal", "usbdrd30";
	455	#address-cells = <1>;
	456	#size-cells = <1>;
	457	ranges;
	458
	459	usbphy-sys {
	460	reg = <0x10040704 0x8>;
	461	};
	462	};
	463
13cbd1e3 VG	464	usb@12110000 {
	465	compatible = "samsung,exynos4210-ehci";
	466	reg = <0x12110000 0x100>;
	467	interrupts = <0 71 0>;
b3cd7d87 DA	468
	469	clocks = <&clock 285>;
	470	clock-names = "usbhost";
13cbd1e3 VG	471	};
13cbd1e3 VG	472
7d40d867 VG	473	usb@12120000 {
	474	compatible = "samsung,exynos4210-ohci";
	475	reg = <0x12120000 0x100>;
	476	interrupts = <0 71 0>;
b3cd7d87 DA	477
	478	clocks = <&clock 285>;
	479	clock-names = "usbhost";
7d40d867 VG	480	};
7d40d867 VG	481
0b3dc97e	482	usb2_phy: usbphy@12130000 {
7ec892ef VG	483	compatible = "samsung,exynos5250-usb2phy";
	484	reg = <0x12130000 0x100>;
	485	clocks = <&clock 1>, <&clock 285>;
	486	clock-names = "ext_xtal", "usbhost";
	487	#address-cells = <1>;
	488	#size-cells = <1>;
	489	ranges;
	490
	491	usbphy-sys {
	492	reg = <0x10040704 0x8>,
	493	<0x10050230 0x4>;
	494	};
	495	};
	496
b074abb7 KK	497	amba {
	498	#address-cells = <1>;
	499	#size-cells = <1>;
	500	compatible = "arm,amba-bus";
	501	interrupt-parent = <&gic>;
	502	ranges;
	503
	504	pdma0: pdma@121A0000 {
	505	compatible = "arm,pl330", "arm,primecell";
	506	reg = <0x121A0000 0x1000>;
	507	interrupts = <0 34 0>;
2de6847c TA	508	clocks = <&clock 275>;
2de6847c TA	509	clock-names = "apb_pclk";
42cf2098 PV	510	#dma-cells = <1>;
	511	#dma-channels = <8>;
	512	#dma-requests = <32>;
b074abb7 KK	513	};
	514
	515	pdma1: pdma@121B0000 {
	516	compatible = "arm,pl330", "arm,primecell";
	517	reg = <0x121B0000 0x1000>;
	518	interrupts = <0 35 0>;
2de6847c TA	519	clocks = <&clock 276>;
2de6847c TA	520	clock-names = "apb_pclk";
42cf2098 PV	521	#dma-cells = <1>;
	522	#dma-channels = <8>;
	523	#dma-requests = <32>;
b074abb7 KK	524	};
b074abb7 KK	525
009f7c9f	526	mdma0: mdma@10800000 {
b074abb7 KK	527	compatible = "arm,pl330", "arm,primecell";
	528	reg = <0x10800000 0x1000>;
	529	interrupts = <0 33 0>;
2de6847c TA	530	clocks = <&clock 271>;
2de6847c TA	531	clock-names = "apb_pclk";
42cf2098 PV	532	#dma-cells = <1>;
	533	#dma-channels = <8>;
	534	#dma-requests = <1>;
b074abb7 KK	535	};
b074abb7 KK	536
009f7c9f	537	mdma1: mdma@11C10000 {
b074abb7 KK	538	compatible = "arm,pl330", "arm,primecell";
	539	reg = <0x11C10000 0x1000>;
	540	interrupts = <0 124 0>;
2de6847c TA	541	clocks = <&clock 271>;
2de6847c TA	542	clock-names = "apb_pclk";
42cf2098 PV	543	#dma-cells = <1>;
	544	#dma-channels = <8>;
	545	#dma-requests = <1>;
b074abb7 KK	546	};
	547	};
	548
1128658a SAB	549	gsc_0: gsc@0x13e00000 {
	550	compatible = "samsung,exynos5-gsc";
	551	reg = <0x13e00000 0x1000>;
	552	interrupts = <0 85 0>;
6f9e95e6	553	samsung,power-domain = <&pd_gsc>;
2de6847c TA	554	clocks = <&clock 256>;
2de6847c TA	555	clock-names = "gscl";
1128658a SAB	556	};
	557
	558	gsc_1: gsc@0x13e10000 {
	559	compatible = "samsung,exynos5-gsc";
	560	reg = <0x13e10000 0x1000>;
	561	interrupts = <0 86 0>;
6f9e95e6	562	samsung,power-domain = <&pd_gsc>;
2de6847c TA	563	clocks = <&clock 257>;
2de6847c TA	564	clock-names = "gscl";
1128658a SAB	565	};
	566
	567	gsc_2: gsc@0x13e20000 {
	568	compatible = "samsung,exynos5-gsc";
	569	reg = <0x13e20000 0x1000>;
	570	interrupts = <0 87 0>;
6f9e95e6	571	samsung,power-domain = <&pd_gsc>;
2de6847c TA	572	clocks = <&clock 258>;
2de6847c TA	573	clock-names = "gscl";
1128658a SAB	574	};
	575
	576	gsc_3: gsc@0x13e30000 {
	577	compatible = "samsung,exynos5-gsc";
	578	reg = <0x13e30000 0x1000>;
	579	interrupts = <0 88 0>;
6f9e95e6	580	samsung,power-domain = <&pd_gsc>;
2de6847c TA	581	clocks = <&clock 259>;
2de6847c TA	582	clock-names = "gscl";
1128658a	583	};
566cf8ee RS	584
	585	hdmi {
	586	compatible = "samsung,exynos5-hdmi";
101250ce	587	reg = <0x14530000 0x70000>;
566cf8ee	588	interrupts = <0 95 0>;
2de6847c TA	589	clocks = <&clock 333>, <&clock 136>, <&clock 137>,
	590	<&clock 333>, <&clock 333>;
	591	clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
	592	"sclk_hdmiphy", "hdmiphy";
566cf8ee	593	};
5af0d8a3 RS	594
	595	mixer {
	596	compatible = "samsung,exynos5-mixer";
	597	reg = <0x14450000 0x10000>;
	598	interrupts = <0 94 0>;
	599	};
ad4aebe1 JH	600
	601	dp-controller {
	602	compatible = "samsung,exynos5-dp";
	603	reg = <0x145b0000 0x1000>;
	604	interrupts = <10 3>;
	605	interrupt-parent = <&combiner>;
0f72a9ec VS	606	clocks = <&clock 342>;
0f72a9ec VS	607	clock-names = "dp";
ad4aebe1 JH	608	#address-cells = <1>;
	609	#size-cells = <0>;
	610
	611	dptx-phy {
	612	reg = <0x10040720>;
	613	samsung,enable-mask = <1>;
	614	};
	615	};
a7389cb1 LKA	616
	617	fimd {
	618	compatible = "samsung,exynos5250-fimd";
	619	interrupt-parent = <&combiner>;
	620	reg = <0x14400000 0x40000>;
	621	interrupt-names = "fifo", "vsync", "lcd_sys";
	622	interrupts = <18 4>, <18 5>, <18 6>;
	623	clocks = <&clock 133>, <&clock 339>;
	624	clock-names = "sclk_fimd", "fimd";
	625	};
b074abb7	626	};