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cc4637f7 1// SPDX-License-Identifier: GPL-2.0
3a7c01d7 2/*
6e2422ff 3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
3a7c01d7 4 *
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5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
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7 * Copyright (c) 2014 Collabora Ltd.
8 * Copyright (c) 2015 Lukasz Majewski <l.majewski@samsung.com>
9 * Anand Moon <linux.amoon@gmail.com>
cc4637f7 10 */
3a7c01d7 11
227c23b5 12#include <dt-bindings/input/input.h>
1ac49427 13#include "exynos5422-odroid-core.dtsi"
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14
15/ {
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16 gpio_keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&power_key>;
20
21 power_key {
22 /*
23 * The power button (SW2) is connected to the PWRON
24 * pin (active high) of the S2MPS11 PMIC, which acts
25 * as a 16ms debouce filter and signal inverter with
26 * output on ONOB pin (active low). ONOB PMIC pin is
27 * then connected to XEINT3 SoC pin.
28 */
29 gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_POWER>;
31 label = "power key";
32 debounce-interval = <0>;
33 wakeup-source;
34 };
35 };
36
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37 emmc_pwrseq: pwrseq {
38 pinctrl-0 = <&emmc_nrst_pin>;
39 pinctrl-names = "default";
40 compatible = "mmc-pwrseq-emmc";
31b9903c 41 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
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42 };
43
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44 fan0: pwm-fan {
45 compatible = "pwm-fan";
46 pwms = <&pwm 0 20972 0>;
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47 #cooling-cells = <2>;
48 cooling-levels = <0 130 170 230>;
49 };
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50
51 thermal-zones {
52 cpu0_thermal: cpu0-thermal {
53 thermal-sensors = <&tmu_cpu0 0>;
54 polling-delay-passive = <250>;
55 polling-delay = <0>;
56 trips {
e740731d 57 cpu0_alert0: cpu-alert-0 {
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58 temperature = <50000>; /* millicelsius */
59 hysteresis = <5000>; /* millicelsius */
60 type = "active";
61 };
e740731d 62 cpu0_alert1: cpu-alert-1 {
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63 temperature = <60000>; /* millicelsius */
64 hysteresis = <5000>; /* millicelsius */
65 type = "active";
66 };
e740731d 67 cpu0_alert2: cpu-alert-2 {
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68 temperature = <70000>; /* millicelsius */
69 hysteresis = <5000>; /* millicelsius */
70 type = "active";
71 };
e740731d 72 cpu0_crit0: cpu-crit-0 {
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73 temperature = <120000>; /* millicelsius */
74 hysteresis = <0>; /* millicelsius */
75 type = "critical";
76 };
77 /*
78 * Exynos542x supports only 4 trip-points
79 * so for these polling mode is required.
80 * Start polling at temperature level of last
e740731d 81 * interrupt-driven trip: cpu0_alert2
f4715dc7 82 */
e740731d 83 cpu0_alert3: cpu-alert-3 {
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84 temperature = <70000>; /* millicelsius */
85 hysteresis = <10000>; /* millicelsius */
86 type = "passive";
87 };
e740731d 88 cpu0_alert4: cpu-alert-4 {
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89 temperature = <85000>; /* millicelsius */
90 hysteresis = <10000>; /* millicelsius */
91 type = "passive";
92 };
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93 };
94 cooling-maps {
95 map0 {
e740731d 96 trip = <&cpu0_alert0>;
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97 cooling-device = <&fan0 0 1>;
98 };
99 map1 {
e740731d 100 trip = <&cpu0_alert1>;
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101 cooling-device = <&fan0 1 2>;
102 };
103 map2 {
e740731d 104 trip = <&cpu0_alert2>;
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105 cooling-device = <&fan0 2 3>;
106 };
107 /*
e740731d 108 * When reaching cpu0_alert3, reduce CPU
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109 * by 2 steps. On Exynos5422/5800 that would
110 * be: 1600 MHz and 1100 MHz.
111 */
112 map3 {
e740731d 113 trip = <&cpu0_alert3>;
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114 cooling-device = <&cpu0 0 2>,
115 <&cpu1 0 2>,
116 <&cpu2 0 2>,
117 <&cpu3 0 2>,
118 <&cpu4 0 2>,
119 <&cpu5 0 2>,
120 <&cpu6 0 2>,
121 <&cpu7 0 2>;
f4715dc7 122 };
f4715dc7 123 /*
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124 * When reaching cpu0_alert4, reduce CPU
125 * further, down to 600 MHz (12 steps for big,
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126 * 7 steps for LITTLE).
127 */
670734f5 128 map4 {
e740731d 129 trip = <&cpu0_alert4>;
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130 cooling-device = <&cpu0 3 7>,
131 <&cpu1 3 7>,
132 <&cpu2 3 7>,
133 <&cpu3 3 7>,
134 <&cpu4 3 12>,
135 <&cpu5 3 12>,
136 <&cpu6 3 12>,
137 <&cpu7 3 12>;
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138 };
139 };
140 };
141 cpu1_thermal: cpu1-thermal {
142 thermal-sensors = <&tmu_cpu1 0>;
143 polling-delay-passive = <250>;
144 polling-delay = <0>;
145 trips {
146 cpu1_alert0: cpu-alert-0 {
147 temperature = <50000>;
148 hysteresis = <5000>;
149 type = "active";
150 };
151 cpu1_alert1: cpu-alert-1 {
152 temperature = <60000>;
153 hysteresis = <5000>;
154 type = "active";
155 };
156 cpu1_alert2: cpu-alert-2 {
157 temperature = <70000>;
158 hysteresis = <5000>;
159 type = "active";
160 };
161 cpu1_crit0: cpu-crit-0 {
162 temperature = <120000>;
163 hysteresis = <0>;
164 type = "critical";
165 };
166 cpu1_alert3: cpu-alert-3 {
167 temperature = <70000>;
168 hysteresis = <10000>;
169 type = "passive";
170 };
171 cpu1_alert4: cpu-alert-4 {
172 temperature = <85000>;
173 hysteresis = <10000>;
174 type = "passive";
175 };
176 };
177 cooling-maps {
178 map0 {
179 trip = <&cpu1_alert0>;
180 cooling-device = <&fan0 0 1>;
181 };
182 map1 {
183 trip = <&cpu1_alert1>;
184 cooling-device = <&fan0 1 2>;
185 };
186 map2 {
187 trip = <&cpu1_alert2>;
188 cooling-device = <&fan0 2 3>;
189 };
190 map3 {
191 trip = <&cpu1_alert3>;
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192 cooling-device = <&cpu0 0 2>,
193 <&cpu1 0 2>,
194 <&cpu2 0 2>,
195 <&cpu3 0 2>,
196 <&cpu4 0 2>,
197 <&cpu5 0 2>,
198 <&cpu6 0 2>,
199 <&cpu7 0 2>;
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200 };
201 map4 {
e740731d 202 trip = <&cpu1_alert4>;
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203 cooling-device = <&cpu0 3 7>,
204 <&cpu1 3 7>,
205 <&cpu2 3 7>,
206 <&cpu3 3 7>,
207 <&cpu4 3 12>,
208 <&cpu5 3 12>,
209 <&cpu6 3 12>,
210 <&cpu7 3 12>;
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211 };
212 };
213 };
214 cpu2_thermal: cpu2-thermal {
215 thermal-sensors = <&tmu_cpu2 0>;
216 polling-delay-passive = <250>;
217 polling-delay = <0>;
218 trips {
219 cpu2_alert0: cpu-alert-0 {
220 temperature = <50000>;
221 hysteresis = <5000>;
222 type = "active";
223 };
224 cpu2_alert1: cpu-alert-1 {
225 temperature = <60000>;
226 hysteresis = <5000>;
227 type = "active";
228 };
229 cpu2_alert2: cpu-alert-2 {
230 temperature = <70000>;
231 hysteresis = <5000>;
232 type = "active";
233 };
234 cpu2_crit0: cpu-crit-0 {
235 temperature = <120000>;
236 hysteresis = <0>;
237 type = "critical";
238 };
239 cpu2_alert3: cpu-alert-3 {
240 temperature = <70000>;
241 hysteresis = <10000>;
242 type = "passive";
243 };
244 cpu2_alert4: cpu-alert-4 {
245 temperature = <85000>;
246 hysteresis = <10000>;
247 type = "passive";
248 };
249 };
250 cooling-maps {
251 map0 {
252 trip = <&cpu2_alert0>;
253 cooling-device = <&fan0 0 1>;
254 };
255 map1 {
256 trip = <&cpu2_alert1>;
257 cooling-device = <&fan0 1 2>;
258 };
259 map2 {
260 trip = <&cpu2_alert2>;
261 cooling-device = <&fan0 2 3>;
262 };
263 map3 {
264 trip = <&cpu2_alert3>;
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265 cooling-device = <&cpu0 0 2>,
266 <&cpu1 0 2>,
267 <&cpu2 0 2>,
268 <&cpu3 0 2>,
269 <&cpu4 0 2>,
270 <&cpu5 0 2>,
271 <&cpu6 0 2>,
272 <&cpu7 0 2>;
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273 };
274 map4 {
e740731d 275 trip = <&cpu2_alert4>;
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276 cooling-device = <&cpu0 3 7>,
277 <&cpu1 3 7>,
278 <&cpu2 3 7>,
279 <&cpu3 3 7>,
280 <&cpu4 3 12>,
281 <&cpu5 3 12>,
282 <&cpu6 3 12>,
283 <&cpu7 3 12>;
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284 };
285 };
286 };
287 cpu3_thermal: cpu3-thermal {
288 thermal-sensors = <&tmu_cpu3 0>;
289 polling-delay-passive = <250>;
290 polling-delay = <0>;
291 trips {
292 cpu3_alert0: cpu-alert-0 {
293 temperature = <50000>;
294 hysteresis = <5000>;
295 type = "active";
296 };
297 cpu3_alert1: cpu-alert-1 {
298 temperature = <60000>;
299 hysteresis = <5000>;
300 type = "active";
301 };
302 cpu3_alert2: cpu-alert-2 {
303 temperature = <70000>;
304 hysteresis = <5000>;
305 type = "active";
306 };
307 cpu3_crit0: cpu-crit-0 {
308 temperature = <120000>;
309 hysteresis = <0>;
310 type = "critical";
311 };
312 cpu3_alert3: cpu-alert-3 {
313 temperature = <70000>;
314 hysteresis = <10000>;
315 type = "passive";
316 };
317 cpu3_alert4: cpu-alert-4 {
318 temperature = <85000>;
319 hysteresis = <10000>;
320 type = "passive";
321 };
322 };
323 cooling-maps {
324 map0 {
325 trip = <&cpu3_alert0>;
326 cooling-device = <&fan0 0 1>;
327 };
328 map1 {
329 trip = <&cpu3_alert1>;
330 cooling-device = <&fan0 1 2>;
331 };
332 map2 {
333 trip = <&cpu3_alert2>;
334 cooling-device = <&fan0 2 3>;
335 };
336 map3 {
337 trip = <&cpu3_alert3>;
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338 cooling-device = <&cpu0 0 2>,
339 <&cpu1 0 2>,
340 <&cpu2 0 2>,
341 <&cpu3 0 2>,
342 <&cpu4 0 2>,
343 <&cpu5 0 2>,
344 <&cpu6 0 2>,
345 <&cpu7 0 2>;
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346 };
347 map4 {
e740731d 348 trip = <&cpu3_alert4>;
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349 cooling-device = <&cpu0 3 7>,
350 <&cpu1 3 7>,
351 <&cpu2 3 7>,
352 <&cpu3 3 7>,
353 <&cpu4 3 12>,
354 <&cpu5 3 12>,
355 <&cpu6 3 12>,
356 <&cpu7 3 12>;
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357 };
358 };
359 };
360 };
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361};
362
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363&hdmi {
364 status = "okay";
c9c51fd2 365 ddc = <&i2c_2>;
05b01dd9 366 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
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367 pinctrl-names = "default";
368 pinctrl-0 = <&hdmi_hpd_irq>;
369
370 vdd_osc-supply = <&ldo7_reg>;
371 vdd_pll-supply = <&ldo6_reg>;
372 vdd-supply = <&ldo6_reg>;
373};
374
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375&hdmicec {
376 status = "okay";
93a4c835 377 needs-hpd;
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378};
379
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380&i2c_2 {
381 samsung,i2c-sda-delay = <100>;
382 samsung,i2c-max-bus-freq = <66000>;
c9c51fd2 383 /* used by HDMI DDC */
3a7c01d7 384 status = "okay";
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385};
386
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387&ldo26_reg {
388 regulator-min-microvolt = <3000000>;
389 regulator-max-microvolt = <3000000>;
390 regulator-always-on;
391};
392
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393&mixer {
394 status = "okay";
395};
396
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397&mmc_0 {
398 status = "okay";
399 mmc-pwrseq = <&emmc_pwrseq>;
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400 card-detect-delay = <200>;
401 samsung,dw-mshc-ciu-div = <3>;
402 samsung,dw-mshc-sdr-timing = <0 4>;
403 samsung,dw-mshc-ddr-timing = <0 2>;
404 samsung,dw-mshc-hs400-timing = <0 2>;
405 samsung,read-strobe-delay = <90>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
408 bus-width = <8>;
409 cap-mmc-highspeed;
410 mmc-hs200-1_8v;
411 mmc-hs400-1_8v;
4289c86c 412 max-frequency = <200000000>;
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413 vmmc-supply = <&ldo18_reg>;
414 vqmmc-supply = <&ldo3_reg>;
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415};
416
3a7c01d7 417&pinctrl_0 {
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418 power_key: power-key {
419 samsung,pins = "gpx0-3";
420 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
421 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
422 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
423 };
424
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425 hdmi_hpd_irq: hdmi-hpd-irq {
426 samsung,pins = "gpx3-7";
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427 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
428 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
429 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
3a7c01d7 430 };
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431};
432
433&pinctrl_1 {
434 emmc_nrst_pin: emmc-nrst {
435 samsung,pins = "gpd1-0";
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436 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
437 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
438 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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439 };
440};