[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / exynos5422-odroidxu3-common.dtsi

/*
 * Hardkernel Odroid XU3 board device tree source
 *
 * Copyright (c) 2014 Collabora Ltd.
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/samsung-i2s.h>
#include "exynos5800.dtsi"
#include "exynos5422-cpus.dtsi"
#include "exynos5422-cpu-thermal.dtsi"

/ {
	memory {
		reg = <0x40000000 0x7EA00000>;
	};

	chosen {
		linux,stdout-path = &serial_2;
	};

	firmware@02073000 {
		compatible = "samsung,secure-firmware";
		reg = <0x02073000 0x1000>;
	};

	fixed-rate-clocks {
		oscclk {
			compatible = "samsung,exynos5420-oscclk";
			clock-frequency = <24000000>;
		};
	};

	emmc_pwrseq: pwrseq {
		pinctrl-0 = <&emmc_nrst_pin>;
		pinctrl-names = "default";
		compatible = "mmc-pwrseq-emmc";
		reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
	};

	fan0: pwm-fan {
		compatible = "pwm-fan";
		pwms = <&pwm 0 20972 0>;
		cooling-min-state = <0>;
		cooling-max-state = <3>;
		#cooling-cells = <2>;
		cooling-levels = <0 130 170 230>;
	};
};

&bus_wcore {
	devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
			<&nocp_mem1_0>, <&nocp_mem1_1>;
	vdd-supply = <&buck3_reg>;
	exynos,saturation-ratio = <100>;
	status = "okay";
};

&bus_noc {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_fsys_apb {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_fsys {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_fsys2 {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_mfc {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_gen {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_peri {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_g2d {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_g2d_acp {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_jpeg {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_jpeg_apb {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_disp1_fimd {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_disp1 {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_gscl_scaler {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&bus_mscl {
	devfreq = <&bus_wcore>;
	status = "okay";
};

&clock_audss {
	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
			<&clock_audss EXYNOS_MOUT_I2S>,
			<&clock_audss EXYNOS_DOUT_AUD_BUS>;
	assigned-clock-parents = <&clock CLK_FIN_PLL>,
			<&clock_audss EXYNOS_MOUT_AUDSS>;
	assigned-clock-rates = <0>,
			<0>,
			<19200000>;
};

&cpu0 {
	cpu-supply = <&buck6_reg>;
};

&cpu4 {
	cpu-supply = <&buck2_reg>;
};

&hdmi {
	status = "okay";
	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&hdmi_hpd_irq>;

	vdd_osc-supply = <&ldo7_reg>;
	vdd_pll-supply = <&ldo6_reg>;
	vdd-supply = <&ldo6_reg>;
};

&hsi2c_4 {
	status = "okay";

	s2mps11_pmic@66 {
		compatible = "samsung,s2mps11-pmic";
		reg = <0x66>;
		samsung,s2mps11-acokb-ground;

		interrupt-parent = <&gpx0>;
		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-names = "default";
		pinctrl-0 = <&s2mps11_irq>;

		s2mps11_osc: clocks {
			#clock-cells = <1>;
			clock-output-names = "s2mps11_ap",
					"s2mps11_cp", "s2mps11_bt";
		};

		regulators {
			ldo1_reg: LDO1 {
				regulator-name = "vdd_ldo1";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
				regulator-always-on;
			};

			ldo3_reg: LDO3 {
				regulator-name = "vddq_mmc0";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo5_reg: LDO5 {
				regulator-name = "vdd_ldo5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo6_reg: LDO6 {
				regulator-name = "vdd_ldo6";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
				regulator-always-on;
			};

			ldo7_reg: LDO7 {
				regulator-name = "vdd_ldo7";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo8_reg: LDO8 {
				regulator-name = "vdd_ldo8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo9_reg: LDO9 {
				regulator-name = "vdd_ldo9";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			ldo10_reg: LDO10 {
				regulator-name = "vdd_ldo10";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo11_reg: LDO11 {
				regulator-name = "vdd_ldo11";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
				regulator-always-on;
			};

			ldo12_reg: LDO12 {
				regulator-name = "vdd_ldo12";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo13_reg: LDO13 {
				regulator-name = "vddq_mmc2";
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
			};

			ldo15_reg: LDO15 {
				regulator-name = "vdd_ldo15";
				regulator-min-microvolt = <3100000>;
				regulator-max-microvolt = <3100000>;
				regulator-always-on;
			};

			ldo16_reg: LDO16 {
				regulator-name = "vdd_ldo16";
				regulator-min-microvolt = <2200000>;
				regulator-max-microvolt = <2200000>;
				regulator-always-on;
			};

			ldo17_reg: LDO17 {
				regulator-name = "tsp_avdd";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			ldo18_reg: LDO18 {
				regulator-name = "vdd_emmc_1V8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo19_reg: LDO19 {
				regulator-name = "vdd_sd";
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
			};

			ldo24_reg: LDO24 {
				regulator-name = "tsp_io";
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
				regulator-always-on;
			};

			ldo26_reg: LDO26 {
				regulator-name = "vdd_ldo26";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			buck1_reg: BUCK1 {
				regulator-name = "vdd_mif";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1300000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck2_reg: BUCK2 {
				regulator-name = "vdd_arm";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck3_reg: BUCK3 {
				regulator-name = "vdd_int";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1400000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck4_reg: BUCK4 {
				regulator-name = "vdd_g3d";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1400000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck5_reg: BUCK5 {
				regulator-name = "vdd_mem";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1400000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck6_reg: BUCK6 {
				regulator-name = "vdd_kfc";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck7_reg: BUCK7 {
				regulator-name = "vdd_1.0v_ldo";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck8_reg: BUCK8 {
				regulator-name = "vdd_1.8v_ldo";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1500000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck9_reg: BUCK9 {
				regulator-name = "vdd_2.8v_ldo";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3750000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck10_reg: BUCK10 {
				regulator-name = "vdd_vmem";
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <2850000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};
};

&i2c_2 {
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <66000>;
	status = "okay";

	hdmiddc@50 {
		compatible = "samsung,exynos4210-hdmiddc";
		reg = <0x50>;
	};
};

&mfc {
	samsung,mfc-r = <0x43000000 0x800000>;
	samsung,mfc-l = <0x51000000 0x800000>;
};

&mmc_0 {
	status = "okay";
	mmc-pwrseq = <&emmc_pwrseq>;
	cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <0 4>;
	samsung,dw-mshc-ddr-timing = <0 2>;
	samsung,dw-mshc-hs400-timing = <0 2>;
	samsung,read-strobe-delay = <90>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
	bus-width = <8>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	vmmc-supply = <&ldo18_reg>;
	vqmmc-supply = <&ldo3_reg>;
};

&mmc_2 {
	status = "okay";
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <0 4>;
	samsung,dw-mshc-ddr-timing = <0 2>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
	bus-width = <4>;
	cap-sd-highspeed;
	vmmc-supply = <&ldo19_reg>;
	vqmmc-supply = <&ldo13_reg>;
};

&nocp_mem0_0 {
	status = "okay";
};

&nocp_mem0_1 {
	status = "okay";
};

&nocp_mem1_0 {
	status = "okay";
};

&nocp_mem1_1 {
	status = "okay";
};

&pinctrl_0 {
	hdmi_hpd_irq: hdmi-hpd-irq {
		samsung,pins = "gpx3-7";
		samsung,pin-function = <0>;
		samsung,pin-pud = <1>;
		samsung,pin-drv = <0>;
	};

	s2mps11_irq: s2mps11-irq {
		samsung,pins = "gpx0-4";
		samsung,pin-function = <0xf>;
		samsung,pin-pud = <0>;
		samsung,pin-drv = <0>;
	};
};

&pinctrl_1 {
	emmc_nrst_pin: emmc-nrst {
		samsung,pins = "gpd1-0";
		samsung,pin-function = <0>;
		samsung,pin-pud = <0>;
		samsung,pin-drv = <0>;
	};
};

&tmu_cpu0 {
	vtmu-supply = <&ldo7_reg>;
	status = "okay";
};

&tmu_cpu1 {
	vtmu-supply = <&ldo7_reg>;
	status = "okay";
};

&tmu_cpu2 {
	vtmu-supply = <&ldo7_reg>;
	status = "okay";
};

&tmu_cpu3 {
	vtmu-supply = <&ldo7_reg>;
	status = "okay";
};

&tmu_gpu {
	vtmu-supply = <&ldo7_reg>;
	status = "okay";
};

&rtc {
	status = "okay";
	clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
	clock-names = "rtc", "rtc_src";
};

&usbdrd_dwc3_0 {
	dr_mode = "host";
};

/* usbdrd_dwc3_1 mode customized in each board */

&usbdrd3_0 {
	vdd33-supply = <&ldo9_reg>;
	vdd10-supply = <&ldo11_reg>;
};

&usbdrd3_1 {
	vdd33-supply = <&ldo9_reg>;
	vdd10-supply = <&ldo11_reg>;
};
Commit	Line	Data
3a7c01d7 KK	1	/*
	2	* Hardkernel Odroid XU3 board device tree source
	3	*
	4	* Copyright (c) 2014 Collabora Ltd.
	5	* Copyright (c) 2013 Samsung Electronics Co., Ltd.
	6	* http://www.samsung.com
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <dt-bindings/clock/samsung,s2mps11.h>
	14	#include <dt-bindings/interrupt-controller/irq.h>
	15	#include <dt-bindings/gpio/gpio.h>
	16	#include <dt-bindings/sound/samsung-i2s.h>
	17	#include "exynos5800.dtsi"
df09df6f	18	#include "exynos5422-cpus.dtsi"
cc20fc4c	19	#include "exynos5422-cpu-thermal.dtsi"
3a7c01d7 KK	20
	21	/ {
	22	memory {
	23	reg = <0x40000000 0x7EA00000>;
	24	};
	25
	26	chosen {
	27	linux,stdout-path = &serial_2;
	28	};
	29
	30	firmware@02073000 {
	31	compatible = "samsung,secure-firmware";
	32	reg = <0x02073000 0x1000>;
	33	};
	34
	35	fixed-rate-clocks {
	36	oscclk {
	37	compatible = "samsung,exynos5420-oscclk";
	38	clock-frequency = <24000000>;
	39	};
	40	};
	41
	42	emmc_pwrseq: pwrseq {
	43	pinctrl-0 = <&emmc_nrst_pin>;
	44	pinctrl-names = "default";
	45	compatible = "mmc-pwrseq-emmc";
31b9903c	46	reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
3a7c01d7 KK	47	};
3a7c01d7 KK	48
b685d540 AM	49	fan0: pwm-fan {
	50	compatible = "pwm-fan";
	51	pwms = <&pwm 0 20972 0>;
	52	cooling-min-state = <0>;
	53	cooling-max-state = <3>;
	54	#cooling-cells = <2>;
	55	cooling-levels = <0 130 170 230>;
	56	};
3a7c01d7 KK	57	};
3a7c01d7 KK	58
3f2129fd CC	59	&bus_wcore {
	60	devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
	61	<&nocp_mem1_0>, <&nocp_mem1_1>;
	62	vdd-supply = <&buck3_reg>;
	63	exynos,saturation-ratio = <100>;
	64	status = "okay";
	65	};
	66
	67	&bus_noc {
	68	devfreq = <&bus_wcore>;
	69	status = "okay";
	70	};
	71
	72	&bus_fsys_apb {
	73	devfreq = <&bus_wcore>;
	74	status = "okay";
	75	};
	76
	77	&bus_fsys {
	78	devfreq = <&bus_wcore>;
	79	status = "okay";
	80	};
	81
	82	&bus_fsys2 {
	83	devfreq = <&bus_wcore>;
	84	status = "okay";
	85	};
	86
	87	&bus_mfc {
	88	devfreq = <&bus_wcore>;
	89	status = "okay";
	90	};
	91
	92	&bus_gen {
	93	devfreq = <&bus_wcore>;
	94	status = "okay";
	95	};
	96
	97	&bus_peri {
	98	devfreq = <&bus_wcore>;
	99	status = "okay";
	100	};
	101
	102	&bus_g2d {
	103	devfreq = <&bus_wcore>;
	104	status = "okay";
	105	};
	106
	107	&bus_g2d_acp {
	108	devfreq = <&bus_wcore>;
	109	status = "okay";
	110	};
	111
	112	&bus_jpeg {
	113	devfreq = <&bus_wcore>;
	114	status = "okay";
	115	};
	116
	117	&bus_jpeg_apb {
	118	devfreq = <&bus_wcore>;
	119	status = "okay";
	120	};
	121
	122	&bus_disp1_fimd {
123	devfreq = <&bus_wcore>;
124	status = "okay";
125	};
126
127	&bus_disp1 {
128	devfreq = <&bus_wcore>;
129	status = "okay";
130	};
131
132	&bus_gscl_scaler {
133	devfreq = <&bus_wcore>;
134	status = "okay";
135	};
136
137	&bus_mscl {
138	devfreq = <&bus_wcore>;
139	status = "okay";
140	};
141
3a7c01d7 KK	142	&clock_audss {
	143	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
	144	<&clock_audss EXYNOS_MOUT_I2S>,
	145	<&clock_audss EXYNOS_DOUT_AUD_BUS>;
	146	assigned-clock-parents = <&clock CLK_FIN_PLL>,
	147	<&clock_audss EXYNOS_MOUT_AUDSS>;
	148	assigned-clock-rates = <0>,
	149	<0>,
	150	<19200000>;
	151	};
	152
8b51c5e7 BZ	153	&cpu0 {
	154	cpu-supply = <&buck6_reg>;
	155	};
	156
	157	&cpu4 {
	158	cpu-supply = <&buck2_reg>;
	159	};
	160
3a7c01d7 KK	161	&hdmi {
3a7c01d7 KK	162	status = "okay";
31b9903c	163	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
3a7c01d7 KK	164	pinctrl-names = "default";
	165	pinctrl-0 = <&hdmi_hpd_irq>;
	166
	167	vdd_osc-supply = <&ldo7_reg>;
	168	vdd_pll-supply = <&ldo6_reg>;
	169	vdd-supply = <&ldo6_reg>;
	170	};
	171
	172	&hsi2c_4 {
	173	status = "okay";
	174
	175	s2mps11_pmic@66 {
	176	compatible = "samsung,s2mps11-pmic";
	177	reg = <0x66>;
0fb033bb	178	samsung,s2mps11-acokb-ground;
3a7c01d7 KK	179
	180	interrupt-parent = <&gpx0>;
	181	interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
	182	pinctrl-names = "default";
	183	pinctrl-0 = <&s2mps11_irq>;
	184
	185	s2mps11_osc: clocks {
	186	#clock-cells = <1>;
	187	clock-output-names = "s2mps11_ap",
	188	"s2mps11_cp", "s2mps11_bt";
	189	};
	190
	191	regulators {
	192	ldo1_reg: LDO1 {
	193	regulator-name = "vdd_ldo1";
	194	regulator-min-microvolt = <1000000>;
	195	regulator-max-microvolt = <1000000>;
	196	regulator-always-on;
	197	};
	198
	199	ldo3_reg: LDO3 {
399fc184	200	regulator-name = "vddq_mmc0";
3a7c01d7 KK	201	regulator-min-microvolt = <1800000>;
3a7c01d7 KK	202	regulator-max-microvolt = <1800000>;
3a7c01d7 KK	203	};
	204
	205	ldo5_reg: LDO5 {
	206	regulator-name = "vdd_ldo5";
	207	regulator-min-microvolt = <1800000>;
	208	regulator-max-microvolt = <1800000>;
	209	regulator-always-on;
	210	};
	211
	212	ldo6_reg: LDO6 {
	213	regulator-name = "vdd_ldo6";
	214	regulator-min-microvolt = <1000000>;
	215	regulator-max-microvolt = <1000000>;
	216	regulator-always-on;
	217	};
	218
	219	ldo7_reg: LDO7 {
	220	regulator-name = "vdd_ldo7";
	221	regulator-min-microvolt = <1800000>;
	222	regulator-max-microvolt = <1800000>;
	223	regulator-always-on;
	224	};
	225
	226	ldo8_reg: LDO8 {
	227	regulator-name = "vdd_ldo8";
	228	regulator-min-microvolt = <1800000>;
	229	regulator-max-microvolt = <1800000>;
	230	regulator-always-on;
	231	};
	232
	233	ldo9_reg: LDO9 {
	234	regulator-name = "vdd_ldo9";
	235	regulator-min-microvolt = <3000000>;
	236	regulator-max-microvolt = <3000000>;
	237	regulator-always-on;
	238	};
	239
	240	ldo10_reg: LDO10 {
	241	regulator-name = "vdd_ldo10";
	242	regulator-min-microvolt = <1800000>;
	243	regulator-max-microvolt = <1800000>;
	244	regulator-always-on;
	245	};
	246
	247	ldo11_reg: LDO11 {
	248	regulator-name = "vdd_ldo11";
	249	regulator-min-microvolt = <1000000>;
	250	regulator-max-microvolt = <1000000>;
	251	regulator-always-on;
	252	};
	253
	254	ldo12_reg: LDO12 {
	255	regulator-name = "vdd_ldo12";
	256	regulator-min-microvolt = <1800000>;
	257	regulator-max-microvolt = <1800000>;
	258	regulator-always-on;
	259	};
	260
	261	ldo13_reg: LDO13 {
399fc184	262	regulator-name = "vddq_mmc2";
3a7c01d7 KK	263	regulator-min-microvolt = <2800000>;
3a7c01d7 KK	264	regulator-max-microvolt = <2800000>;
3a7c01d7 KK	265	};
	266
	267	ldo15_reg: LDO15 {
	268	regulator-name = "vdd_ldo15";
	269	regulator-min-microvolt = <3100000>;
	270	regulator-max-microvolt = <3100000>;
	271	regulator-always-on;
	272	};
	273
	274	ldo16_reg: LDO16 {
	275	regulator-name = "vdd_ldo16";
	276	regulator-min-microvolt = <2200000>;
	277	regulator-max-microvolt = <2200000>;
	278	regulator-always-on;
	279	};
	280
	281	ldo17_reg: LDO17 {
	282	regulator-name = "tsp_avdd";
	283	regulator-min-microvolt = <3300000>;
	284	regulator-max-microvolt = <3300000>;
	285	regulator-always-on;
	286	};
	287
399fc184 MR	288	ldo18_reg: LDO18 {
	289	regulator-name = "vdd_emmc_1V8";
	290	regulator-min-microvolt = <1800000>;
	291	regulator-max-microvolt = <1800000>;
	292	};
	293
3a7c01d7 KK	294	ldo19_reg: LDO19 {
	295	regulator-name = "vdd_sd";
	296	regulator-min-microvolt = <2800000>;
	297	regulator-max-microvolt = <2800000>;
3a7c01d7 KK	298	};
	299
	300	ldo24_reg: LDO24 {
	301	regulator-name = "tsp_io";
	302	regulator-min-microvolt = <2800000>;
	303	regulator-max-microvolt = <2800000>;
	304	regulator-always-on;
	305	};
	306
	307	ldo26_reg: LDO26 {
	308	regulator-name = "vdd_ldo26";
	309	regulator-min-microvolt = <3000000>;
	310	regulator-max-microvolt = <3000000>;
	311	regulator-always-on;
	312	};
	313
	314	buck1_reg: BUCK1 {
	315	regulator-name = "vdd_mif";
	316	regulator-min-microvolt = <800000>;
	317	regulator-max-microvolt = <1300000>;
	318	regulator-always-on;
	319	regulator-boot-on;
	320	};
	321
	322	buck2_reg: BUCK2 {
	323	regulator-name = "vdd_arm";
	324	regulator-min-microvolt = <800000>;
	325	regulator-max-microvolt = <1500000>;
	326	regulator-always-on;
	327	regulator-boot-on;
	328	};
	329
	330	buck3_reg: BUCK3 {
	331	regulator-name = "vdd_int";
	332	regulator-min-microvolt = <800000>;
	333	regulator-max-microvolt = <1400000>;
	334	regulator-always-on;
	335	regulator-boot-on;
	336	};
	337
	338	buck4_reg: BUCK4 {
	339	regulator-name = "vdd_g3d";
	340	regulator-min-microvolt = <800000>;
	341	regulator-max-microvolt = <1400000>;
	342	regulator-always-on;
	343	regulator-boot-on;
	344	};
	345
	346	buck5_reg: BUCK5 {
	347	regulator-name = "vdd_mem";
	348	regulator-min-microvolt = <800000>;
	349	regulator-max-microvolt = <1400000>;
	350	regulator-always-on;
	351	regulator-boot-on;
	352	};
	353
	354	buck6_reg: BUCK6 {
	355	regulator-name = "vdd_kfc";
	356	regulator-min-microvolt = <800000>;
	357	regulator-max-microvolt = <1500000>;
	358	regulator-always-on;
	359	regulator-boot-on;
	360	};
	361
362	buck7_reg: BUCK7 {
363	regulator-name = "vdd_1.0v_ldo";
364	regulator-min-microvolt = <800000>;
365	regulator-max-microvolt = <1500000>;
366	regulator-always-on;
367	regulator-boot-on;
368	};
369
370	buck8_reg: BUCK8 {
371	regulator-name = "vdd_1.8v_ldo";
372	regulator-min-microvolt = <800000>;
373	regulator-max-microvolt = <1500000>;
374	regulator-always-on;
375	regulator-boot-on;
376	};
377
378	buck9_reg: BUCK9 {
379	regulator-name = "vdd_2.8v_ldo";
380	regulator-min-microvolt = <3000000>;
381	regulator-max-microvolt = <3750000>;
382	regulator-always-on;
383	regulator-boot-on;
384	};
385
386	buck10_reg: BUCK10 {
387	regulator-name = "vdd_vmem";
388	regulator-min-microvolt = <2850000>;
389	regulator-max-microvolt = <2850000>;
390	regulator-always-on;
391	regulator-boot-on;
392	};
393	};
394	};
395	};
396
3a7c01d7 KK	397	&i2c_2 {
	398	samsung,i2c-sda-delay = <100>;
	399	samsung,i2c-max-bus-freq = <66000>;
	400	status = "okay";
	401
	402	hdmiddc@50 {
	403	compatible = "samsung,exynos4210-hdmiddc";
	404	reg = <0x50>;
	405	};
	406	};
	407
3a7c01d7 KK	408	&mfc {
	409	samsung,mfc-r = <0x43000000 0x800000>;
	410	samsung,mfc-l = <0x51000000 0x800000>;
	411	};
	412
	413	&mmc_0 {
	414	status = "okay";
	415	mmc-pwrseq = <&emmc_pwrseq>;
	416	cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
	417	card-detect-delay = <200>;
	418	samsung,dw-mshc-ciu-div = <3>;
	419	samsung,dw-mshc-sdr-timing = <0 4>;
	420	samsung,dw-mshc-ddr-timing = <0 2>;
	421	samsung,dw-mshc-hs400-timing = <0 2>;
	422	samsung,read-strobe-delay = <90>;
	423	pinctrl-names = "default";
	424	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
	425	bus-width = <8>;
	426	cap-mmc-highspeed;
	427	mmc-hs200-1_8v;
	428	mmc-hs400-1_8v;
399fc184 MR	429	vmmc-supply = <&ldo18_reg>;
399fc184 MR	430	vqmmc-supply = <&ldo3_reg>;
3a7c01d7 KK	431	};
	432
	433	&mmc_2 {
	434	status = "okay";
	435	card-detect-delay = <200>;
	436	samsung,dw-mshc-ciu-div = <3>;
	437	samsung,dw-mshc-sdr-timing = <0 4>;
	438	samsung,dw-mshc-ddr-timing = <0 2>;
	439	pinctrl-names = "default";
	440	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
	441	bus-width = <4>;
	442	cap-sd-highspeed;
399fc184 MR	443	vmmc-supply = <&ldo19_reg>;
399fc184 MR	444	vqmmc-supply = <&ldo13_reg>;
3a7c01d7 KK	445	};
3a7c01d7 KK	446
3f2129fd CC	447	&nocp_mem0_0 {
	448	status = "okay";
	449	};
	450
	451	&nocp_mem0_1 {
	452	status = "okay";
	453	};
	454
	455	&nocp_mem1_0 {
	456	status = "okay";
	457	};
	458
	459	&nocp_mem1_1 {
	460	status = "okay";
	461	};
	462
3a7c01d7 KK	463	&pinctrl_0 {
	464	hdmi_hpd_irq: hdmi-hpd-irq {
	465	samsung,pins = "gpx3-7";
	466	samsung,pin-function = <0>;
	467	samsung,pin-pud = <1>;
	468	samsung,pin-drv = <0>;
	469	};
	470
	471	s2mps11_irq: s2mps11-irq {
	472	samsung,pins = "gpx0-4";
	473	samsung,pin-function = <0xf>;
	474	samsung,pin-pud = <0>;
	475	samsung,pin-drv = <0>;
	476	};
	477	};
	478
	479	&pinctrl_1 {
	480	emmc_nrst_pin: emmc-nrst {
	481	samsung,pins = "gpd1-0";
	482	samsung,pin-function = <0>;
	483	samsung,pin-pud = <0>;
	484	samsung,pin-drv = <0>;
	485	};
	486	};
	487
8e946a05 AM	488	&tmu_cpu0 {
	489	vtmu-supply = <&ldo7_reg>;
	490	status = "okay";
	491	};
	492
	493	&tmu_cpu1 {
	494	vtmu-supply = <&ldo7_reg>;
	495	status = "okay";
	496	};
	497
	498	&tmu_cpu2 {
	499	vtmu-supply = <&ldo7_reg>;
	500	status = "okay";
	501	};
	502
	503	&tmu_cpu3 {
	504	vtmu-supply = <&ldo7_reg>;
	505	status = "okay";
	506	};
	507
	508	&tmu_gpu {
	509	vtmu-supply = <&ldo7_reg>;
	510	status = "okay";
	511	};
	512
3a7c01d7 KK	513	&rtc {
	514	status = "okay";
	515	clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
	516	clock-names = "rtc", "rtc_src";
	517	};
	518
	519	&usbdrd_dwc3_0 {
	520	dr_mode = "host";
	521	};
	522
66583560	523	/* usbdrd_dwc3_1 mode customized in each board */
dc929d49 AM	524
	525	&usbdrd3_0 {
	526	vdd33-supply = <&ldo9_reg>;
	527	vdd10-supply = <&ldo11_reg>;
	528	};
	529
	530	&usbdrd3_1 {
	531	vdd33-supply = <&ldo9_reg>;
	532	vdd10-supply = <&ldo11_reg>;
	533	};