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3a7c01d7 KK |
1 | /* |
2 | * Hardkernel Odroid XU3 board device tree source | |
3 | * | |
4 | * Copyright (c) 2014 Collabora Ltd. | |
5 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
6 | * http://www.samsung.com | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <dt-bindings/clock/samsung,s2mps11.h> | |
14 | #include <dt-bindings/interrupt-controller/irq.h> | |
15 | #include <dt-bindings/gpio/gpio.h> | |
16 | #include <dt-bindings/sound/samsung-i2s.h> | |
17 | #include "exynos5800.dtsi" | |
18 | ||
19 | / { | |
20 | memory { | |
21 | reg = <0x40000000 0x7EA00000>; | |
22 | }; | |
23 | ||
24 | chosen { | |
25 | linux,stdout-path = &serial_2; | |
26 | }; | |
27 | ||
28 | firmware@02073000 { | |
29 | compatible = "samsung,secure-firmware"; | |
30 | reg = <0x02073000 0x1000>; | |
31 | }; | |
32 | ||
33 | fixed-rate-clocks { | |
34 | oscclk { | |
35 | compatible = "samsung,exynos5420-oscclk"; | |
36 | clock-frequency = <24000000>; | |
37 | }; | |
38 | }; | |
39 | ||
40 | emmc_pwrseq: pwrseq { | |
41 | pinctrl-0 = <&emmc_nrst_pin>; | |
42 | pinctrl-names = "default"; | |
43 | compatible = "mmc-pwrseq-emmc"; | |
44 | reset-gpios = <&gpd1 0 1>; | |
45 | }; | |
46 | ||
47 | pwmleds { | |
48 | compatible = "pwm-leds"; | |
49 | ||
50 | greenled { | |
51 | label = "green:mmc0"; | |
52 | pwms = <&pwm 1 2000000 0>; | |
53 | pwm-names = "pwm1"; | |
54 | /* | |
55 | * Green LED is much brighter than the others | |
56 | * so limit its max brightness | |
57 | */ | |
58 | max_brightness = <127>; | |
59 | linux,default-trigger = "mmc0"; | |
60 | }; | |
61 | ||
62 | blueled { | |
63 | label = "blue:heartbeat"; | |
64 | pwms = <&pwm 2 2000000 0>; | |
65 | pwm-names = "pwm2"; | |
66 | max_brightness = <255>; | |
67 | linux,default-trigger = "heartbeat"; | |
68 | }; | |
69 | }; | |
70 | ||
71 | gpioleds { | |
72 | compatible = "gpio-leds"; | |
73 | redled { | |
74 | label = "red:microSD"; | |
75 | gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; | |
76 | default-state = "off"; | |
77 | linux,default-trigger = "mmc1"; | |
78 | }; | |
79 | }; | |
80 | ||
81 | sound: sound { | |
82 | compatible = "simple-audio-card"; | |
83 | ||
84 | simple-audio-card,name = "Odroid-XU3"; | |
85 | simple-audio-card,widgets = | |
86 | "Headphone", "Headphone Jack", | |
87 | "Speakers", "Speakers"; | |
88 | simple-audio-card,routing = | |
89 | "Headphone Jack", "HPL", | |
90 | "Headphone Jack", "HPR", | |
91 | "Headphone Jack", "MICBIAS", | |
92 | "IN1", "Headphone Jack", | |
93 | "Speakers", "SPKL", | |
94 | "Speakers", "SPKR"; | |
95 | ||
96 | simple-audio-card,format = "i2s"; | |
97 | simple-audio-card,bitclock-master = <&link0_codec>; | |
98 | simple-audio-card,frame-master = <&link0_codec>; | |
99 | ||
100 | simple-audio-card,cpu { | |
101 | sound-dai = <&i2s0 0>; | |
102 | system-clock-frequency = <19200000>; | |
103 | }; | |
104 | ||
105 | link0_codec: simple-audio-card,codec { | |
106 | sound-dai = <&max98090>; | |
107 | clocks = <&i2s0 CLK_I2S_CDCLK>; | |
108 | }; | |
109 | }; | |
b685d540 AM |
110 | |
111 | fan0: pwm-fan { | |
112 | compatible = "pwm-fan"; | |
113 | pwms = <&pwm 0 20972 0>; | |
114 | cooling-min-state = <0>; | |
115 | cooling-max-state = <3>; | |
116 | #cooling-cells = <2>; | |
117 | cooling-levels = <0 130 170 230>; | |
118 | }; | |
3a7c01d7 KK |
119 | }; |
120 | ||
121 | &clock_audss { | |
122 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, | |
123 | <&clock_audss EXYNOS_MOUT_I2S>, | |
124 | <&clock_audss EXYNOS_DOUT_AUD_BUS>; | |
125 | assigned-clock-parents = <&clock CLK_FIN_PLL>, | |
126 | <&clock_audss EXYNOS_MOUT_AUDSS>; | |
127 | assigned-clock-rates = <0>, | |
128 | <0>, | |
129 | <19200000>; | |
130 | }; | |
131 | ||
132 | &fimd { | |
133 | status = "okay"; | |
134 | }; | |
135 | ||
136 | ||
137 | &hdmi { | |
138 | status = "okay"; | |
139 | hpd-gpio = <&gpx3 7 0>; | |
140 | pinctrl-names = "default"; | |
141 | pinctrl-0 = <&hdmi_hpd_irq>; | |
142 | ||
143 | vdd_osc-supply = <&ldo7_reg>; | |
144 | vdd_pll-supply = <&ldo6_reg>; | |
145 | vdd-supply = <&ldo6_reg>; | |
146 | }; | |
147 | ||
148 | &hsi2c_4 { | |
149 | status = "okay"; | |
150 | ||
151 | s2mps11_pmic@66 { | |
152 | compatible = "samsung,s2mps11-pmic"; | |
153 | reg = <0x66>; | |
154 | s2mps11,buck2-ramp-delay = <12>; | |
155 | s2mps11,buck34-ramp-delay = <12>; | |
156 | s2mps11,buck16-ramp-delay = <12>; | |
157 | s2mps11,buck6-ramp-enable = <1>; | |
158 | s2mps11,buck2-ramp-enable = <1>; | |
159 | s2mps11,buck3-ramp-enable = <1>; | |
160 | s2mps11,buck4-ramp-enable = <1>; | |
161 | ||
162 | interrupt-parent = <&gpx0>; | |
163 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | |
164 | pinctrl-names = "default"; | |
165 | pinctrl-0 = <&s2mps11_irq>; | |
166 | ||
167 | s2mps11_osc: clocks { | |
168 | #clock-cells = <1>; | |
169 | clock-output-names = "s2mps11_ap", | |
170 | "s2mps11_cp", "s2mps11_bt"; | |
171 | }; | |
172 | ||
173 | regulators { | |
174 | ldo1_reg: LDO1 { | |
175 | regulator-name = "vdd_ldo1"; | |
176 | regulator-min-microvolt = <1000000>; | |
177 | regulator-max-microvolt = <1000000>; | |
178 | regulator-always-on; | |
179 | }; | |
180 | ||
181 | ldo3_reg: LDO3 { | |
182 | regulator-name = "vdd_ldo3"; | |
183 | regulator-min-microvolt = <1800000>; | |
184 | regulator-max-microvolt = <1800000>; | |
185 | regulator-always-on; | |
186 | }; | |
187 | ||
188 | ldo5_reg: LDO5 { | |
189 | regulator-name = "vdd_ldo5"; | |
190 | regulator-min-microvolt = <1800000>; | |
191 | regulator-max-microvolt = <1800000>; | |
192 | regulator-always-on; | |
193 | }; | |
194 | ||
195 | ldo6_reg: LDO6 { | |
196 | regulator-name = "vdd_ldo6"; | |
197 | regulator-min-microvolt = <1000000>; | |
198 | regulator-max-microvolt = <1000000>; | |
199 | regulator-always-on; | |
200 | }; | |
201 | ||
202 | ldo7_reg: LDO7 { | |
203 | regulator-name = "vdd_ldo7"; | |
204 | regulator-min-microvolt = <1800000>; | |
205 | regulator-max-microvolt = <1800000>; | |
206 | regulator-always-on; | |
207 | }; | |
208 | ||
209 | ldo8_reg: LDO8 { | |
210 | regulator-name = "vdd_ldo8"; | |
211 | regulator-min-microvolt = <1800000>; | |
212 | regulator-max-microvolt = <1800000>; | |
213 | regulator-always-on; | |
214 | }; | |
215 | ||
216 | ldo9_reg: LDO9 { | |
217 | regulator-name = "vdd_ldo9"; | |
218 | regulator-min-microvolt = <3000000>; | |
219 | regulator-max-microvolt = <3000000>; | |
220 | regulator-always-on; | |
221 | }; | |
222 | ||
223 | ldo10_reg: LDO10 { | |
224 | regulator-name = "vdd_ldo10"; | |
225 | regulator-min-microvolt = <1800000>; | |
226 | regulator-max-microvolt = <1800000>; | |
227 | regulator-always-on; | |
228 | }; | |
229 | ||
230 | ldo11_reg: LDO11 { | |
231 | regulator-name = "vdd_ldo11"; | |
232 | regulator-min-microvolt = <1000000>; | |
233 | regulator-max-microvolt = <1000000>; | |
234 | regulator-always-on; | |
235 | }; | |
236 | ||
237 | ldo12_reg: LDO12 { | |
238 | regulator-name = "vdd_ldo12"; | |
239 | regulator-min-microvolt = <1800000>; | |
240 | regulator-max-microvolt = <1800000>; | |
241 | regulator-always-on; | |
242 | }; | |
243 | ||
244 | ldo13_reg: LDO13 { | |
245 | regulator-name = "vdd_ldo13"; | |
246 | regulator-min-microvolt = <2800000>; | |
247 | regulator-max-microvolt = <2800000>; | |
248 | regulator-always-on; | |
249 | }; | |
250 | ||
251 | ldo15_reg: LDO15 { | |
252 | regulator-name = "vdd_ldo15"; | |
253 | regulator-min-microvolt = <3100000>; | |
254 | regulator-max-microvolt = <3100000>; | |
255 | regulator-always-on; | |
256 | }; | |
257 | ||
258 | ldo16_reg: LDO16 { | |
259 | regulator-name = "vdd_ldo16"; | |
260 | regulator-min-microvolt = <2200000>; | |
261 | regulator-max-microvolt = <2200000>; | |
262 | regulator-always-on; | |
263 | }; | |
264 | ||
265 | ldo17_reg: LDO17 { | |
266 | regulator-name = "tsp_avdd"; | |
267 | regulator-min-microvolt = <3300000>; | |
268 | regulator-max-microvolt = <3300000>; | |
269 | regulator-always-on; | |
270 | }; | |
271 | ||
272 | ldo19_reg: LDO19 { | |
273 | regulator-name = "vdd_sd"; | |
274 | regulator-min-microvolt = <2800000>; | |
275 | regulator-max-microvolt = <2800000>; | |
276 | regulator-always-on; | |
277 | }; | |
278 | ||
279 | ldo24_reg: LDO24 { | |
280 | regulator-name = "tsp_io"; | |
281 | regulator-min-microvolt = <2800000>; | |
282 | regulator-max-microvolt = <2800000>; | |
283 | regulator-always-on; | |
284 | }; | |
285 | ||
286 | ldo26_reg: LDO26 { | |
287 | regulator-name = "vdd_ldo26"; | |
288 | regulator-min-microvolt = <3000000>; | |
289 | regulator-max-microvolt = <3000000>; | |
290 | regulator-always-on; | |
291 | }; | |
292 | ||
293 | buck1_reg: BUCK1 { | |
294 | regulator-name = "vdd_mif"; | |
295 | regulator-min-microvolt = <800000>; | |
296 | regulator-max-microvolt = <1300000>; | |
297 | regulator-always-on; | |
298 | regulator-boot-on; | |
299 | }; | |
300 | ||
301 | buck2_reg: BUCK2 { | |
302 | regulator-name = "vdd_arm"; | |
303 | regulator-min-microvolt = <800000>; | |
304 | regulator-max-microvolt = <1500000>; | |
305 | regulator-always-on; | |
306 | regulator-boot-on; | |
307 | }; | |
308 | ||
309 | buck3_reg: BUCK3 { | |
310 | regulator-name = "vdd_int"; | |
311 | regulator-min-microvolt = <800000>; | |
312 | regulator-max-microvolt = <1400000>; | |
313 | regulator-always-on; | |
314 | regulator-boot-on; | |
315 | }; | |
316 | ||
317 | buck4_reg: BUCK4 { | |
318 | regulator-name = "vdd_g3d"; | |
319 | regulator-min-microvolt = <800000>; | |
320 | regulator-max-microvolt = <1400000>; | |
321 | regulator-always-on; | |
322 | regulator-boot-on; | |
323 | }; | |
324 | ||
325 | buck5_reg: BUCK5 { | |
326 | regulator-name = "vdd_mem"; | |
327 | regulator-min-microvolt = <800000>; | |
328 | regulator-max-microvolt = <1400000>; | |
329 | regulator-always-on; | |
330 | regulator-boot-on; | |
331 | }; | |
332 | ||
333 | buck6_reg: BUCK6 { | |
334 | regulator-name = "vdd_kfc"; | |
335 | regulator-min-microvolt = <800000>; | |
336 | regulator-max-microvolt = <1500000>; | |
337 | regulator-always-on; | |
338 | regulator-boot-on; | |
339 | }; | |
340 | ||
341 | buck7_reg: BUCK7 { | |
342 | regulator-name = "vdd_1.0v_ldo"; | |
343 | regulator-min-microvolt = <800000>; | |
344 | regulator-max-microvolt = <1500000>; | |
345 | regulator-always-on; | |
346 | regulator-boot-on; | |
347 | }; | |
348 | ||
349 | buck8_reg: BUCK8 { | |
350 | regulator-name = "vdd_1.8v_ldo"; | |
351 | regulator-min-microvolt = <800000>; | |
352 | regulator-max-microvolt = <1500000>; | |
353 | regulator-always-on; | |
354 | regulator-boot-on; | |
355 | }; | |
356 | ||
357 | buck9_reg: BUCK9 { | |
358 | regulator-name = "vdd_2.8v_ldo"; | |
359 | regulator-min-microvolt = <3000000>; | |
360 | regulator-max-microvolt = <3750000>; | |
361 | regulator-always-on; | |
362 | regulator-boot-on; | |
363 | }; | |
364 | ||
365 | buck10_reg: BUCK10 { | |
366 | regulator-name = "vdd_vmem"; | |
367 | regulator-min-microvolt = <2850000>; | |
368 | regulator-max-microvolt = <2850000>; | |
369 | regulator-always-on; | |
370 | regulator-boot-on; | |
371 | }; | |
372 | }; | |
373 | }; | |
374 | }; | |
375 | ||
376 | &hsi2c_5 { | |
377 | status = "okay"; | |
378 | max98090: max98090@10 { | |
379 | compatible = "maxim,max98090"; | |
380 | reg = <0x10>; | |
381 | interrupt-parent = <&gpx3>; | |
382 | interrupts = <2 0>; | |
383 | clocks = <&i2s0 CLK_I2S_CDCLK>; | |
384 | clock-names = "mclk"; | |
385 | #sound-dai-cells = <0>; | |
386 | }; | |
387 | }; | |
388 | ||
389 | &i2c_2 { | |
390 | samsung,i2c-sda-delay = <100>; | |
391 | samsung,i2c-max-bus-freq = <66000>; | |
392 | status = "okay"; | |
393 | ||
394 | hdmiddc@50 { | |
395 | compatible = "samsung,exynos4210-hdmiddc"; | |
396 | reg = <0x50>; | |
397 | }; | |
398 | }; | |
399 | ||
400 | &i2s0 { | |
401 | status = "okay"; | |
402 | }; | |
403 | ||
404 | &mfc { | |
405 | samsung,mfc-r = <0x43000000 0x800000>; | |
406 | samsung,mfc-l = <0x51000000 0x800000>; | |
407 | }; | |
408 | ||
409 | &mmc_0 { | |
410 | status = "okay"; | |
411 | mmc-pwrseq = <&emmc_pwrseq>; | |
412 | cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; | |
413 | card-detect-delay = <200>; | |
414 | samsung,dw-mshc-ciu-div = <3>; | |
415 | samsung,dw-mshc-sdr-timing = <0 4>; | |
416 | samsung,dw-mshc-ddr-timing = <0 2>; | |
417 | samsung,dw-mshc-hs400-timing = <0 2>; | |
418 | samsung,read-strobe-delay = <90>; | |
419 | pinctrl-names = "default"; | |
420 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; | |
421 | bus-width = <8>; | |
422 | cap-mmc-highspeed; | |
423 | mmc-hs200-1_8v; | |
424 | mmc-hs400-1_8v; | |
425 | }; | |
426 | ||
427 | &mmc_2 { | |
428 | status = "okay"; | |
429 | card-detect-delay = <200>; | |
430 | samsung,dw-mshc-ciu-div = <3>; | |
431 | samsung,dw-mshc-sdr-timing = <0 4>; | |
432 | samsung,dw-mshc-ddr-timing = <0 2>; | |
433 | pinctrl-names = "default"; | |
434 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; | |
435 | bus-width = <4>; | |
436 | cap-sd-highspeed; | |
437 | }; | |
438 | ||
439 | &pinctrl_0 { | |
440 | hdmi_hpd_irq: hdmi-hpd-irq { | |
441 | samsung,pins = "gpx3-7"; | |
442 | samsung,pin-function = <0>; | |
443 | samsung,pin-pud = <1>; | |
444 | samsung,pin-drv = <0>; | |
445 | }; | |
446 | ||
447 | s2mps11_irq: s2mps11-irq { | |
448 | samsung,pins = "gpx0-4"; | |
449 | samsung,pin-function = <0xf>; | |
450 | samsung,pin-pud = <0>; | |
451 | samsung,pin-drv = <0>; | |
452 | }; | |
453 | }; | |
454 | ||
455 | &pinctrl_1 { | |
456 | emmc_nrst_pin: emmc-nrst { | |
457 | samsung,pins = "gpd1-0"; | |
458 | samsung,pin-function = <0>; | |
459 | samsung,pin-pud = <0>; | |
460 | samsung,pin-drv = <0>; | |
461 | }; | |
462 | }; | |
463 | ||
464 | &pwm { | |
465 | /* | |
466 | * PWM 0 -- fan | |
467 | * PWM 1 -- Green LED | |
468 | * PWM 2 -- Blue LED | |
469 | * PWM 3 -- on MIPI connector for backlight | |
470 | */ | |
471 | pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; | |
472 | pinctrl-names = "default"; | |
b685d540 | 473 | samsung,pwm-outputs = <0>; |
3a7c01d7 KK |
474 | status = "okay"; |
475 | }; | |
476 | ||
8e946a05 AM |
477 | &tmu_cpu0 { |
478 | vtmu-supply = <&ldo7_reg>; | |
479 | status = "okay"; | |
480 | }; | |
481 | ||
482 | &tmu_cpu1 { | |
483 | vtmu-supply = <&ldo7_reg>; | |
484 | status = "okay"; | |
485 | }; | |
486 | ||
487 | &tmu_cpu2 { | |
488 | vtmu-supply = <&ldo7_reg>; | |
489 | status = "okay"; | |
490 | }; | |
491 | ||
492 | &tmu_cpu3 { | |
493 | vtmu-supply = <&ldo7_reg>; | |
494 | status = "okay"; | |
495 | }; | |
496 | ||
497 | &tmu_gpu { | |
498 | vtmu-supply = <&ldo7_reg>; | |
499 | status = "okay"; | |
500 | }; | |
501 | ||
3a7c01d7 KK |
502 | &rtc { |
503 | status = "okay"; | |
504 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; | |
505 | clock-names = "rtc", "rtc_src"; | |
506 | }; | |
507 | ||
508 | &usbdrd_dwc3_0 { | |
509 | dr_mode = "host"; | |
510 | }; | |
511 | ||
512 | &usbdrd_dwc3_1 { | |
513 | dr_mode = "otg"; | |
514 | }; | |
dc929d49 AM |
515 | |
516 | &usbdrd3_0 { | |
517 | vdd33-supply = <&ldo9_reg>; | |
518 | vdd10-supply = <&ldo11_reg>; | |
519 | }; | |
520 | ||
521 | &usbdrd3_1 { | |
522 | vdd33-supply = <&ldo9_reg>; | |
523 | vdd10-supply = <&ldo11_reg>; | |
524 | }; |