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1/*
2 * SAMSUNG EXYNOS5440 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/include/ "skeleton.dtsi"
13
14/ {
15 compatible = "samsung,exynos5440";
16
17 interrupt-parent = <&gic>;
18
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19 clock: clock-controller@0x160000 {
20 compatible = "samsung,exynos5440-clock";
21 reg = <0x160000 0x1000>;
22 #clock-cells = <1>;
23 };
24
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25 gic:interrupt-controller@2E0000 {
26 compatible = "arm,cortex-a15-gic";
27 #interrupt-cells = <3>;
28 interrupt-controller;
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29 reg = <0x2E1000 0x1000>,
30 <0x2E2000 0x1000>,
31 <0x2E4000 0x2000>,
32 <0x2E6000 0x2000>;
33 interrupts = <1 9 0xf04>;
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34 };
35
36 cpus {
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37 #address-cells = <1>;
38 #size-cells = <0>;
39
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40 cpu@0 {
41 compatible = "arm,cortex-a15";
f5108e1c 42 reg = <0>;
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43 };
44 cpu@1 {
45 compatible = "arm,cortex-a15";
f5108e1c 46 reg = <1>;
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47 };
48 cpu@2 {
49 compatible = "arm,cortex-a15";
f5108e1c 50 reg = <2>;
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51 };
52 cpu@3 {
53 compatible = "arm,cortex-a15";
f5108e1c 54 reg = <3>;
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55 };
56 };
57
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58 timer {
59 compatible = "arm,cortex-a15-timer",
60 "arm,armv7-timer";
61 interrupts = <1 13 0xf08>,
62 <1 14 0xf08>,
63 <1 11 0xf08>,
64 <1 10 0xf08>;
65 clock-frequency = <50000000>;
66 };
67
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68 serial@B0000 {
69 compatible = "samsung,exynos4210-uart";
70 reg = <0xB0000 0x1000>;
71 interrupts = <0 2 0>;
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72 clocks = <&clock 21>, <&clock 21>;
73 clock-names = "uart", "clk_uart_baud0";
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74 };
75
76 serial@C0000 {
77 compatible = "samsung,exynos4210-uart";
78 reg = <0xC0000 0x1000>;
79 interrupts = <0 3 0>;
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80 clocks = <&clock 21>, <&clock 21>;
81 clock-names = "uart", "clk_uart_baud0";
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82 };
83
84 spi {
85 compatible = "samsung,exynos4210-spi";
86 reg = <0xD0000 0x1000>;
87 interrupts = <0 4 0>;
88 tx-dma-channel = <&pdma0 5>; /* preliminary */
89 rx-dma-channel = <&pdma0 4>; /* preliminary */
90 #address-cells = <1>;
91 #size-cells = <0>;
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92 clocks = <&clock 21>, <&clock 16>;
93 clock-names = "spi", "spi_busclk0";
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94 };
95
96 pinctrl {
f6925432 97 compatible = "samsung,exynos5440-pinctrl";
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98 reg = <0xE0000 0x1000>;
99 interrupt-controller;
100 #interrupt-cells = <2>;
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101 #gpio-cells = <2>;
102
103 fan: fan {
104 samsung,exynos5440-pin-function = <1>;
105 };
106
107 hdd_led0: hdd_led0 {
108 samsung,exynos5440-pin-function = <2>;
109 };
110
111 hdd_led1: hdd_led1 {
112 samsung,exynos5440-pin-function = <3>;
113 };
114
115 uart1: uart1 {
116 samsung,exynos5440-pin-function = <4>;
117 };
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118 };
119
120 i2c@F0000 {
49498c56 121 compatible = "samsung,exynos5440-i2c";
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122 reg = <0xF0000 0x1000>;
123 interrupts = <0 5 0>;
124 #address-cells = <1>;
125 #size-cells = <0>;
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126 clocks = <&clock 21>;
127 clock-names = "i2c";
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128 };
129
130 i2c@100000 {
49498c56 131 compatible = "samsung,exynos5440-i2c";
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132 reg = <0x100000 0x1000>;
133 interrupts = <0 6 0>;
134 #address-cells = <1>;
135 #size-cells = <0>;
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136 clocks = <&clock 21>;
137 clock-names = "i2c";
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138 };
139
140 watchdog {
141 compatible = "samsung,s3c2410-wdt";
142 reg = <0x110000 0x1000>;
143 interrupts = <0 1 0>;
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144 clocks = <&clock 21>;
145 clock-names = "watchdog";
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146 };
147
148 amba {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 compatible = "arm,amba-bus";
152 interrupt-parent = <&gic>;
153 ranges;
154
155 pdma0: pdma@121A0000 {
156 compatible = "arm,pl330", "arm,primecell";
157 reg = <0x120000 0x1000>;
158 interrupts = <0 34 0>;
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159 clocks = <&clock 21>;
160 clock-names = "apb_pclk";
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161 #dma-cells = <1>;
162 #dma-channels = <8>;
163 #dma-requests = <32>;
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164 };
165
166 pdma1: pdma@121B0000 {
167 compatible = "arm,pl330", "arm,primecell";
168 reg = <0x121000 0x1000>;
169 interrupts = <0 35 0>;
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170 clocks = <&clock 21>;
171 clock-names = "apb_pclk";
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172 #dma-cells = <1>;
173 #dma-channels = <8>;
174 #dma-requests = <32>;
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175 };
176 };
177
178 rtc {
179 compatible = "samsung,s3c6410-rtc";
180 reg = <0x130000 0x1000>;
e877a5aa 181 interrupts = <0 17 0>, <0 16 0>;
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182 clocks = <&clock 21>;
183 clock-names = "rtc";
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184 };
185};